forked from OSchip/llvm-project
160 lines
7.8 KiB
LLVM
160 lines
7.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX9-FAST-DENORM %s
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1010 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX10-FAST-DENORM %s
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; fold (fadd fast (fpext (fmul fast x, y)), z) -> (fma (fpext x), (fpext y), z)
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; fold (fadd fast x, (fpext (fmul fast y, z))) -> (fma (fpext y), (fpext z), x)
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define amdgpu_vs float @test_f16_f32_add_ext_mul(half inreg %x, half inreg %y, float inreg %z) {
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; GFX9-FAST-DENORM-LABEL: test_f16_f32_add_ext_mul:
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; GFX9-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s1
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; GFX9-FAST-DENORM-NEXT: v_mad_f32 v0, v0, v1, s2
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; GFX9-FAST-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-FAST-DENORM-LABEL: test_f16_f32_add_ext_mul:
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; GFX10-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s1
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v0, v0, v1, s2
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; GFX10-FAST-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast half %x, %y
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%b = fpext half %a to float
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%c = fadd fast float %b, %z
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ret float %c
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}
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define amdgpu_vs float @test_f16_f32_add_ext_mul_rhs(half inreg %x, half inreg %y, float inreg %z) {
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; GFX9-FAST-DENORM-LABEL: test_f16_f32_add_ext_mul_rhs:
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; GFX9-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s1
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; GFX9-FAST-DENORM-NEXT: v_mad_f32 v0, v0, v1, s2
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; GFX9-FAST-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-FAST-DENORM-LABEL: test_f16_f32_add_ext_mul_rhs:
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; GFX10-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s1
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v0, v0, v1, s2
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; GFX10-FAST-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast half %x, %y
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%b = fpext half %a to float
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%c = fadd fast float %z, %b
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ret float %c
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}
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define amdgpu_vs <5 x float> @test_5xf16_5xf32_add_ext_mul(<5 x half> inreg %x, <5 x half> inreg %y, <5 x float> inreg %z) {
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; GFX9-FAST-DENORM-LABEL: test_5xf16_5xf32_add_ext_mul:
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; GFX9-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX9-FAST-DENORM-NEXT: s_pack_lh_b32_b16 s3, s3, s3
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; GFX9-FAST-DENORM-NEXT: s_pack_lh_b32_b16 s4, s4, s4
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; GFX9-FAST-DENORM-NEXT: s_pack_lh_b32_b16 s0, s0, s0
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; GFX9-FAST-DENORM-NEXT: s_pack_lh_b32_b16 s1, s1, s1
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v0, s3
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v1, s4
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v2, s5
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v0, s0, v0
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v1, s1, v1
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v2, s2, v2
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v3, v0
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v5, v1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v7, v2
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v0, s6, v3
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v1, s7, v4
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v2, s8, v5
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v3, s9, v6
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v4, s10, v7
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; GFX9-FAST-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-FAST-DENORM-LABEL: test_5xf16_5xf32_add_ext_mul:
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; GFX10-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s11, s0, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s12, s1, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s13, s3, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s14, s4, 16
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s11
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v2, s1
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v3, s12
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v4, s2
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v5, s3
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v6, s13
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v7, s4
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v8, s14
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v9, s5
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v0, v0, v5, s6
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v1, v1, v6, s7
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v2, v2, v7, s8
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v3, v3, v8, s9
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v4, v4, v9, s10
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; GFX10-FAST-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast <5 x half> %x, %y
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%b = fpext <5 x half> %a to <5 x float>
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%c = fadd fast <5 x float> %b, %z
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ret <5 x float> %c
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}
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define amdgpu_vs <6 x float> @test_6xf16_6xf32_add_ext_mul_rhs(<6 x half> inreg %x, <6 x half> inreg %y, <6 x float> inreg %z) {
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; GFX9-FAST-DENORM-LABEL: test_6xf16_6xf32_add_ext_mul_rhs:
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; GFX9-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v0, s3
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v1, s4
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; GFX9-FAST-DENORM-NEXT: v_mov_b32_e32 v2, s5
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v0, s0, v0
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v1, s1, v1
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; GFX9-FAST-DENORM-NEXT: v_pk_mul_f16 v2, s2, v2
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v3, v0
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v5, v1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v7, v2
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; GFX9-FAST-DENORM-NEXT: v_cvt_f32_f16_sdwa v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v0, s6, v3
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v1, s7, v4
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v2, s8, v5
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v3, s9, v6
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v4, s10, v7
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; GFX9-FAST-DENORM-NEXT: v_add_f32_e32 v5, s11, v8
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; GFX9-FAST-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-FAST-DENORM-LABEL: test_6xf16_6xf32_add_ext_mul_rhs:
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; GFX10-FAST-DENORM: ; %bb.0: ; %.entry
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s12, s0, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s13, s1, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s14, s2, 16
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v0, s0
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v2, s1
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v4, s2
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s0, s3, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s1, s4, 16
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; GFX10-FAST-DENORM-NEXT: s_lshr_b32 s2, s5, 16
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v1, s12
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v3, s13
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v5, s14
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v6, s3
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v7, s0
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v8, s4
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v9, s1
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v10, s5
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; GFX10-FAST-DENORM-NEXT: v_cvt_f32_f16_e32 v11, s2
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v0, v0, v6, s6
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v1, v1, v7, s7
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v2, v2, v8, s8
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v3, v3, v9, s9
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v4, v4, v10, s10
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; GFX10-FAST-DENORM-NEXT: v_fma_f32 v5, v5, v11, s11
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; GFX10-FAST-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast <6 x half> %x, %y
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%b = fpext <6 x half> %a to <6 x float>
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%c = fadd fast <6 x float> %z, %b
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ret <6 x float> %c
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}
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