forked from OSchip/llvm-project
131 lines
4.3 KiB
LLVM
131 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X64
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; Make sure that we don't crash when legalizing vselect and vsetcc and that
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; we are able to generate vector blend instructions.
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define void @simple_widen(<2 x float> %a, <2 x float> %b) {
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; X32-LABEL: simple_widen:
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; X32: # BB#0: # %entry
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; X32-NEXT: extractps $1, %xmm1, (%eax)
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; X32-NEXT: movss %xmm1, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: simple_widen:
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; X64: # BB#0: # %entry
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; X64-NEXT: movlps %xmm1, (%rax)
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; X64-NEXT: retq
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entry:
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%0 = select <2 x i1> undef, <2 x float> %a, <2 x float> %b
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store <2 x float> %0, <2 x float>* undef
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ret void
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}
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define void @complex_inreg_work(<2 x float> %a, <2 x float> %b) {
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; X32-LABEL: complex_inreg_work:
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; X32: # BB#0: # %entry
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; X32-NEXT: movaps %xmm0, %xmm2
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; X32-NEXT: cmpordps %xmm0, %xmm0
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; X32-NEXT: blendvps %xmm0, %xmm2, %xmm1
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; X32-NEXT: extractps $1, %xmm1, (%eax)
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; X32-NEXT: movss %xmm1, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: complex_inreg_work:
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; X64: # BB#0: # %entry
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; X64-NEXT: movaps %xmm0, %xmm2
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; X64-NEXT: cmpordps %xmm0, %xmm0
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; X64-NEXT: blendvps %xmm0, %xmm2, %xmm1
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; X64-NEXT: movlps %xmm1, (%rax)
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; X64-NEXT: retq
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entry:
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%0 = fcmp oeq <2 x float> undef, undef
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%1 = select <2 x i1> %0, <2 x float> %a, <2 x float> %b
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store <2 x float> %1, <2 x float>* undef
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ret void
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}
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define void @zero_test() {
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; X32-LABEL: zero_test:
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; X32: # BB#0: # %entry
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; X32-NEXT: pxor %xmm0, %xmm0
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; X32-NEXT: pextrd $1, %xmm0, (%eax)
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; X32-NEXT: movd %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: zero_test:
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; X64: # BB#0: # %entry
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movlps %xmm0, (%rax)
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; X64-NEXT: retq
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entry:
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%0 = select <2 x i1> undef, <2 x float> undef, <2 x float> zeroinitializer
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store <2 x float> %0, <2 x float>* undef
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ret void
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}
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define void @full_test() {
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; X32-LABEL: full_test:
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; X32: # BB#0: # %entry
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; X32-NEXT: subl $60, %esp
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; X32-NEXT: .Lcfi0:
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; X32-NEXT: .cfi_def_cfa_offset 64
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; X32-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
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; X32-NEXT: cvttps2dq %xmm2, %xmm0
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; X32-NEXT: cvtdq2ps %xmm0, %xmm1
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: cmpltps %xmm2, %xmm0
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; X32-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u>
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; X32-NEXT: addps %xmm1, %xmm3
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; X32-NEXT: movaps %xmm1, %xmm4
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; X32-NEXT: blendvps %xmm0, %xmm3, %xmm4
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; X32-NEXT: cmpeqps %xmm2, %xmm1
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; X32-NEXT: movaps %xmm1, %xmm0
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; X32-NEXT: blendvps %xmm0, %xmm2, %xmm4
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; X32-NEXT: extractps $1, %xmm4, {{[0-9]+}}(%esp)
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; X32-NEXT: movss %xmm4, {{[0-9]+}}(%esp)
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; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
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; X32-NEXT: addl $60, %esp
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; X32-NEXT: retl
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;
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; X64-LABEL: full_test:
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; X64: # BB#0: # %entry
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; X64-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
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; X64-NEXT: cvttps2dq %xmm2, %xmm0
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; X64-NEXT: cvtdq2ps %xmm0, %xmm1
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: cmpltps %xmm2, %xmm0
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; X64-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u>
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; X64-NEXT: addps %xmm1, %xmm3
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; X64-NEXT: movaps %xmm1, %xmm4
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; X64-NEXT: blendvps %xmm0, %xmm3, %xmm4
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; X64-NEXT: cmpeqps %xmm2, %xmm1
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; X64-NEXT: movaps %xmm1, %xmm0
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; X64-NEXT: blendvps %xmm0, %xmm2, %xmm4
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; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)
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; X64-NEXT: retq
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entry:
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%Cy300 = alloca <4 x float>
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%Cy11a = alloca <2 x float>
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%Cy118 = alloca <2 x float>
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%Cy119 = alloca <2 x float>
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br label %B1
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B1: ; preds = %entry
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%0 = load <2 x float>, <2 x float>* %Cy119
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%1 = fptosi <2 x float> %0 to <2 x i32>
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%2 = sitofp <2 x i32> %1 to <2 x float>
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%3 = fcmp ogt <2 x float> %0, zeroinitializer
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%4 = fadd <2 x float> %2, <float 1.000000e+00, float 1.000000e+00>
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%5 = select <2 x i1> %3, <2 x float> %4, <2 x float> %2
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%6 = fcmp oeq <2 x float> %2, %0
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%7 = select <2 x i1> %6, <2 x float> %0, <2 x float> %5
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store <2 x float> %7, <2 x float>* %Cy118
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%8 = load <2 x float>, <2 x float>* %Cy118
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store <2 x float> %8, <2 x float>* %Cy11a
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ret void
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}
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