forked from OSchip/llvm-project
89 lines
4.7 KiB
C
89 lines
4.7 KiB
C
// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
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// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
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// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
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// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \
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// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
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// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
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// CHECK-LABEL: @bi8(
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// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16
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// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16
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// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
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// CHECK-NEXT: ret <16 x i8> [[SEXT]]
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//
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// ERROR: returning 'int' from a function with incompatible result type
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vector unsigned char bi8(vector bool char a, vector bool char b) {
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return a == b;
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}
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// CHECK-LABEL: @bi16(
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// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16
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// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16
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// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>
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// CHECK-NEXT: ret <8 x i16> [[SEXT]]
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//
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// ERROR: returning 'int' from a function with incompatible result type
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vector bool short bi16(vector bool short a, vector bool short b) {
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return a == b;
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}
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// CHECK-LABEL: @bi32(
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// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16
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// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16
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// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: ret <4 x i32> [[SEXT]]
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//
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// ERROR: returning 'int' from a function with incompatible result type
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vector bool int bi32(vector bool int a, vector bool int b) {
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return a == b;
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}
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// CHECK-LABEL: @bi64(
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// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16
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// CHECK-NEXT: store <2 x i64> [[A:%.*]], <2 x i64>* [[A_ADDR]], align 16
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// CHECK-NEXT: store <2 x i64> [[B:%.*]], <2 x i64>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[A_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
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// CHECK-NEXT: ret <2 x i64> [[SEXT]]
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//
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// ERROR: returning 'int' from a function with incompatible result type
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vector long long bi64(vector bool long long a, vector bool long long b) {
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return a == b;
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}
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// CHECK-LABEL: @VecPixel(
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// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16
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// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16
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// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16
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// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]
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// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>
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// CHECK-NEXT: ret <8 x i16> [[SEXT]]
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//
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// ERROR: returning 'int' from a function with incompatible result type
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vector pixel VecPixel(vector pixel a, vector pixel b) {
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return a == b;
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}
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