forked from OSchip/llvm-project
87 lines
3.7 KiB
C
87 lines
3.7 KiB
C
// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
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// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefixes=CHECK-32B
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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extern unsigned short us;
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extern unsigned int ui;
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extern unsigned short *us_addr;
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extern unsigned int *ui_addr;
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// CHECK-LABEL: @test_builtin_ppc_store2r(
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// CHECK: [[TMP0:%.*]] = load i16, i16* @us, align 2
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// CHECK-NEXT: [[CONV:%.*]] = zext i16 [[TMP0]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = load i16*, i16** @us_addr, align 8
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[TMP1]] to i8*
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// CHECK-NEXT: call void @llvm.ppc.store2r(i32 [[CONV]], i8* [[TMP2]])
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// CHECK-NEXT: ret void
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//
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// CHECK-32B-LABEL: @test_builtin_ppc_store2r(
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// CHECK-32B: [[TMP0:%.*]] = load i16, i16* @us, align 2
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// CHECK-32B-NEXT: [[CONV:%.*]] = zext i16 [[TMP0]] to i32
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// CHECK-32B-NEXT: [[TMP1:%.*]] = load i16*, i16** @us_addr, align 4
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// CHECK-32B-NEXT: [[TMP2:%.*]] = bitcast i16* [[TMP1]] to i8*
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// CHECK-32B-NEXT: call void @llvm.ppc.store2r(i32 [[CONV]], i8* [[TMP2]])
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// CHECK-32B-NEXT: ret void
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//
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void test_builtin_ppc_store2r() {
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__builtin_ppc_store2r(us, us_addr);
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}
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// CHECK-LABEL: @test_builtin_ppc_store4r(
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// CHECK: [[TMP0:%.*]] = load i32, i32* @ui, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** @ui_addr, align 8
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to i8*
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// CHECK-NEXT: call void @llvm.ppc.store4r(i32 [[TMP0]], i8* [[TMP2]])
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// CHECK-NEXT: ret void
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//
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// CHECK-32B-LABEL: @test_builtin_ppc_store4r(
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// CHECK-32B: [[TMP0:%.*]] = load i32, i32* @ui, align 4
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// CHECK-32B-NEXT: [[TMP1:%.*]] = load i32*, i32** @ui_addr, align 4
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// CHECK-32B-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to i8*
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// CHECK-32B-NEXT: call void @llvm.ppc.store4r(i32 [[TMP0]], i8* [[TMP2]])
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// CHECK-32B-NEXT: ret void
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//
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void test_builtin_ppc_store4r() {
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__builtin_ppc_store4r(ui, ui_addr);
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}
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// CHECK-LABEL: @test_builtin_ppc_load2r(
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// CHECK: [[TMP0:%.*]] = load i16*, i16** @us_addr, align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[TMP0]] to i8*
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// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load2r(i8* [[TMP1]])
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// CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[TMP2]] to i16
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// CHECK-NEXT: ret i16 [[CONV]]
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//
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// CHECK-32B-LABEL: @test_builtin_ppc_load2r(
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// CHECK-32B: [[TMP0:%.*]] = load i16*, i16** @us_addr, align 4
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// CHECK-32B-NEXT: [[TMP1:%.*]] = bitcast i16* [[TMP0]] to i8*
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// CHECK-32B-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load2r(i8* [[TMP1]])
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// CHECK-32B-NEXT: [[CONV:%.*]] = trunc i32 [[TMP2]] to i16
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// CHECK-32B-NEXT: ret i16 [[CONV]]
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//
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unsigned short test_builtin_ppc_load2r() {
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return __builtin_ppc_load2r(us_addr);
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}
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// CHECK-LABEL: @test_builtin_ppc_load4r(
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// CHECK: [[TMP0:%.*]] = load i32*, i32** @ui_addr, align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load4r(i8* [[TMP1]])
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// CHECK-NEXT: ret i32 [[TMP2]]
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//
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// CHECK-32B-LABEL: @test_builtin_ppc_load4r(
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// CHECK-32B: [[TMP0:%.*]] = load i32*, i32** @ui_addr, align 4
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// CHECK-32B-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-32B-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load4r(i8* [[TMP1]])
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// CHECK-32B-NEXT: ret i32 [[TMP2]]
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//
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unsigned int test_builtin_ppc_load4r() {
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return __builtin_ppc_load4r(ui_addr);
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}
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