forked from OSchip/llvm-project
32 lines
1.4 KiB
C
32 lines
1.4 KiB
C
// REQUIRES: arm-registered-target
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// RUN: %clang_cc1 -triple thumbv7-apple-darwin9 \
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// RUN: -target-abi apcs-gnu \
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// RUN: -target-cpu cortex-a8 \
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// RUN: -mfloat-abi soft \
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// RUN: -target-feature +soft-float-abi \
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// RUN: -ffreestanding \
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// RUN: -emit-llvm -w -o - %s | FileCheck %s
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#include <arm_neon.h>
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// CHECK: define{{.*}} void @f0(%struct.int8x16x2_t* noalias sret(%struct.int8x16x2_t) align 16 %agg.result, <16 x i8> %{{.*}}, <16 x i8> %{{.*}})
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int8x16x2_t f0(int8x16_t a0, int8x16_t a1) {
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return vzipq_s8(a0, a1);
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}
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// Test direct vector passing.
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typedef float T_float32x2 __attribute__ ((__vector_size__ (8)));
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typedef float T_float32x4 __attribute__ ((__vector_size__ (16)));
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typedef float T_float32x8 __attribute__ ((__vector_size__ (32)));
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typedef float T_float32x16 __attribute__ ((__vector_size__ (64)));
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// CHECK: define{{.*}} <2 x float> @f1_0(<2 x float> %{{.*}})
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T_float32x2 f1_0(T_float32x2 a0) { return a0; }
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// CHECK: define{{.*}} <4 x float> @f1_1(<4 x float> %{{.*}})
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T_float32x4 f1_1(T_float32x4 a0) { return a0; }
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// CHECK: define{{.*}} void @f1_2(<8 x float>* noalias sret(<8 x float>) align 32 %{{.*}}, <8 x float> %{{.*}})
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T_float32x8 f1_2(T_float32x8 a0) { return a0; }
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// CHECK: define{{.*}} void @f1_3(<16 x float>* noalias sret(<16 x float>) align 64 %{{.*}}, <16 x float> %{{.*}})
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T_float32x16 f1_3(T_float32x16 a0) { return a0; }
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