forked from OSchip/llvm-project
161 lines
6.2 KiB
C
161 lines
6.2 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi \
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// RUN: -target-feature +cdecp0 -target-feature +cdecp1 \
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// RUN: -mfloat-abi hard -O0 -disable-O0-optnone \
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// RUN: -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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#include <arm_cde.h>
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// CHECK-LABEL: @test_cx1(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx1(i32 0, i32 123)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx1(void) {
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return __arm_cx1(0, 123);
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}
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// CHECK-LABEL: @test_cx1a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx1a(i32 0, i32 [[ACC:%.*]], i32 345)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx1a(uint32_t acc) {
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return __arm_cx1a(0, acc, 345);
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}
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// CHECK-LABEL: @test_cx1d(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx1d(i32 1, i32 567)
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// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
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// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 32
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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// CHECK-NEXT: ret i64 [[TMP6]]
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//
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uint64_t test_cx1d(void) {
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return __arm_cx1d(1, 567);
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}
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// CHECK-LABEL: @test_cx1da(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 32
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// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i32
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// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx1da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 789)
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32
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// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0
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// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
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// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
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// CHECK-NEXT: ret i64 [[TMP9]]
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//
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uint64_t test_cx1da(uint64_t acc) {
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return __arm_cx1da(0, acc, 789);
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}
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// CHECK-LABEL: @test_cx2(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx2(i32 0, i32 [[N:%.*]], i32 11)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx2(uint32_t n) {
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return __arm_cx2(0, n, 11);
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}
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// CHECK-LABEL: @test_cx2a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx2a(i32 1, i32 [[ACC:%.*]], i32 [[N:%.*]], i32 22)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx2a(uint32_t acc, uint32_t n) {
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return __arm_cx2a(1, acc, n, 22);
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}
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// CHECK-LABEL: @test_cx2d(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx2d(i32 1, i32 [[N:%.*]], i32 33)
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// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
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// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 32
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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// CHECK-NEXT: ret i64 [[TMP6]]
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//
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uint64_t test_cx2d(uint32_t n) {
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return __arm_cx2d(1, n, 33);
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}
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// CHECK-LABEL: @test_cx2da(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 32
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// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i32
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// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx2da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 [[N:%.*]], i32 44)
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32
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// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0
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// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
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// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
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// CHECK-NEXT: ret i64 [[TMP9]]
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//
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uint64_t test_cx2da(uint64_t acc, uint32_t n) {
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return __arm_cx2da(0, acc, n, 44);
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}
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// CHECK-LABEL: @test_cx3(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx3(i32 0, i32 [[N:%.*]], i32 [[M:%.*]], i32 1)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx3(uint32_t n, uint32_t m) {
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return __arm_cx3(0, n, m, 1);
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}
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// CHECK-LABEL: @test_cx3a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.arm.cde.cx3a(i32 1, i32 [[ACC:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 2)
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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uint32_t test_cx3a(uint32_t acc, uint32_t n, uint32_t m) {
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return __arm_cx3a(1, acc, n, m, 2);
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}
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// CHECK-LABEL: @test_cx3d(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = call { i32, i32 } @llvm.arm.cde.cx3d(i32 1, i32 [[N:%.*]], i32 [[M:%.*]], i32 3)
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// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { i32, i32 } [[TMP0]], 1
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// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
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// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 32
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP0]], 0
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP3]], [[TMP5]]
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// CHECK-NEXT: ret i64 [[TMP6]]
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//
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uint64_t test_cx3d(uint32_t n, uint32_t m) {
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return __arm_cx3d(1, n, m, 3);
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}
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// CHECK-LABEL: @test_cx3da(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[ACC:%.*]], 32
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// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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// CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[ACC]] to i32
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// CHECK-NEXT: [[TMP3:%.*]] = call { i32, i32 } @llvm.arm.cde.cx3da(i32 0, i32 [[TMP2]], i32 [[TMP1]], i32 [[N:%.*]], i32 [[M:%.*]], i32 4)
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// CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i32 } [[TMP3]], 1
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// CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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// CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 32
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// CHECK-NEXT: [[TMP7:%.*]] = extractvalue { i32, i32 } [[TMP3]], 0
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// CHECK-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
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// CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
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// CHECK-NEXT: ret i64 [[TMP9]]
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//
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uint64_t test_cx3da(uint64_t acc, uint32_t n, uint32_t m) {
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return __arm_cx3da(0, acc, n, m, 4);
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}
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