Simon Pilgrim 057c9c7ee0 [X86][SSE] MatchVectorAllZeroTest - handle OR vector reductions ... This patch extends MatchVectorAllZeroTest to handle OR vector reduction patterns where the result is compared against zero. Fixes PR45378 Differential Revision: https://reviews.llvm.org/D81547		2020-06-16 09:42:34 +01:00
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AArch64	[AArch64] Print the immediate operand for SPACE pseudo instruction	2020-06-15 20:55:53 -07:00
AMDGPU	[AMDGPU] Add gfx1030 target	2020-06-15 16:18:05 -07:00
ARC	…
ARM	[ARM][MachineOutliner] Fix no-lr-save testcase.	2020-06-15 16:09:31 +02:00
AVR	[AVR][test] Remove test for naked function containing a return.	2020-06-09 09:06:47 +01:00
BPF	[BPF] fix incorrect type in BPFISelDAGToDAG readonly load optimization	2020-06-11 19:31:06 -07:00
Generic	[LLParser] Delete temp CallInst when error occurs	2020-06-16 11:41:25 +08:00
Hexagon	Simplify MachineVerifier's block-successor verification.	2020-06-06 22:30:51 -04:00
Inputs	…
Lanai	…
MIR	[MachineVerifier] Verify that a DBG_VALUE has a debug location	2020-05-28 13:53:40 -07:00
MSP430	…
Mips	[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))	2020-06-12 13:53:08 -04:00
NVPTX	…
PowerPC	[PPCAsmPrinter] support 'L' output template for memory operands	2020-06-15 14:31:44 -07:00
RISCV	[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))	2020-06-12 13:53:08 -04:00
SPARC	[SPARC] Lower fp16 ops to libcalls	2020-06-10 19:15:26 -07:00
SystemZ	[CostModel] Unify Shuffle and InsertElement Costs	2020-06-10 09:13:34 +01:00
Thumb	…
Thumb2	[ARM] Add some MVE vecreduce tests. NFC	2020-06-09 12:07:19 +01:00
VE	[VE] Support relocation information in MC layer	2020-06-15 11:24:53 +02:00
WebAssembly	[WebAssembly] Adding 64-bit versions of all load & store ops.	2020-06-15 08:31:56 -07:00
WinCFGuard	…
WinEH	…
X86	[X86][SSE] MatchVectorAllZeroTest - handle OR vector reductions	2020-06-16 09:42:34 +01:00
XCore	…