forked from OSchip/llvm-project
145 lines
5.4 KiB
C++
145 lines
5.4 KiB
C++
//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that MSP430 uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_MSP430_ISELLOWERING_H
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#define LLVM_TARGET_MSP430_ISELLOWERING_H
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#include "MSP430.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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namespace MSP430ISD {
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enum {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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/// Return with a flag operand. Operand 0 is the chain operand.
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RET_FLAG,
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/// Y = R{R,L}A X, rotate right (left) arithmetically
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RRA, RLA,
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/// Y = RRC X, rotate right via carry
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RRC,
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/// CALL - These operations represent an abstract call
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/// instruction, which includes a bunch of information.
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CALL,
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/// Wrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol,
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/// and TargetGlobalAddress.
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Wrapper,
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/// CMP - Compare instruction.
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CMP,
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/// SetCC. Operand 0 is condition code, and operand 1 is the flag
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/// operand produced by a CMP instruction.
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SETCC,
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/// MSP430 conditional branches. Operand 0 is the chain operand, operand 1
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/// is the block to branch if condition is true, operand 2 is the
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/// condition code, and operand 3 is the flag operand produced by a CMP
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/// instruction.
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BR_CC,
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/// SELECT_CC. Operand 0 and operand 1 are selection variable, operand 3
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/// is condition code and operand 4 is flag operand.
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SELECT_CC
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};
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}
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class MSP430Subtarget;
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class MSP430TargetMachine;
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class MSP430TargetLowering : public TargetLowering {
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public:
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explicit MSP430TargetLowering(MSP430TargetMachine &TM);
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/// LowerOperation - Provide custom lowering hooks for some operations.
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virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
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/// getTargetNodeName - This method returns the name of a target specific
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/// DAG node.
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virtual const char *getTargetNodeName(unsigned Opcode) const;
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/// getFunctionAlignment - Return the Log2 alignment of this function.
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virtual unsigned getFunctionAlignment(const Function *F) const;
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SDValue LowerShifts(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG);
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TargetLowering::ConstraintType
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getConstraintType(const std::string &Constraint) const;
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std::pair<unsigned, const TargetRegisterClass*>
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getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB,
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DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
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private:
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SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg,
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bool isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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SDValue LowerCCCArguments(SDValue Chain,
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CallingConv::ID CallConv,
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bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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DebugLoc dl,
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SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
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CallingConv::ID CallConv, bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerFormalArguments(SDValue Chain,
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CallingConv::ID CallConv, bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerCall(SDValue Chain, SDValue Callee,
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CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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DebugLoc dl, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals);
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virtual SDValue
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LowerReturn(SDValue Chain,
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CallingConv::ID CallConv, bool isVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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DebugLoc dl, SelectionDAG &DAG);
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const MSP430Subtarget &Subtarget;
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const MSP430TargetMachine &TM;
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};
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} // namespace llvm
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#endif // LLVM_TARGET_MSP430_ISELLOWERING_H
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