Craig Topper 053f1eea96 [X86] Remove most of the SEXTLOAD Custom setOperationAction calls under -x86-experimental-vector-widening-legalization. ... Leave just the v4i8->v4i64 and v8i8->v8i64, but only enable them on pre-sse4.1 targets when 64-bit mode is enabled. In those cases we end up creating sext loads that get scalarized to code that looks better than what we get from loading into a vector register and doing a multiple step sign extend using unpacks and shifts. llvm-svn: 347180		2018-11-19 00:33:16 +00:00
..
AArch64	DAG combiner: fold (select, C, X, undef) -> X	2018-11-16 23:13:38 +00:00
AMDGPU	[DAG] add undef simplifications for select nodes	2018-11-18 17:36:23 +00:00
ARC	…
ARM	[ARM] make test immune to improvements in undef simplification	2018-11-18 16:49:42 +00:00
AVR	[AVR] Reorder the CHECK lines in directmem.ll to match current trunk	2018-11-09 23:17:59 +00:00
BPF	[bpf] Test case for symbol information in object file	2018-09-22 17:31:01 +00:00
Generic	Moved dag-combine-select-undef.ll into amdgpu. NFC.	2018-11-17 00:17:15 +00:00
Hexagon	[Hexagon] make tests immune to improvements in undef simplification	2018-11-18 16:50:16 +00:00
Inputs	…
Lanai	…
MIR	[Power9] Allow gpr callee saved spills in prologue to vectors registers	2018-11-09 16:36:24 +00:00
MSP430	[MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls	2018-11-16 19:36:15 +00:00
Mips	[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars	2018-11-09 18:04:34 +00:00
NVPTX	…
Nios2	…
PowerPC	[PowerPC][NFC] Add tests for vector fp <-> int conversions	2018-11-16 20:24:10 +00:00
RISCV	[RISCV] Constant materialisation for RV64I	2018-11-16 10:14:16 +00:00
SPARC	Relax fast register allocator related test cases; NFC	2018-10-29 20:10:42 +00:00
SystemZ	[SystemZ] make test immune to improvements in undef simplification	2018-11-18 16:50:44 +00:00
Thumb	[SelectionDAG] swap select_cc operands to enable folding	2018-11-09 11:09:40 +00:00
Thumb2	[ARM] Enable spilling of the hGPR register class in Thumb2	2018-11-08 13:02:10 +00:00
WebAssembly	[WebAssembly] Add null streamer support	2018-11-18 11:58:47 +00:00
WinCFGuard	[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables	2018-09-19 09:58:30 +00:00
WinEH	…
X86	[X86] Remove most of the SEXTLOAD Custom setOperationAction calls under -x86-experimental-vector-widening-legalization.	2018-11-19 00:33:16 +00:00
XCore	Relax fast register allocator related test cases; NFC	2018-10-29 20:10:42 +00:00