forked from OSchip/llvm-project
45 lines
1.7 KiB
ArmAsm
45 lines
1.7 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ld1rsb { z0.h }, p0/z, [x0]
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// CHECK-INST: ld1rsb { z0.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xc0,0xc0,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 c0 c0 85 <unknown>
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ld1rsb { z0.s }, p0/z, [x0]
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// CHECK-INST: ld1rsb { z0.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0xc0,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 c0 85 <unknown>
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ld1rsb { z0.d }, p0/z, [x0]
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// CHECK-INST: ld1rsb { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0x80,0xc0,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 c0 85 <unknown>
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ld1rsb { z31.h }, p7/z, [sp, #63]
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// CHECK-INST: ld1rsb { z31.h }, p7/z, [sp, #63]
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// CHECK-ENCODING: [0xff,0xdf,0xff,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff df ff 85 <unknown>
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ld1rsb { z31.s }, p7/z, [sp, #63]
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// CHECK-INST: ld1rsb { z31.s }, p7/z, [sp, #63]
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// CHECK-ENCODING: [0xff,0xbf,0xff,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf ff 85 <unknown>
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ld1rsb { z31.d }, p7/z, [sp, #63]
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// CHECK-INST: ld1rsb { z31.d }, p7/z, [sp, #63]
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// CHECK-ENCODING: [0xff,0x9f,0xff,0x85]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 9f ff 85 <unknown>
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