forked from OSchip/llvm-project
339 lines
11 KiB
LLVM
339 lines
11 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=pitcairn < %s | FileCheck -enable-var-scope -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -enable-var-scope -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}v_test_imax_sge_i32:
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; SI: v_max_i32_e32
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; EG: MAX_INT
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define amdgpu_kernel void @v_test_imax_sge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep.in = getelementptr inbounds i32, i32 addrspace(1)* %bptr, i32 %tid
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%a = load i32, i32 addrspace(1)* %aptr, align 4
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%b = load i32, i32 addrspace(1)* %gep.in, align 4
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%cmp = icmp sge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_test_imax_sge_v4i32:
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; SI: v_max_i32_e32
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; SI: v_max_i32_e32
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; SI: v_max_i32_e32
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; SI: v_max_i32_e32
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; These could be merged into one
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; EG: MAX_INT
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; EG: MAX_INT
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; EG: MAX_INT
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; EG: MAX_INT
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define amdgpu_kernel void @v_test_imax_sge_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %aptr, <4 x i32> addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %bptr, i32 %tid
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%a = load <4 x i32>, <4 x i32> addrspace(1)* %aptr, align 4
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%b = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in, align 4
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%cmp = icmp sge <4 x i32> %a, %b
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%val = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b
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store <4 x i32> %val, <4 x i32> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_imax_sge_i32
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; SI: s_max_i32
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; EG: MAX_INT
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define amdgpu_kernel void @s_test_imax_sge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp sge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_imax_sge_imm_i32:
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; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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define amdgpu_kernel void @s_test_imax_sge_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
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%cmp = icmp sge i32 %a, 9
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%val = select i1 %cmp, i32 %a, i32 9
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_test_imax_sge_i8:
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; SI: buffer_load_sbyte
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; SI: buffer_load_sbyte
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; SI: v_max_i32_e32
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; EG: MAX_INT
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define amdgpu_kernel void @v_test_imax_sge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
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%a = load i8, i8 addrspace(1)* %aptr, align 1
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%b = load i8, i8 addrspace(1)* %bptr, align 1
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%cmp = icmp sge i8 %a, %b
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%val = select i1 %cmp, i8 %a, i8 %b
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store i8 %val, i8 addrspace(1)* %out, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_i32:
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; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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define amdgpu_kernel void @s_test_imax_sgt_imm_i32(i32 addrspace(1)* %out, i32 %a) nounwind {
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%cmp = icmp sgt i32 %a, 9
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%val = select i1 %cmp, i32 %a, i32 9
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_imax_sgt_imm_v2i32:
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; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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; SI: s_max_i32 {{s[0-9]+}}, {{s[0-9]+}}, 9
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; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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; EG: MAX_INT {{.*}}literal.{{[xyzw]}}
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define amdgpu_kernel void @s_test_imax_sgt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
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%cmp = icmp sgt <2 x i32> %a, <i32 9, i32 9>
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%val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 9, i32 9>
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store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_test_imax_sgt_i32
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; SI: v_max_i32_e32
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; EG: MAX_INT
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define amdgpu_kernel void @v_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep.in = getelementptr inbounds i32, i32 addrspace(1)* %bptr, i32 %tid
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%a = load i32, i32 addrspace(1)* %aptr, align 4
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%b = load i32, i32 addrspace(1)* %gep.in, align 4
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%cmp = icmp sgt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_imax_sgt_i32
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; SI: s_max_i32
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; EG: MAX_INT
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define amdgpu_kernel void @s_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp sgt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_test_umax_uge_i32
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; SI: v_max_u32_e32
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; EG: MAX_UINT
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define amdgpu_kernel void @v_test_umax_uge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep.in = getelementptr inbounds i32, i32 addrspace(1)* %bptr, i32 %tid
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%a = load i32, i32 addrspace(1)* %aptr, align 4
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%b = load i32, i32 addrspace(1)* %gep.in, align 4
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%cmp = icmp uge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_umax_uge_i32
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; SI: s_max_u32
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; EG: MAX_UINT
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define amdgpu_kernel void @s_test_umax_uge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp uge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_umax_uge_v3i32:
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; SI: s_max_u32
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; SI: s_max_u32
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; SI: s_max_u32
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; SI-NOT: s_max_u32
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; SI: s_endpgm
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; EG: MAX_UINT
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; EG: MAX_UINT
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; EG: MAX_UINT
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; EG-NOT: MAX_UINT
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define amdgpu_kernel void @s_test_umax_uge_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a, <3 x i32> %b) nounwind {
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%cmp = icmp uge <3 x i32> %a, %b
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%val = select <3 x i1> %cmp, <3 x i32> %a, <3 x i32> %b
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store <3 x i32> %val, <3 x i32> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_test_umax_uge_i8:
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; SI: buffer_load_ubyte
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; SI: buffer_load_ubyte
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; SI: v_max_u32_e32
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; EG: MAX_UINT
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define amdgpu_kernel void @v_test_umax_uge_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %aptr, i8 addrspace(1)* %bptr) nounwind {
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%a = load i8, i8 addrspace(1)* %aptr, align 1
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%b = load i8, i8 addrspace(1)* %bptr, align 1
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%cmp = icmp uge i8 %a, %b
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%val = select i1 %cmp, i8 %a, i8 %b
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store i8 %val, i8 addrspace(1)* %out, align 1
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ret void
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}
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; FUNC-LABEL: @v_test_umax_ugt_i32
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; SI: v_max_u32_e32
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; EG: MAX_UINT
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define amdgpu_kernel void @v_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%gep.in = getelementptr inbounds i32, i32 addrspace(1)* %bptr, i32 %tid
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%a = load i32, i32 addrspace(1)* %gep.in, align 4
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%b = load i32, i32 addrspace(1)* %bptr, align 4
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%cmp = icmp ugt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_umax_ugt_i32:
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; SI: s_max_u32
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; EG: MAX_UINT
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define amdgpu_kernel void @s_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp ugt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_umax_ugt_imm_v2i32:
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; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 15
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; SI-DAG: s_max_u32 {{s[0-9]+}}, {{s[0-9]+}}, 23
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; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
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; EG: MAX_UINT {{.*}}literal.{{[xyzw]}}
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define amdgpu_kernel void @s_test_umax_ugt_imm_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a) nounwind {
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%cmp = icmp ugt <2 x i32> %a, <i32 15, i32 23>
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%val = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> <i32 15, i32 23>
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store <2 x i32> %val, <2 x i32> addrspace(1)* %out, align 4
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ret void
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}
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; Make sure redundant and removed
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; FUNC-LABEL: {{^}}simplify_demanded_bits_test_umax_ugt_i16:
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; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x13
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; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x1c
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; SI: s_max_u32 [[MAX:s[0-9]+]], [[A]], [[B]]
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; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
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; SI: buffer_store_dword [[VMAX]]
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; EG: MAX_UINT
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define amdgpu_kernel void @simplify_demanded_bits_test_umax_ugt_i16(i32 addrspace(1)* %out, [8 x i32], i16 zeroext %a, [8 x i32], i16 zeroext %b) nounwind {
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%a.ext = zext i16 %a to i32
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%b.ext = zext i16 %b to i32
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%cmp = icmp ugt i32 %a.ext, %b.ext
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%val = select i1 %cmp, i32 %a.ext, i32 %b.ext
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%mask = and i32 %val, 65535
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store i32 %mask, i32 addrspace(1)* %out
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ret void
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}
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; Make sure redundant sign_extend_inreg removed.
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; FUNC-LABEL: {{^}}simplify_demanded_bits_test_max_slt_i16:
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; SI-DAG: s_load_dword [[A:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x13
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; SI-DAG: s_load_dword [[B:s[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 0x1c
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; SI-DAG: s_sext_i32_i16 [[EXT_A:s[0-9]+]], [[A]]
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; SI-DAG: s_sext_i32_i16 [[EXT_B:s[0-9]+]], [[B]]
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; SI: s_max_i32 [[MAX:s[0-9]+]], [[EXT_A]], [[EXT_B]]
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; SI: v_mov_b32_e32 [[VMAX:v[0-9]+]], [[MAX]]
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; SI: buffer_store_dword [[VMAX]]
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; EG: MAX_INT
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define amdgpu_kernel void @simplify_demanded_bits_test_max_slt_i16(i32 addrspace(1)* %out, [8 x i32], i16 signext %a, [8 x i32], i16 signext %b) nounwind {
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%a.ext = sext i16 %a to i32
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%b.ext = sext i16 %b to i32
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%cmp = icmp sgt i32 %a.ext, %b.ext
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%val = select i1 %cmp, i32 %a.ext, i32 %b.ext
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%shl = shl i32 %val, 16
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%sextinreg = ashr i32 %shl, 16
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store i32 %sextinreg, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_test_imax_sge_i16:
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; SI: s_load_dword
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; SI: s_load_dword
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; SI: s_sext_i32_i16
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; SI: s_sext_i32_i16
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; SI: s_max_i32
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; EG: MAX_INT
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define amdgpu_kernel void @s_test_imax_sge_i16(i16 addrspace(1)* %out, [8 x i32], i16 %a, [8 x i32], i16 %b) nounwind {
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%cmp = icmp sge i16 %a, %b
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%val = select i1 %cmp, i16 %a, i16 %b
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store i16 %val, i16 addrspace(1)* %out
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ret void
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}
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; 64 bit
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; FUNC-LABEL: {{^}}test_umax_ugt_i64
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; SI: s_endpgm
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; EG: MAX_UINT
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; EG: MAX_UINT
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define amdgpu_kernel void @test_umax_ugt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%tmp = icmp ugt i64 %a, %b
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%val = select i1 %tmp, i64 %a, i64 %b
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}test_umax_uge_i64
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; SI: s_endpgm
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; EG: MAX_UINT
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; EG: MAX_UINT
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define amdgpu_kernel void @test_umax_uge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%tmp = icmp uge i64 %a, %b
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%val = select i1 %tmp, i64 %a, i64 %b
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}test_imax_sgt_i64
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; SI: s_endpgm
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; EG-DAG: MAX_UINT
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; EG-DAG: MAX_INT
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define amdgpu_kernel void @test_imax_sgt_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%tmp = icmp sgt i64 %a, %b
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%val = select i1 %tmp, i64 %a, i64 %b
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}test_imax_sge_i64
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; SI: s_endpgm
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; EG-DAG: MAX_UINT
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; EG-DAG: MAX_INT
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define amdgpu_kernel void @test_imax_sge_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%tmp = icmp sge i64 %a, %b
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%val = select i1 %tmp, i64 %a, i64 %b
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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