llvm-project/mlir/test/Conversion
Tobias Gysi b614ada0e8 [mlir] add support for index type in vectors.
The patch enables the use of index type in vectors. It is a prerequisite to support vectorization for indexed Linalg operations. This refactoring became possible due to the newly introduced data layout infrastructure. The data layout of a module defines the bitwidth of the index type needed to verify bitcasts and similar vector operations.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D99948
2021-04-08 08:17:13 +00:00
..
AffineToStandard [mlir] Fix support for lowering non-32-bit affine reductions. 2021-04-06 14:00:15 +02:00
ArmSVEToLLVM [mlir] make vector to llvm conversion truly partial 2021-02-04 11:33:24 +01:00
AsyncToLLVM [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
ComplexToLLVM [mlir] turn complex-to-llvm into a partial conversion 2021-01-28 19:14:01 +01:00
GPUCommon [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
GPUToCUDA [mlir] Change test-gpu-to-cubin to derive from SerializeToBlobPass 2021-03-11 10:42:20 +01:00
GPUToNVVM Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions. 2021-02-16 10:23:42 +01:00
GPUToROCDL Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions. 2021-02-16 10:23:42 +01:00
GPUToROCm [mlir] Remove mlir-rocm-runner 2021-03-19 00:24:10 -07:00
GPUToSPIRV [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
GPUToVulkan [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
LinalgToSPIRV [MLIR][SPIRV] Rename `spv.selection` to `spv.mlir.selection`. 2021-03-06 16:05:31 +01:00
LinalgToVector [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds". 2021-03-31 18:04:22 +09:00
OpenMPToLLVM [MLIR][OpenMP] Pretty printer and parser for omp.wsloop 2021-03-18 13:37:01 +00:00
PDLToPDLInterp [mlir][PDL] Add support for variadic operands and results in the PDL Interpreter 2021-03-16 13:20:19 -07:00
SCFToGPU [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
SCFToOpenMP [MLIR][OpenMP] Pretty printer and parser for omp.wsloop 2021-03-18 13:37:01 +00:00
SCFToSPIRV [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
SCFToStandard [mlir][OpFormatGen] Format enum attribute cases as keywords when possible 2021-01-14 11:35:49 -08:00
SPIRVToLLVM [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
ShapeToStandard [MLIR] Create memref dialect and move dialect-specific ops from std. 2021-03-15 11:14:09 +01:00
StandardToLLVM [mlir] add support for index type in vectors. 2021-04-08 08:17:13 +00:00
StandardToSPIRV [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds". 2021-03-31 18:04:22 +09:00
TosaToLinalg [mlir][tosa] Add tosa.table lowering to linalg.generic 2021-04-06 13:57:18 -07:00
TosaToSCF [MLIR][TOSA] Resubmit Tosa to Standard/SCF Lowerings (const, if, while)" 2021-02-26 17:44:12 -08:00
TosaToStandard [mlir][tosa] Add lowering for tosa.rescale to linalg.generic 2021-03-18 16:14:05 -07:00
VectorToLLVM [mlir] add support for index type in vectors. 2021-04-08 08:17:13 +00:00
VectorToROCDL [mlir] use built-in vector types instead of LLVM dialect types when possible 2021-01-12 10:04:28 +01:00
VectorToSCF [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds". 2021-03-31 18:04:22 +09:00
VectorToSPIRV [mlir][spirv] Add more vector conversion patterns 2021-02-05 09:11:16 -05:00