forked from OSchip/llvm-project
20 lines
668 B
ArmAsm
20 lines
668 B
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// input should be a 64bit scalar register
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dup z0.d, w0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: dup z0.d, w0
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// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
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// wzr is not a valid operand to dup
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dup z0.s, wzr
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: dup z0.s, wzr
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// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
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// xzr is not a valid operand to dup
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dup z0.d, xzr
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: dup z0.d, xzr
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// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
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