forked from OSchip/llvm-project
400 lines
14 KiB
C++
400 lines
14 KiB
C++
//===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.cpp - MIBuilder--*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the MachineIRBuidler class.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOpcodes.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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void MachineIRBuilder::setMF(MachineFunction &MF) {
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this->MF = &MF;
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this->MBB = nullptr;
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this->MRI = &MF.getRegInfo();
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this->TII = MF.getSubtarget().getInstrInfo();
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this->DL = DebugLoc();
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this->MI = nullptr;
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this->InsertedInstr = nullptr;
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}
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void MachineIRBuilder::setMBB(MachineBasicBlock &MBB, bool Beginning) {
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this->MBB = &MBB;
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Before = Beginning;
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assert(&getMF() == MBB.getParent() &&
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"Basic block is in a different function");
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}
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void MachineIRBuilder::setInstr(MachineInstr &MI, bool Before) {
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assert(MI.getParent() && "Instruction is not part of a basic block");
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setMBB(*MI.getParent());
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this->MI = &MI;
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this->Before = Before;
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}
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MachineBasicBlock::iterator MachineIRBuilder::getInsertPt() {
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if (MI) {
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if (Before)
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return MI;
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if (!MI->getNextNode())
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return getMBB().end();
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return MI->getNextNode();
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}
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return Before ? getMBB().begin() : getMBB().end();
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}
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void MachineIRBuilder::recordInsertions(
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std::function<void(MachineInstr *)> Inserted) {
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InsertedInstr = Inserted;
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}
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void MachineIRBuilder::stopRecordingInsertions() {
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InsertedInstr = nullptr;
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}
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//------------------------------------------------------------------------------
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// Build instruction variants.
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//------------------------------------------------------------------------------
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MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) {
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MachineInstrBuilder MIB = BuildMI(getMF(), DL, getTII().get(Opcode));
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getMBB().insert(getInsertPt(), MIB);
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if (InsertedInstr)
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InsertedInstr(MIB);
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildFrameIndex(unsigned Res, int Idx) {
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assert(MRI->getType(Res).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_FRAME_INDEX)
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.addDef(Res)
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.addFrameIndex(Idx);
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}
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MachineInstrBuilder MachineIRBuilder::buildAdd(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_ADD)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildGEP(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert(MRI->getType(Res).isPointer() &&
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MRI->getType(Res) == MRI->getType(Op0) && "type mismatch");
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assert(MRI->getType(Op1).isScalar() && "invalid offset type");
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return buildInstr(TargetOpcode::G_GEP)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildSub(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_SUB)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildMul(unsigned Res, unsigned Op0,
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unsigned Op1) {
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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return buildInstr(TargetOpcode::G_MUL)
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.addDef(Res)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildBr(MachineBasicBlock &Dest) {
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return buildInstr(TargetOpcode::G_BR).addMBB(&Dest);
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}
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MachineInstrBuilder MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) {
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return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res, int64_t Val) {
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assert(MRI->getType(Res).isScalar() && "invalid operand type");
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return buildInstr(TargetOpcode::G_CONSTANT).addDef(Res).addImm(Val);
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}
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MachineInstrBuilder MachineIRBuilder::buildFConstant(unsigned Res,
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const ConstantFP &Val) {
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assert(MRI->getType(Res).isScalar() && "invalid operand type");
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return buildInstr(TargetOpcode::G_FCONSTANT).addDef(Res).addFPImm(&Val);
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}
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MachineInstrBuilder MachineIRBuilder::buildBrCond(unsigned Tst,
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MachineBasicBlock &Dest) {
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assert(MRI->getType(Tst).isScalar() && "invalid operand type");
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return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest);
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}
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MachineInstrBuilder MachineIRBuilder::buildLoad(unsigned Res, unsigned Addr,
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MachineMemOperand &MMO) {
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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assert(MRI->getType(Addr).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_LOAD)
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.addDef(Res)
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.addUse(Addr)
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.addMemOperand(&MMO);
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}
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MachineInstrBuilder MachineIRBuilder::buildStore(unsigned Val, unsigned Addr,
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MachineMemOperand &MMO) {
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assert(MRI->getType(Val).isValid() && "invalid operand type");
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assert(MRI->getType(Addr).isPointer() && "invalid operand type");
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return buildInstr(TargetOpcode::G_STORE)
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.addUse(Val)
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.addUse(Addr)
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.addMemOperand(&MMO);
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}
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MachineInstrBuilder MachineIRBuilder::buildUAdde(unsigned Res,
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unsigned CarryOut,
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unsigned Op0, unsigned Op1,
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unsigned CarryIn) {
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assert(MRI->getType(Res).isScalar() && "invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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assert(MRI->getType(CarryOut).isScalar() && "invalid operand type");
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assert(MRI->getType(CarryOut) == MRI->getType(CarryIn) && "type mismatch");
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return buildInstr(TargetOpcode::G_UADDE)
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.addDef(Res)
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.addDef(CarryOut)
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.addUse(Op0)
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.addUse(Op1)
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.addUse(CarryIn);
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}
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MachineInstrBuilder MachineIRBuilder::buildAnyExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_ANYEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildSExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_SEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildZExt(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, true);
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return buildInstr(TargetOpcode::G_ZEXT).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(unsigned Res,
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unsigned Op) {
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unsigned Opcode = TargetOpcode::COPY;
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if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_SEXT;
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else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits())
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Opcode = TargetOpcode::G_TRUNC;
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return buildInstr(Opcode).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildExtract(ArrayRef<unsigned> Results,
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ArrayRef<uint64_t> Indices,
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unsigned Src) {
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#ifndef NDEBUG
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assert(Results.size() == Indices.size() && "inconsistent number of regs");
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assert(!Results.empty() && "invalid trivial extract");
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assert(std::is_sorted(Indices.begin(), Indices.end()) &&
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"extract offsets must be in ascending order");
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assert(MRI->getType(Src).isValid() && "invalid operand type");
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for (auto Res : Results)
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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#endif
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auto MIB = BuildMI(getMF(), DL, getTII().get(TargetOpcode::G_EXTRACT));
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for (auto Res : Results)
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MIB.addDef(Res);
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MIB.addUse(Src);
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for (auto Idx : Indices)
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MIB.addImm(Idx);
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getMBB().insert(getInsertPt(), MIB);
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if (InsertedInstr)
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InsertedInstr(MIB);
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return MIB;
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}
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MachineInstrBuilder
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MachineIRBuilder::buildSequence(unsigned Res,
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ArrayRef<unsigned> Ops,
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ArrayRef<unsigned> Indices) {
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#ifndef NDEBUG
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assert(Ops.size() == Indices.size() && "incompatible args");
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assert(!Ops.empty() && "invalid trivial sequence");
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assert(std::is_sorted(Indices.begin(), Indices.end()) &&
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"sequence offsets must be in ascending order");
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assert(MRI->getType(Res).isValid() && "invalid operand type");
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for (auto Op : Ops)
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assert(MRI->getType(Op).isValid() && "invalid operand type");
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#endif
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MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_SEQUENCE);
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MIB.addDef(Res);
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for (unsigned i = 0; i < Ops.size(); ++i) {
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MIB.addUse(Ops[i]);
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MIB.addImm(Indices[i]);
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}
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
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unsigned Res,
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bool HasSideEffects) {
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auto MIB =
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buildInstr(HasSideEffects ? TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS
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: TargetOpcode::G_INTRINSIC);
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if (Res)
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MIB.addDef(Res);
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MIB.addIntrinsicID(ID);
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildTrunc(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, false);
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return buildInstr(TargetOpcode::G_TRUNC).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildFPTrunc(unsigned Res, unsigned Op) {
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validateTruncExt(Res, Op, false);
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return buildInstr(TargetOpcode::G_FPTRUNC).addDef(Res).addUse(Op);
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}
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MachineInstrBuilder MachineIRBuilder::buildICmp(CmpInst::Predicate Pred,
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unsigned Res, unsigned Op0,
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unsigned Op1) {
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#ifndef NDEBUG
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assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Op0) == MRI->getType(Op0) && "type mismatch");
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assert(CmpInst::isIntPredicate(Pred) && "invalid predicate");
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if (MRI->getType(Op0).isScalar())
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assert(MRI->getType(Res).isScalar() && "type mismatch");
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else
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assert(MRI->getType(Res).isVector() &&
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MRI->getType(Res).getNumElements() ==
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MRI->getType(Op0).getNumElements() &&
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"type mismatch");
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#endif
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return buildInstr(TargetOpcode::G_ICMP)
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.addDef(Res)
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.addPredicate(Pred)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildFCmp(CmpInst::Predicate Pred,
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unsigned Res, unsigned Op0,
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unsigned Op1) {
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#ifndef NDEBUG
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assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Op0) == MRI->getType(Op1) && "type mismatch");
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assert(CmpInst::isFPPredicate(Pred) && "invalid predicate");
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if (MRI->getType(Op0).isScalar())
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assert(MRI->getType(Res).isScalar() && "type mismatch");
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else
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assert(MRI->getType(Res).isVector() &&
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MRI->getType(Res).getNumElements() ==
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MRI->getType(Op0).getNumElements() &&
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"type mismatch");
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#endif
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return buildInstr(TargetOpcode::G_FCMP)
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.addDef(Res)
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.addPredicate(Pred)
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.addUse(Op0)
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.addUse(Op1);
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}
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MachineInstrBuilder MachineIRBuilder::buildSelect(unsigned Res, unsigned Tst,
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unsigned Op0, unsigned Op1) {
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#ifndef NDEBUG
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assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
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"invalid operand type");
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assert(MRI->getType(Res) == MRI->getType(Op0) &&
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MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
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if (MRI->getType(Res).isScalar())
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assert(MRI->getType(Tst).isScalar() && "type mismatch");
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else
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assert(MRI->getType(Tst).isVector() &&
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MRI->getType(Tst).getNumElements() ==
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MRI->getType(Op0).getNumElements() &&
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"type mismatch");
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#endif
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return buildInstr(TargetOpcode::G_SELECT)
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.addDef(Res)
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.addUse(Tst)
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.addUse(Op0)
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.addUse(Op1);
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}
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void MachineIRBuilder::validateTruncExt(unsigned Dst, unsigned Src,
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bool IsExtend) {
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#ifndef NDEBUG
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LLT SrcTy = MRI->getType(Src);
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LLT DstTy = MRI->getType(Dst);
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if (DstTy.isVector()) {
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assert(SrcTy.isVector() && "mismatched cast between vecot and non-vector");
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assert(SrcTy.getNumElements() == DstTy.getNumElements() &&
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"different number of elements in a trunc/ext");
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} else
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assert(DstTy.isScalar() && SrcTy.isScalar() && "invalid extend/trunc");
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if (IsExtend)
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assert(DstTy.getSizeInBits() > SrcTy.getSizeInBits() &&
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"invalid narrowing extend");
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else
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assert(DstTy.getSizeInBits() < SrcTy.getSizeInBits() &&
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"invalid widening trunc");
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#endif
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}
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