forked from OSchip/llvm-project
427 lines
9.8 KiB
LLVM
427 lines
9.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
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; CHECK-LABEL: sitof32
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; CHECK: vcvtdq2ps %zmm
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; CHECK: ret
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define <16 x float> @sitof32(<16 x i32> %a) nounwind {
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%b = sitofp <16 x i32> %a to <16 x float>
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ret <16 x float> %b
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}
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; CHECK-LABEL: sltof864
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; CHECK: vcvtqq2pd
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define <8 x double> @sltof864(<8 x i64> %a) {
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%b = sitofp <8 x i64> %a to <8 x double>
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ret <8 x double> %b
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}
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; CHECK-LABEL: sltof464
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; CHECK: vcvtqq2pd
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define <4 x double> @sltof464(<4 x i64> %a) {
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%b = sitofp <4 x i64> %a to <4 x double>
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ret <4 x double> %b
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}
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; CHECK-LABEL: sltof2f32
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; CHECK: vcvtqq2ps
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define <2 x float> @sltof2f32(<2 x i64> %a) {
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%b = sitofp <2 x i64> %a to <2 x float>
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ret <2 x float>%b
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}
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; CHECK-LABEL: sltof4f32_mem
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; CHECK: vcvtqq2psy (%rdi)
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define <4 x float> @sltof4f32_mem(<4 x i64>* %a) {
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%a1 = load <4 x i64>, <4 x i64>* %a, align 8
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%b = sitofp <4 x i64> %a1 to <4 x float>
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ret <4 x float>%b
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}
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; CHECK-LABEL: f64tosl
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; CHECK: vcvttpd2qq
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define <4 x i64> @f64tosl(<4 x double> %a) {
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%b = fptosi <4 x double> %a to <4 x i64>
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ret <4 x i64> %b
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}
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; CHECK-LABEL: f32tosl
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; CHECK: vcvttps2qq
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define <4 x i64> @f32tosl(<4 x float> %a) {
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%b = fptosi <4 x float> %a to <4 x i64>
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ret <4 x i64> %b
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}
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; CHECK-LABEL: sltof432
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; CHECK: vcvtqq2ps
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define <4 x float> @sltof432(<4 x i64> %a) {
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%b = sitofp <4 x i64> %a to <4 x float>
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ret <4 x float> %b
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}
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; CHECK-LABEL: ultof432
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; CHECK: vcvtuqq2ps
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define <4 x float> @ultof432(<4 x i64> %a) {
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%b = uitofp <4 x i64> %a to <4 x float>
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ret <4 x float> %b
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}
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; CHECK-LABEL: ultof64
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; CHECK: vcvtuqq2pd
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define <8 x double> @ultof64(<8 x i64> %a) {
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%b = uitofp <8 x i64> %a to <8 x double>
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ret <8 x double> %b
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}
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; CHECK-LABEL: fptosi00
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; CHECK: vcvttps2dq %zmm
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; CHECK: ret
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define <16 x i32> @fptosi00(<16 x float> %a) nounwind {
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%b = fptosi <16 x float> %a to <16 x i32>
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ret <16 x i32> %b
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}
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; CHECK-LABEL: fptoui00
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; CHECK: vcvttps2udq
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; CHECK: ret
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define <16 x i32> @fptoui00(<16 x float> %a) nounwind {
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%b = fptoui <16 x float> %a to <16 x i32>
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ret <16 x i32> %b
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}
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; CHECK-LABEL: fptoui_256
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; CHECK: vcvttps2udq
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; CHECK: ret
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define <8 x i32> @fptoui_256(<8 x float> %a) nounwind {
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%b = fptoui <8 x float> %a to <8 x i32>
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ret <8 x i32> %b
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}
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; CHECK-LABEL: fptoui_128
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; CHECK: vcvttps2udq
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; CHECK: ret
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define <4 x i32> @fptoui_128(<4 x float> %a) nounwind {
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%b = fptoui <4 x float> %a to <4 x i32>
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ret <4 x i32> %b
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}
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; CHECK-LABEL: fptoui01
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; CHECK: vcvttpd2udq
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; CHECK: ret
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define <8 x i32> @fptoui01(<8 x double> %a) nounwind {
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%b = fptoui <8 x double> %a to <8 x i32>
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ret <8 x i32> %b
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}
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; CHECK-LABEL: sitof64
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; CHECK: vcvtdq2pd %ymm
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; CHECK: ret
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define <8 x double> @sitof64(<8 x i32> %a) {
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%b = sitofp <8 x i32> %a to <8 x double>
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ret <8 x double> %b
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}
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; CHECK-LABEL: fptosi01
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; CHECK: vcvttpd2dq %zmm
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; CHECK: ret
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define <8 x i32> @fptosi01(<8 x double> %a) {
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%b = fptosi <8 x double> %a to <8 x i32>
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ret <8 x i32> %b
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}
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; CHECK-LABEL: fptosi03
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; CHECK: vcvttpd2dq %ymm
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; CHECK: ret
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define <4 x i32> @fptosi03(<4 x double> %a) {
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%b = fptosi <4 x double> %a to <4 x i32>
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ret <4 x i32> %b
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}
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; CHECK-LABEL: fptrunc00
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; CHECK: vcvtpd2ps %zmm
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; CHECK-NEXT: vcvtpd2ps %zmm
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; CHECK-NEXT: vinsertf
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; CHECK: ret
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define <16 x float> @fptrunc00(<16 x double> %b) nounwind {
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%a = fptrunc <16 x double> %b to <16 x float>
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ret <16 x float> %a
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}
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; CHECK-LABEL: fptrunc01
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; CHECK: vcvtpd2ps %ymm
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define <4 x float> @fptrunc01(<4 x double> %b) {
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%a = fptrunc <4 x double> %b to <4 x float>
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ret <4 x float> %a
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}
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; CHECK-LABEL: fptrunc02
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; CHECK: vcvtpd2ps %ymm0, %xmm0 {%k1} {z}
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define <4 x float> @fptrunc02(<4 x double> %b, <4 x i1> %mask) {
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%a = fptrunc <4 x double> %b to <4 x float>
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%c = select <4 x i1>%mask, <4 x float>%a, <4 x float> zeroinitializer
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ret <4 x float> %c
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}
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; CHECK-LABEL: fpext00
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; CHECK: vcvtps2pd %ymm0, %zmm0
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; CHECK: ret
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define <8 x double> @fpext00(<8 x float> %b) nounwind {
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%a = fpext <8 x float> %b to <8 x double>
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ret <8 x double> %a
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}
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; CHECK-LABEL: fpext01
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; CHECK: vcvtps2pd %xmm0, %ymm0 {%k1} {z}
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; CHECK: ret
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define <4 x double> @fpext01(<4 x float> %b, <4 x double>%b1, <4 x double>%a1) {
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%a = fpext <4 x float> %b to <4 x double>
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%mask = fcmp ogt <4 x double>%a1, %b1
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%c = select <4 x i1>%mask, <4 x double>%a, <4 x double>zeroinitializer
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ret <4 x double> %c
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}
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; CHECK-LABEL: funcA
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; CHECK: vcvtsi2sdq (%rdi){{.*}} encoding: [0x62
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; CHECK: ret
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define double @funcA(i64* nocapture %e) {
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entry:
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%tmp1 = load i64, i64* %e, align 8
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%conv = sitofp i64 %tmp1 to double
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ret double %conv
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}
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; CHECK-LABEL: funcB
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; CHECK: vcvtsi2sdl (%{{.*}} encoding: [0x62
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; CHECK: ret
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define double @funcB(i32* %e) {
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entry:
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%tmp1 = load i32, i32* %e, align 4
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%conv = sitofp i32 %tmp1 to double
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ret double %conv
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}
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; CHECK-LABEL: funcC
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; CHECK: vcvtsi2ssl (%{{.*}} encoding: [0x62
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; CHECK: ret
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define float @funcC(i32* %e) {
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entry:
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%tmp1 = load i32, i32* %e, align 4
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%conv = sitofp i32 %tmp1 to float
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ret float %conv
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}
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; CHECK-LABEL: i64tof32
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; CHECK: vcvtsi2ssq (%{{.*}} encoding: [0x62
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; CHECK: ret
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define float @i64tof32(i64* %e) {
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entry:
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%tmp1 = load i64, i64* %e, align 8
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%conv = sitofp i64 %tmp1 to float
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ret float %conv
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}
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; CHECK-LABEL: fpext
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; CHECK: vcvtss2sd {{.*}} encoding: [0x62
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; CHECK: ret
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define void @fpext() {
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entry:
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%f = alloca float, align 4
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%d = alloca double, align 8
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%tmp = load float, float* %f, align 4
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%conv = fpext float %tmp to double
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store double %conv, double* %d, align 8
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ret void
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}
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; CHECK-LABEL: fpround_scalar
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; CHECK: vmovsd {{.*}} encoding: [0x62
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; CHECK: vcvtsd2ss {{.*}} encoding: [0x62
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; CHECK: vmovss {{.*}} encoding: [0x62
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; CHECK: ret
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define void @fpround_scalar() nounwind uwtable {
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entry:
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%f = alloca float, align 4
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%d = alloca double, align 8
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%tmp = load double, double* %d, align 8
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%conv = fptrunc double %tmp to float
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store float %conv, float* %f, align 4
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ret void
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}
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; CHECK-LABEL: long_to_double
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; CHECK: vmovq {{.*}} encoding: [0x62
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; CHECK: ret
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define double @long_to_double(i64 %x) {
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%res = bitcast i64 %x to double
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ret double %res
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}
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; CHECK-LABEL: double_to_long
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; CHECK: vmovq {{.*}} encoding: [0x62
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; CHECK: ret
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define i64 @double_to_long(double %x) {
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%res = bitcast double %x to i64
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ret i64 %res
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}
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; CHECK-LABEL: int_to_float
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; CHECK: vmovd {{.*}} encoding: [0x62
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; CHECK: ret
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define float @int_to_float(i32 %x) {
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%res = bitcast i32 %x to float
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ret float %res
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}
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; CHECK-LABEL: float_to_int
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; CHECK: vmovd {{.*}} encoding: [0x62
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; CHECK: ret
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define i32 @float_to_int(float %x) {
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%res = bitcast float %x to i32
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ret i32 %res
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}
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define <16 x double> @uitof64(<16 x i32> %a) nounwind {
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; CHECK-LABEL: uitof64:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm2
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; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm0
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; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm1
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; CHECK-NEXT: vmovaps %zmm2, %zmm0
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; CHECK-NEXT: retq
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%b = uitofp <16 x i32> %a to <16 x double>
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ret <16 x double> %b
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}
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; CHECK-LABEL: uitof64_256
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; CHECK: vcvtudq2pd
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; CHECK: ret
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define <4 x double> @uitof64_256(<4 x i32> %a) nounwind {
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%b = uitofp <4 x i32> %a to <4 x double>
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ret <4 x double> %b
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}
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; CHECK-LABEL: uitof32
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; CHECK: vcvtudq2ps
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; CHECK: ret
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define <16 x float> @uitof32(<16 x i32> %a) nounwind {
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%b = uitofp <16 x i32> %a to <16 x float>
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ret <16 x float> %b
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}
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; CHECK-LABEL: uitof32_256
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; CHECK: vcvtudq2ps
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; CHECK: ret
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define <8 x float> @uitof32_256(<8 x i32> %a) nounwind {
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%b = uitofp <8 x i32> %a to <8 x float>
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ret <8 x float> %b
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}
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; CHECK-LABEL: uitof32_128
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; CHECK: vcvtudq2ps
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; CHECK: ret
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define <4 x float> @uitof32_128(<4 x i32> %a) nounwind {
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%b = uitofp <4 x i32> %a to <4 x float>
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ret <4 x float> %b
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}
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; CHECK-LABEL: @fptosi02
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; CHECK: vcvttss2si {{.*}} encoding: [0x62
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; CHECK: ret
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define i32 @fptosi02(float %a) nounwind {
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%b = fptosi float %a to i32
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ret i32 %b
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}
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; CHECK-LABEL: @fptoui02
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; CHECK: vcvttss2usi {{.*}} encoding: [0x62
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; CHECK: ret
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define i32 @fptoui02(float %a) nounwind {
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%b = fptoui float %a to i32
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ret i32 %b
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}
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; CHECK-LABEL: @uitofp02
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; CHECK: vcvtusi2ss
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; CHECK: ret
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define float @uitofp02(i32 %a) nounwind {
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%b = uitofp i32 %a to float
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ret float %b
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}
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; CHECK-LABEL: @uitofp03
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; CHECK: vcvtusi2sd
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; CHECK: ret
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define double @uitofp03(i32 %a) nounwind {
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%b = uitofp i32 %a to double
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ret double %b
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}
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; CHECK-LABEL: @sitofp_16i1_float
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; CHECK: vpmovm2d
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; CHECK: vcvtdq2ps
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define <16 x float> @sitofp_16i1_float(<16 x i32> %a) {
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%mask = icmp slt <16 x i32> %a, zeroinitializer
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%1 = sitofp <16 x i1> %mask to <16 x float>
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ret <16 x float> %1
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}
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; CHECK-LABEL: @sitofp_16i8_float
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; CHECK: vpmovsxbd
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; CHECK: vcvtdq2ps
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define <16 x float> @sitofp_16i8_float(<16 x i8> %a) {
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%1 = sitofp <16 x i8> %a to <16 x float>
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ret <16 x float> %1
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}
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; CHECK-LABEL: @sitofp_16i16_float
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; CHECK: vpmovsxwd
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; CHECK: vcvtdq2ps
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define <16 x float> @sitofp_16i16_float(<16 x i16> %a) {
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%1 = sitofp <16 x i16> %a to <16 x float>
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ret <16 x float> %1
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}
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; CHECK-LABEL: @sitofp_8i16_double
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; CHECK: vpmovsxwd
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; CHECK: vcvtdq2pd
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define <8 x double> @sitofp_8i16_double(<8 x i16> %a) {
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%1 = sitofp <8 x i16> %a to <8 x double>
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ret <8 x double> %1
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}
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; CHECK-LABEL: sitofp_8i8_double
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; CHECK: vpmovzxwd
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; CHECK: vpslld
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; CHECK: vpsrad
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; CHECK: vcvtdq2pd
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define <8 x double> @sitofp_8i8_double(<8 x i8> %a) {
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%1 = sitofp <8 x i8> %a to <8 x double>
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ret <8 x double> %1
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}
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; CHECK-LABEL: @sitofp_8i1_double
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; CHECK: vpmovm2d
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; CHECK: vcvtdq2pd
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define <8 x double> @sitofp_8i1_double(<8 x double> %a) {
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%cmpres = fcmp ogt <8 x double> %a, zeroinitializer
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%1 = sitofp <8 x i1> %cmpres to <8 x double>
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ret <8 x double> %1
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}
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; CHECK-LABEL: @uitofp_16i8
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; CHECK: vpmovzxbd
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; CHECK: vcvtudq2ps
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define <16 x float> @uitofp_16i8(<16 x i8>%a) {
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%b = uitofp <16 x i8> %a to <16 x float>
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ret <16 x float>%b
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}
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; CHECK-LABEL: @uitofp_16i16
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; CHECK: vpmovzxwd
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; CHECK: vcvtudq2ps
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define <16 x float> @uitofp_16i16(<16 x i16>%a) {
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%b = uitofp <16 x i16> %a to <16 x float>
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ret <16 x float>%b
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}
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