forked from OSchip/llvm-project
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc -mattr=+hvxv60,hvx-length64b -march=hexagon -O2 < %s | FileCheck %s
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; CHECK-LABEL: V6_vmaskedstoreq
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; CHECK: if (q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0) = v{{[0-9]+}}
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; CHECK-LABEL: V6_vmaskedstorenq
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; CHECK: if (!q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0) = v{{[0-9]+}}
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; CHECK-LABEL: V6_vmaskedstorentq
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; CHECK: if (q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0):nt = v{{[0-9]+}}
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; CHECK-LABEL: V6_vmaskedstorentnq
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; CHECK: if (!q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0):nt = v{{[0-9]+}}
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declare void @llvm.hexagon.V6.vmaskedstoreq(<512 x i1>, i8*, <16 x i32>)
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define void @V6_vmaskedstoreq( <16 x i32> %a, i8* %b, <16 x i32> %c) {
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%1 = bitcast <16 x i32> %a to <512 x i1>
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call void @llvm.hexagon.V6.vmaskedstoreq(<512 x i1> %1, i8* %b, <16 x i32> %c)
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ret void
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}
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declare void @llvm.hexagon.V6.vmaskedstorenq(<512 x i1>, i8*, <16 x i32>)
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define void @V6_vmaskedstorenq( <16 x i32> %a, i8* %b, <16 x i32> %c) {
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%1 = bitcast <16 x i32> %a to <512 x i1>
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call void @llvm.hexagon.V6.vmaskedstorenq(<512 x i1> %1, i8* %b, <16 x i32> %c)
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ret void
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}
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declare void @llvm.hexagon.V6.vmaskedstorentq(<512 x i1>, i8*, <16 x i32>)
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define void @V6_vmaskedstorentq( <16 x i32> %a, i8* %b, <16 x i32> %c) {
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%1 = bitcast <16 x i32> %a to <512 x i1>
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call void @llvm.hexagon.V6.vmaskedstorentq(<512 x i1> %1, i8* %b, <16 x i32> %c)
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ret void
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}
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declare void @llvm.hexagon.V6.vmaskedstorentnq(<512 x i1>, i8*, <16 x i32>)
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define void @V6_vmaskedstorentnq( <16 x i32> %a, i8* %b, <16 x i32> %c) {
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%1 = bitcast <16 x i32> %a to <512 x i1>
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call void @llvm.hexagon.V6.vmaskedstorentnq(<512 x i1> %1, i8* %b, <16 x i32> %c)
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ret void
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}
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