.. |
AArch64
|
[GIsel] Update a comment and make it more precise.
|
2020-05-12 15:38:20 -07:00 |
AMDGPU
|
[AMDGPU] Strengthen export cluster ordering
|
2020-05-13 23:07:37 +09:00 |
ARC
|
…
|
|
ARM
|
[Statepoint] Mark FixupStatepointCallerSaved as preserving the CFG
|
2020-05-13 10:59:44 -07:00 |
AVR
|
[AVR] Do not place functions in .progmem.data
|
2020-04-20 13:56:38 +02:00 |
BPF
|
BPF: fix a CORE optimization bug
|
2020-04-20 19:54:51 -07:00 |
Generic
|
[MachineDebugify] Insert synthetic DBG_VALUE instructions
|
2020-04-22 17:03:39 -07:00 |
Hexagon
|
[ModuloSchedule] Fix epilogue peeling with illegal phi.
|
2020-05-07 10:04:05 -07:00 |
Inputs
|
…
|
|
Lanai
|
…
|
|
MIR
|
[AMDGPU] Avoid hard-coded line numbers in error message checks
|
2020-04-23 21:06:09 +01:00 |
MSP430
|
…
|
|
Mips
|
[SelectionDAGBuilder] Stop setting alignment to one for hidden sret values
|
2020-05-04 14:44:39 +01:00 |
NVPTX
|
[llvm] Fix missing FileCheck directive colons
|
2020-04-06 09:59:08 -06:00 |
PowerPC
|
[NFC] [PowerPC] Narrow fast-math flags in tests
|
2020-05-13 17:22:45 +08:00 |
RISCV
|
[RISCV] Support Constant Pools in Load/Store Peephole
|
2020-05-11 19:20:38 +01:00 |
SPARC
|
…
|
|
SystemZ
|
[SystemZ] Improve foldMemoryOperandImpl: vec->FP conversions
|
2020-05-12 09:21:24 +02:00 |
Thumb
|
[ARM] Don't shrink STM if it would cause an unknown base register store
|
2020-04-22 14:50:42 +01:00 |
Thumb2
|
[ARM] Convert floating point splats to integer
|
2020-05-13 15:24:16 +01:00 |
VE
|
[VE] Update branch instructions
|
2020-04-28 09:41:01 +02:00 |
WebAssembly
|
[WebAssembly] Implement pseudo-min/max SIMD instructions
|
2020-05-12 09:39:01 -07:00 |
WinCFGuard
|
…
|
|
WinEH
|
…
|
|
X86
|
[X86] Only allow f32, f64, or f80 to be used with 'f' inline assembly constraint.
|
2020-05-13 13:27:13 -07:00 |
XCore
|
…
|
|