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llvm-project/llvm/lib/Target/AMDGPU
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Piotr Sobczak c72a63b4b0 [AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32 
* Update skip-if-dead.ll with tests for wave32.
* Fix the crash in verifier in one newly enabled test by adding
  missing fixImplicitOperands in branch insertion code.

```
*** Bad machine code: Using an undefined physical register ***
- function:    test_kill_divergent_loop
- basic block: %bb.2 bb (0xad96308)
- instruction: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
- operand 1:   implicit $vcc_lo
LLVM ERROR: Found 1 machine code errors.
```

* Simplify "cbranch_kill" to not use interp instructions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96793
 		2021-02-17 15:14:57 +01:00
..
AsmParser [AMDGPU][MC] Corrected error position for invalid dim modifiers 2021-02-08 14:32:28 +03:00
Disassembler [llvm] Use static_assert instead of assert (NFC) 2021-01-22 23:25:05 -08:00
MCTargetDesc [AMDGPU] Fix Windows build 2021-02-12 12:30:52 -08:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
Utils [AMDGPU] Update subtarget features for new target ID support 2021-01-26 11:25:51 -08:00
AMDGPU.h [AMDGPU] Forward-declare AMDGPUTargetMachine (NFC) 2021-01-30 09:53:40 -08:00
AMDGPU.td [AMDGPU] Update subtarget features for new target ID support 2021-01-26 11:25:51 -08:00
AMDGPUAliasAnalysis.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAliasAnalysis.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAlwaysInlinePass.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
AMDGPUAnnotateKernelFeatures.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUAnnotateUniformValues.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUArgumentUsageInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUArgumentUsageInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAsmPrinter.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUAsmPrinter.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAtomicOptimizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUCallLowering.cpp GlobalISel: Handle arguments partially passed on the stack 2021-02-15 17:06:14 -05:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Enable sret demotion 2021-01-08 10:56:35 +05:30
AMDGPUCallingConv.td AMDGPU: Stop adding stack passed wide arguments to call conv handler 2021-02-08 17:09:28 -05:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Use more accurate fast f64 fdiv 2021-01-21 10:51:36 -05:00
AMDGPUCombine.td [AMDGPU]: Fixes an invalid clamp selection pattern. 2021-02-08 13:06:30 +01:00
AMDGPUExportClustering.cpp [AMDGPU][MC] Refactored exp tgt handling 2021-01-26 14:54:15 +03:00
AMDGPUExportClustering.h [llvm] Add missing header guards (NFC) 2021-01-30 09:53:42 -08:00
AMDGPUFeatures.td
…
AMDGPUFixFunctionBitcasts.cpp
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGISel.td [TableGen][GlobalISel] Allow duplicate RendererFns 2021-02-12 15:05:32 +00:00
AMDGPUGenRegisterBankInfo.def AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping 2020-08-17 09:53:26 -04:00
AMDGPUGlobalISelUtils.cpp [AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset 2021-01-28 11:20:09 +01:00
AMDGPUGlobalISelUtils.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUHSAMetadataStreamer.cpp [AMDGPU] HSAMD::fromString - replace std::string arg with StringRef. NFCI. 2021-01-26 16:09:39 +00:00
AMDGPUHSAMetadataStreamer.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUISelDAGToDAG.cpp [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. 2021-01-22 14:20:59 +05:30
AMDGPUISelLowering.cpp [AMDGPU] Rename simplifyI24 to simplifyMul24 2021-02-17 11:33:49 +00:00
AMDGPUISelLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstCombineIntrinsic.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUInstrInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.td [AMDGPU]: Fixes an invalid clamp selection pattern. 2021-02-08 13:06:30 +01:00
AMDGPUInstructionSelector.cpp [AMDGPU][GlobalISel] Remove redundant cmp when copying constant to vcc 2021-01-28 11:20:09 +01:00
AMDGPUInstructionSelector.h [TableGen][GlobalISel] Allow duplicate RendererFns 2021-02-12 15:05:32 +00:00
AMDGPUInstructions.td [TableGen] Add the !filter bang operator. 2020-11-09 10:56:55 -05:00
AMDGPULateCodeGenPrepare.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPULegalizerInfo.cpp [AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset 2021-01-28 11:20:09 +01:00
AMDGPULegalizerInfo.h [AMDGPU] Forward-declare MachineIRBuilder (NFC) 2021-01-25 19:24:01 -08:00
AMDGPULibCalls.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULibFunc.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPULibFunc.h
…
AMDGPULowerIntrinsics.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULowerKernelArguments.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULowerKernelAttributes.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMCInstLower.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMIRFormatter.cpp [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUMIRFormatter.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUMachineCFGStructurizer.cpp [AMDGPU] Fix build breakage 2021-02-14 09:02:55 -08:00
AMDGPUMachineFunction.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineFunction.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMacroFusion.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMacroFusion.h [llvm] Add missing header guards (NFC) 2021-01-30 09:53:42 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPTNote.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPostLegalizerCombiner.cpp Fixed includes. 2021-02-02 09:14:54 +01:00
AMDGPUPreLegalizerCombiner.cpp [AMDGPU]: Fixes an invalid clamp selection pattern. 2021-02-08 13:06:30 +01:00
AMDGPUPrintfRuntimeBinding.cpp AMDGPUPrintfRuntimeBinding - don't dereference a dyn_cast<> pointer. NFCI. 2021-01-28 12:38:44 +00:00
AMDGPUPromoteAlloca.cpp [AMDGPU] Fix promote alloca with double use in a same insn 2021-02-11 11:42:25 -08:00
AMDGPUPropagateAttributes.cpp Revert "[IndirectFunctions] Skip propagating attributes to address taken functions" 2021-01-25 15:58:06 -05:00
AMDGPURegBankCombiner.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPURegisterBankInfo.cpp [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic 2021-02-15 08:45:46 +09:00
AMDGPURegisterBankInfo.h [AMDGPU][GlobalISel] Use scalar min/max instructions 2021-02-04 17:04:32 +00:00
AMDGPURegisterBanks.td AMDGPU/GlobalISel: Add SReg_96 to SGPRRegBank 2020-07-28 16:49:55 -04:00
AMDGPURewriteOutArguments.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUSearchableTables.td [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic 2021-02-15 08:45:46 +09:00
AMDGPUSubtarget.cpp [AMDGPU] Update subtarget features for new target ID support 2021-01-26 11:25:51 -08:00
AMDGPUSubtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUTargetMachine.cpp [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 2021-01-22 12:29:39 -08:00
AMDGPUTargetMachine.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUTargetObjectFile.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp Revert "[CostModel] Remove VF from IntrinsicCostAttributes" 2021-02-09 02:14:14 +00:00
AMDGPUTargetTransformInfo.h [AMDGPU] Forward-declare AMDGPUTargetMachine (NFC) 2021-01-30 09:53:40 -08:00
AMDGPUUnifyDivergentExitNodes.cpp [llvm] Populate SmallVector at construction time (NFC) 2021-01-28 22:21:14 -08:00
AMDGPUUnifyMetadata.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDILCFGStructurizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDKernelCodeT.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
BUFInstructions.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
CMakeLists.txt [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
CaymanInstructions.td [AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM 2020-07-08 19:14:49 +01:00
DSInstructions.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
EXPInstructions.td [AMDGPU] Separate out real exp instructions by subtarget. NFC. 2020-11-11 17:13:40 +00:00
EvergreenInstructions.td [AMDGPU] Omit needless string concatenations. NFC. 2020-10-28 12:56:52 +00:00
FLATInstructions.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
GCNDPPCombine.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNHazardRecognizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNHazardRecognizer.h [AMDGPU] Add Reset function to GCNHazardRecognizer 2020-10-28 16:32:32 -07:00
GCNILPSched.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNIterativeScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNIterativeScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNMinRegStrategy.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNNSAReassign.cpp [AMDGPU] Do not reassign spilled registers 2021-01-27 16:29:05 -08:00
GCNProcessors.td [AMDGPU] Add gfx1033 target 2020-11-03 16:27:48 +00:00
GCNRegBankReassign.cpp [AMDGPU] Do not reassign spilled registers 2021-01-27 16:29:05 -08:00
GCNRegPressure.cpp AMDGPU: Fix dbg_value handling when forming soft clause bundles 2021-02-01 22:16:35 -05:00
GCNRegPressure.h [AMDGPU] Drop unnecessary const from a return type (NFC) 2021-02-12 23:44:32 -08:00
GCNSchedStrategy.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNSchedStrategy.h
…
GCNSubtarget.h [AMDGPU] Update subtarget features for new target ID support 2021-01-26 11:25:51 -08:00
InstCombineTables.td [InstCombine] Move target-specific inst combining 2020-07-22 15:59:49 +02:00
MIMGInstructions.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
R600.td
…
R600AsmPrinter.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ControlFlowFinalizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Defines.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600EmitClauseMarkers.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ExpandSpecialInstrs.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600ISelLowering.cpp [NFC] Simplify expression 2021-02-05 10:17:02 +00:00
R600ISelLowering.h [TargetLowering] Use Align in allowsMisalignedMemoryAccesses. 2021-02-04 19:22:06 -08:00
R600InstrFormats.td
…
R600InstrInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600InstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
R600Instructions.td [NFC] Remove unused GetUnderlyingObject paramenter 2020-07-31 02:10:03 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600MachineScheduler.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600OpenCLImageTypeLoweringPass.cpp TransformUtils: Fix metadata handling in CloneModule (and improve CloneFunctionInto) 2021-02-15 11:56:00 -08:00
R600OptimizeVectorRegisters.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Packetizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Processors.td
…
R600RegisterInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600RegisterInfo.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R700Instructions.td
…
SIAddIMGInit.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIAnnotateControlFlow.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIDefines.h [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIFixSGPRCopies.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFixVGPRCopies.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFoldOperands.cpp [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. 2021-01-22 14:20:59 +05:30
SIFormMemoryClauses.cpp [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIFrameLowering.cpp [AMDGPU] Save all lanes for reserved VGPRs 2021-02-04 09:56:36 +01:00
SIFrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIISelLowering.cpp [AMDGPU] Fix a miscompile with S_ADD/S_SUB 2021-02-17 12:24:58 +01:00
SIISelLowering.h [TargetLowering] Use Align in allowsMisalignedMemoryAccesses. 2021-02-04 19:22:06 -08:00
SIInsertHardClauses.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIInsertSkips.cpp [AMDGPU] Move kill lowering to WQM pass and add live mask tracking 2021-02-11 20:31:29 +09:00
SIInsertWaitcnts.cpp [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIInstrFormats.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIInstrInfo.cpp [AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32 2021-02-17 15:14:57 +01:00
SIInstrInfo.h [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIInstrInfo.td [AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn 2021-02-15 11:27:59 -08:00
SIInstructions.td [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic 2021-02-15 08:45:46 +09:00
SILoadStoreOptimizer.cpp [AMDGPU] Better selection of base offset when merging DS reads/writes 2021-02-11 17:46:09 +00:00
SILowerControlFlow.cpp [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic 2021-02-15 08:45:46 +09:00
SILowerI1Copies.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
SILowerSGPRSpills.cpp AMDGPU: Fix verifier error with argument passed in CSR SGPR 2021-02-09 13:49:44 -05:00
SIMachineFunctionInfo.cpp [AMDGPU] Save all lanes for reserved VGPRs 2021-02-04 09:56:36 +01:00
SIMachineFunctionInfo.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
SIMachineScheduler.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMachineScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMemoryLegalizer.cpp [AMDGPU] Correct rmw atomics s_waitcnt generation 2021-02-17 01:32:29 +00:00
SIModeRegister.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIOptimizeExecMasking.cpp [AMDGPU] Move kill lowering to WQM pass and add live mask tracking 2021-02-11 20:31:29 +09:00
SIOptimizeExecMaskingPreRA.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPeepholeSDWA.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPostRABundler.cpp AMDGPU: Remove kills following clusters of memory instruction 2021-02-16 10:49:28 -05:00
SIPreAllocateWWMRegs.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPreEmitPeephole.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIProgramInfo.cpp [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIProgramInfo.h [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIRegisterInfo.cpp [AMDGPU] Be more specific in needsFrameBaseReg 2021-01-29 14:40:25 -08:00
SIRegisterInfo.h Change materializeFrameBaseRegister() to return register 2021-01-22 15:51:06 -08:00
SIRegisterInfo.td AMDGPU: Fix adding extra operands for i128 asm constraints 2021-02-02 19:01:04 -05:00
SIRemoveShortExecBranches.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SISchedule.td [AMDGPU] Add _e64 suffix to VOP3 Insts 2021-01-12 18:33:18 -05:00
SIShrinkInstructions.cpp [AMDGPU] Avoid an illegal operand in si-shrink-instructions 2021-01-28 08:49:21 +01:00
SIWholeQuadMode.cpp [AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic 2021-02-15 08:45:46 +09:00
SMInstructions.td [AMDGPU] Make use of HasSMemRealTime predicate. NFC. 2020-12-14 16:34:57 +00:00
SOPInstructions.td [AMDGPU] Rename pseudo S_WAITCNT_IDLE to S_WAIT_IDLE. NFC. 2020-11-18 14:03:43 +00:00
VIInstrFormats.td
…
VOP1Instructions.td [AMDGPU] Fix use of HasModifiers in VopProfile 2021-01-26 15:21:11 +01:00
VOP2Instructions.td [AMDGPU] Fix use of HasModifiers in VopProfile 2021-01-26 15:21:11 +01:00
VOP3Instructions.td [AMDGPU] Fix use of HasModifiers in VopProfile 2021-01-26 15:21:11 +01:00
VOP3PInstructions.td [AMDGPU] Allow accvgpr_read/write decode with opsel 2021-02-12 10:04:47 -08:00
VOPCInstructions.td [AMDGPU] Fix multiclass template parameter types. NFC. 2021-02-03 16:21:51 +00:00
VOPInstructions.td [AMDGPU] Add a TRANS bit to TSFlags. NFC. 2020-11-24 17:49:56 +00:00