forked from OSchip/llvm-project
57 lines
1.4 KiB
LLVM
57 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
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@var = global i1 0
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define i32 @test_sextloadi32() {
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; CHECK-LABEL: test_sextloadi32
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%val = load i1* @var
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%ret = sext i1 %val to i32
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; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
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; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
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ret i32 %ret
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; CHECK: ret
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}
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define i64 @test_sextloadi64() {
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; CHECK-LABEL: test_sextloadi64
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%val = load i1* @var
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%ret = sext i1 %val to i64
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; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
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; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
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ret i64 %ret
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; CHECK: ret
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}
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define i32 @test_zextloadi32() {
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; CHECK-LABEL: test_zextloadi32
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; It's not actually necessary that "ret" is next, but as far as LLVM
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; is concerned only 0 or 1 should be loadable so no extension is
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; necessary.
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%val = load i1* @var
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%ret = zext i1 %val to i32
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; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
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ret i32 %ret
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; CHECK-NEXT: ret
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}
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define i64 @test_zextloadi64() {
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; CHECK-LABEL: test_zextloadi64
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; It's not actually necessary that "ret" is next, but as far as LLVM
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; is concerned only 0 or 1 should be loadable so no extension is
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; necessary.
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%val = load i1* @var
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%ret = zext i1 %val to i64
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; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
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ret i64 %ret
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; CHECK-NEXT: ret
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}
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