llvm-project

History

Luke Cheeseman 6db3a6a4a7 Revert r347490 as it breaks address sanitizer builds llvm-svn: 347499		2018-11-23 17:13:06 +00:00
..
AArch64	Revert r347490 as it breaks address sanitizer builds	2018-11-23 17:13:06 +00:00
AMDGPU	AMDGPU: Fix tests using old number for constant address space	2018-09-10 02:54:25 +00:00
ARM	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
Generic	[codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL	2018-10-01 21:59:45 +00:00
Hexagon	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
Mips	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
NVPTX	[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.	2018-01-10 00:56:48 +00:00
PowerPC	[Power9] Allow gpr callee saved spills in prologue to vectors registers	2018-11-09 16:36:24 +00:00
WebAssembly	[MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>)	2018-05-08 02:02:50 +00:00
X86	Add 'REQUIRES: default_triple' to test/CodeGen/MIR/X86/zero-probability.mir	2018-11-07 23:33:55 +00:00
README	…

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.