Commit Graph

594 Commits

Author SHA1 Message Date
River Riddle 1834ad4a69 [mlir][Pass] Update the PassGen to generate base classes instead of utilities
Summary:
This is much cleaner, and fits the same structure as many other tablegen backends. This was not done originally as the CRTP in the pass classes made it overly verbose/complex.

Differential Revision: https://reviews.llvm.org/D77367
2020-04-07 14:08:52 -07:00
Jacques Pienaar 3f7439b280 [mlir][DRR] Add location directive
Summary:
Add directive to indicate the location to give to op being created. This
directive is optional and if unused the location will still be the fused
location of all source operations.

Currently this directive only works with other op locations, reusing an
existing op location or a fusion of op locations. But doesn't yet support
supplying metadata for the FusedLoc.

Based off initial revision by antiagainst@ and effectively mirrors GlobalIsel
debug_locations directive.

Differential Revision: https://reviews.llvm.org/D77649
2020-04-07 13:38:25 -07:00
Stella Laurenzo f5deb0878d Remove FxpMathOps dialect and Quantizer tool.
Summary:
* Removal of FxpMathOps was discussed on the mailing list.
* Will send a courtesy note about also removing the Quantizer (which had some dependencies on FxpMathOps).
* These were only ever used for experimental purposes and we know how to get them back from history as needed.
* There is a new proposal for more generalized quantization tooling, so moving these older experiments out of the way helps clean things up.

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77479
2020-04-07 13:22:39 -07:00
Lei Zhang 2d3eb493d4 [mlir][vulkan-runner] Fix createLowerToLLVMPass interface
createLowerToLLVMPass() now requires a struct for passing in arguments
after 7023f4b4cb.
2020-04-07 12:54:54 -04:00
Jacques Pienaar d3a31c4db4 Remove case in rewritergen unmatched opdefgen side
The rewriter generates a call to build that is not handled by opdef generator
and so will fail to compile. Also if this is a root node being replaced
(depth 0) then using the more generic build method in the rewrite suffices.
2020-04-06 16:03:49 -07:00
River Riddle 74d44c43e8 [mlir] Refactor and cleanup the translation facilities.
Summary:
This revision performs several cleanups on the translation infra:
* Removes the TranslateCLParser library and consolidates into Translation
  - This was a weird library that existed in Support, and didn't really justify being a standalone library.
* Cleans up the internal registration and consolidates all of the translation functions within one registry.

Differential Revision: https://reviews.llvm.org/D77514
2020-04-05 16:21:21 -07:00
River Riddle 0359b86d8b [mlir][ODS] Add support for variadic regions.
Summary: This revision adds support for marking the last region as variadic in the ODS region list with the VariadicRegion directive.

Differential Revision: https://reviews.llvm.org/D77455
2020-04-05 01:03:38 -07:00
Kazuaki Ishizaki 5aacce3db2 [mlir] NFC: Fix trivial typo
Differential Revision: https://reviews.llvm.org/D77473
2020-04-05 11:30:30 +09:00
River Riddle e3bb36370d [mlir][DeclarativeParser] Emit an error if a `:` follows an attribute with a non-constant type.
Summary: The attribute grammar includes an optional trailing colon type, so for attributes without a constant buildable type this will generally lead to unexpected and undesired behavior. Given that, it's better to just error out on these cases.

Differential Revision: https://reviews.llvm.org/D77293
2020-04-03 19:23:56 -07:00
River Riddle 79afdfab9a [mlir] Change the default of `mlir-print-op-on-diagnostic` to true
Summary: It is a very common user trap to think that the location printed along with the diagnostic is the same as the current operation that caused the error. This revision changes the behavior to always print the current operation, except for when diagnostics are being verified. This is achieved by moving the command line flags in IR/ to be options on the MLIRContext.

Differential Revision: https://reviews.llvm.org/D77095
2020-04-03 19:02:51 -07:00
Denis Khalikov 0718e3ae31 [mlir][vulkan-runner] Add support for 3D memrefs.
Summary:
Add support for 3D memrefs in mlir-vulkan-runner and simple test.

Differential Revision: https://reviews.llvm.org/D77157
2020-04-03 15:10:40 +03:00
Mehdi Amini ee4d034277 Change pass registration generated code to allow users to selectively register passes
This slightly tweaks the generated code from:

  #ifdef GEN_PASS_REGISTRATION
  ::mlir::registerPass("flag1", ...
  ::mlir::registerPass("flag2", ...
  #endif // GEN_PASS_REGISTRATION

to:

  #ifdef GEN_PASS_REGISTRATION
  #define GEN_PASS_REGISTRATION_Pass1
  #define GEN_PASS_REGISTRATION_Pass2
  #endif // GEN_PASS_REGISTRATION

  #ifdef GEN_PASS_REGISTRATION_Pass1
  ::mlir::registerPass("flag1", ...
  #endif
  #ifdef GEN_PASS_REGISTRATION_Pass1
  ::mlir::registerPass("flag2", ...
  #endif

That way the generated code can be included by defining the
`GEN_PASS_REGISTRATION` macro as currenty and register all the passes,
but one can also define only `GEN_PASS_REGISTRATION_Pass1` to register a
subset of the passes.

Differential Revision: https://reviews.llvm.org/D77322
2020-04-02 18:58:47 +00:00
Mehdi Amini b8c260c38d Remove linking all targets from `mlir-opt` (NFC)
There is no need to directly depends on this from mlir-opt, some library
may transitively depend on a subset of the targets when enabled (like
NVPTX for Cuda codegen tests) but this is handled by CMake already.
2020-04-01 17:21:07 +00:00
River Riddle 9be4be3e53 [mlir][Pass] Add support for generating pass documention from the tablegen definition
Summary:
This revision adds support for auto-generating pass documentation, replacing the need to manually keep Passes.md up-to-date. This matches the behavior already in place for dialect and interface documentation.

Differential Revision: https://reviews.llvm.org/D76660
2020-04-01 02:10:46 -07:00
River Riddle 9a277af2d4 [mlir][Pass] Add support for generating pass utilities via tablegen
This revision adds support for generating utilities for passes such as options/statistics/etc. that can be inferred from the tablegen definition. This removes additional boilerplate from the pass, and also makes it easier to remove the reliance on the pass registry to provide certain things(e.g. the pass argument).

Differential Revision: https://reviews.llvm.org/D76659
2020-04-01 02:10:46 -07:00
River Riddle 8155e41ac6 [mlir][Pass] Add a tablegen backend for defining Pass information
This will greatly simplify a number of things related to passes:
* Enables generation of pass registration
* Enables generation of boiler plate pass utilities
* Enables generation of pass documentation

This revision focuses on adding the basic structure and adds support for generating the registration for passes in the Transforms/ directory. Future revisions will add more support and move more passes over.

Differential Revision: https://reviews.llvm.org/D76656
2020-04-01 02:10:46 -07:00
Mehdi Amini bab5bcf8fd Add a flag on the context to protect against creation of operations in unregistered dialects
Differential Revision: https://reviews.llvm.org/D76903
2020-03-30 19:37:31 +00:00
Uday Bondhugula f273e5c507 [MLIR] Fix permuteLoops utility
Rewrite mlir::permuteLoops (affine loop permutation utility) to fix
incorrect approach. Avoiding using sinkLoops entirely - use single move
approach. Add test pass.

This fixes https://bugs.llvm.org/show_bug.cgi?id=45328

Depends on D77003.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77004
2020-03-30 23:38:23 +05:30
Sean Silva 6677477190 Verify number of result types in generated builder.
Summary: This just bit me and is nasty to debug.

Differential Revision: https://reviews.llvm.org/D76888
2020-03-27 20:05:42 -07:00
Kazuaki Ishizaki e5a8512655 [mlir] NFC: fix trivial typo in source files
Summary: fix trivial typos in the source files

Reviewers: mravishankar, antiagainst, nicolasvasilache, herhut, rriddle, aartbik

Reviewed By: antiagainst, rriddle

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, bader, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76876
2020-03-28 10:12:49 +09:00
Marcel Koester 86bbbb317b [mlir] Extended Dominance analysis with a function to find the nearest common dominator of two given blocks.
The Dominance analysis currently misses a utility function to find the nearest common dominator of two given blocks. This is required for a huge variety of different control-flow analyses and transformations. This commit adds this function and moves the getNode function from DominanceInfo to DominanceInfoBase, as it also works for post dominators.

Differential Revision: https://reviews.llvm.org/D75507
2020-03-27 14:55:40 +01:00
Denis Khalikov 8f4ab8c7d7 [mlir][vulkan-runner] Add support for 2D memref.
Summary:
This patch adds support for 2D memref in mlir-vulkan-runner.

Differential Revision: https://reviews.llvm.org/D76737
2020-03-27 13:59:17 +03:00
River Riddle 1a083f027f [mlir] Revamp operation documentation generation
Summary:
This revisions performs several cleanups to the generated dialect documentation:
* Standardizes format of attributes/operands/results sections
* Splits out operation/type/dialect documentation generation to allow for composing generated and hand-written documentation
* Add section for declarative assembly syntax and successors
* General cleanup

Differential Revision: https://reviews.llvm.org/D76573
2020-03-24 12:05:18 -07:00
Christian Sigg b43ae21e60 Fix all-reduce int tests by host-registering memrefs.
Reduce amount of boiler plate to register host memory.

Summary: Fix all-reduce int tests by host-registering memrefs.

Reviewers: herhut

Reviewed By: herhut

Subscribers: clementval, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76563
2020-03-23 11:48:13 +01:00
River Riddle e8f5c072f6 [mlir] Move the testing pass for GpuKernelToCubin to the test/ directory
Summary:
This removes the static pass registration, and also cleans up some lingering technical debt.

Differential Revision: https://reviews.llvm.org/D76554
2020-03-22 03:38:09 -07:00
River Riddle e74961eee2 [mlir][NFC] Remove Analysis/Passes.h
Summary:
This file only contains references to test passes, and was never removed when the test passes were moved to the test/ directory.

Differential Revision: https://reviews.llvm.org/D76553
2020-03-22 03:16:51 -07:00
Rob Suderman e708471395 [mlir][NFC] Cleanup AffineOps directory structure
Summary:
Change AffineOps Dialect structure to better group both IR and Tranforms. This included extracting transforms directly related to AffineOps. Also move AffineOps to Affine.

Differential Revision: https://reviews.llvm.org/D76161
2020-03-20 14:23:43 -07:00
Nicolas Vasilache 462db62053 [mlir][AVX512] Start a primitive AVX512 dialect
The Vector Dialect [document](https://mlir.llvm.org/docs/Dialects/Vector/) discusses the vector abstractions that MLIR supports and the various tradeoffs involved.

One of the layer that is missing in OSS atm is the Hardware Vector Ops (HWV) level.

This revision proposes an AVX512-specific to add a new Dialect/Targets/AVX512 Dialect that would directly target AVX512-specific intrinsics.

Atm, we rely too much on LLVM’s peephole optimizer to do a good job from small insertelement/extractelement/shufflevector. In the future, when possible, generic abstractions such as VP intrinsics should be preferred.

The revision will allow trading off HW-specific vs generic abstractions in MLIR.

Differential Revision: https://reviews.llvm.org/D75987
2020-03-20 14:11:57 -04:00
River Riddle bd0ca2627c [mlir] Update DRR patterns to notify the rewriter why a pattern fails to match.
Summary:
This adds support in RewriterGen for calling into the new `PatternRewriter::notifyMatchFailure` hook. This lets derived pattern rewriters display this information to users, an example from DialectConversion is shown below:

```

Legalizing operation : 'std.and'(0x60e0000066a0) {
  * Fold {
  } -> FAILURE : unable to fold

  * Pattern : 'std.and -> (spv.BitwiseAnd)' {
    ** Failure : operand 0 of op 'std.and' failed to satisfy constraint: '8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4'
  } -> FAILURE : pattern failed to match

  * Pattern : 'std.and -> (spv.LogicalAnd)' {
    ** Failure : operand 0 of op 'std.and' failed to satisfy constraint: 'bool or vector of bool values of length 2/3/4'
  } -> FAILURE : pattern failed to match
} -> FAILURE : no matched legalization pattern

```

Differential Revision: https://reviews.llvm.org/D76335
2020-03-17 20:22:00 -07:00
River Riddle 3145427dd7 [mlir][NFC] Replace all usages of PatternMatchResult with LogicalResult
This also replaces usages of matchSuccess/matchFailure with success/failure respectively.

Differential Revision: https://reviews.llvm.org/D76313
2020-03-17 20:21:32 -07:00
Denis Khalikov bfb2ce0256 [mlir][vulkan-runner] Use C-compatible wrapper emission.
A memref argument is converted into a pointer-to-struct argument
of type `{T*, T*, i64, i64[N], i64[N]}*` in the wrapper function,
where T is the converted element type and N is the memref rank.

Differential Revision: https://reviews.llvm.org/D76059
2020-03-17 07:54:41 -04:00
River Riddle 032743e18f [mlir] Add support for the attribute verifiers in the dialect declaration generator.
Summary: This adds bitfields that map to the dialect attribute verifier hooks. This also moves over the Test dialect to have its declaration generated.

Differential Revision: https://reviews.llvm.org/D76254
2020-03-16 18:32:23 -07:00
River Riddle 2d723d4ad5 [mlir] Avoid the use of auto in templates to fix MSVC build
MSVC is unable to deduce template types when the type involves auto.
2020-03-16 13:55:16 -07:00
River Riddle 429d792f23 [mlir] Add support for generating dialect declarations via tablegen.
Summary: This generates the class declarations for dialects using the existing 'Dialect' tablegen classes.

Differential Revision: https://reviews.llvm.org/D76185
2020-03-14 20:36:44 -07:00
Isuru Fernando 103678d66a [mlir] Fix cross compiling MLIR
Setting MLIR_TABLEGEN_EXE would prevent building the native tool which is used in cross-compiling

Differential Revision: https://reviews.llvm.org/D75299
2020-03-14 19:18:40 +00:00
Jacques Pienaar b2bb8b6cd6 [mlir] Automatically add DerivedAttribute op interface
Summary: When an operation has derived attributes, add the DerivedAttribute op interface.

Differential Revision: https://reviews.llvm.org/D76144
2020-03-13 14:26:30 -07:00
Lei Zhang 2ae5e472e6 [mlir][spirv] Use SmallVector<ArrayRef> for availability queries
Previously extensions and capabilities requirements are returned as
SmallVector<SmallVector>. It's an anti-pattern; this commit improves
a bit by returning as SmallVector<ArrayRef>. This is possible because
the internal sequence is always known statically (from the spec)
so that we can use a static constant array for it and get an ArrayRef.

Differential Revision: https://reviews.llvm.org/D75874
2020-03-12 19:37:45 -04:00
Lei Zhang 3148f10b17 [mlir][spirv] Use spv.vce in spv.module and wire up (de)serialization
This commits changes the definition of spv.module to use the #spv.vce
attribute for specifying (version, capabilities, extensions) triple
so that we can have better API and custom assembly form. Since now
we have proper modelling of the triple, (de)serialization is wired up
to use them.

With the new UpdateVCEPass, we don't need to manually specify the
required extensions and capabilities anymore when creating a spv.module.
One just need to call UpdateVCEPass before serialization to get the
needed version/extensions/capabilities.

Differential Revision: https://reviews.llvm.org/D75872
2020-03-12 19:37:45 -04:00
Jacques Pienaar 69ce2fd2df [mlir] Remove unused generator
This was a previous experiment that didn't pan out and needs to be
replaced, given no current use or tests, deleting instead and can start
new version fresh.
2020-03-12 16:35:33 -07:00
River Riddle 0ddba0bd59 [mlir][SideEffects] Replace HasNoSideEffect with the memory effect interfaces.
HasNoSideEffect can now be implemented using the MemoryEffectInterface, removing the need to check multiple things for the same information. This also removes an easy foot-gun for users as 'Operation::hasNoSideEffect' would ignore operations that dynamically, or recursively, have no side effects. This also leads to an immediate improvement in some of the existing users, such as DCE, now that they have access to more information.

Differential Revision: https://reviews.llvm.org/D76036
2020-03-12 14:26:15 -07:00
River Riddle 907403f342 [mlir] Add a new `ConstantLike` trait to better identify operations that represent a "constant".
The current mechanism for identifying is a bit hacky and extremely adhoc, i.e. we explicit check 1-result, 0-operand, no side-effect, and always foldable and then assume that this is a constant. Adding a trait adds structure to this, and makes checking for a constant much more efficient as we can guarantee that all of these things have already been verified.

Differential Revision: https://reviews.llvm.org/D76020
2020-03-12 14:26:15 -07:00
River Riddle 483f82b146 [mlir][SideEffects][NFC] Move the .td definitions for NoSideEffect/RecursiveSideEffect to SideEffects.td
This matches the location of these traits within the source files.

Differential Revision: https://reviews.llvm.org/D75968
2020-03-12 14:26:15 -07:00
Stephen Neuendorffer accede537e [MLIR] Link MLIRMlirOptMain with the same libraries as mlir-opt
MLIRMlirOptMain seems to need the same libraries as mlir-opt.

Differential Revision: https://reviews.llvm.org/D75783
2020-03-11 12:02:10 -07:00
Stephen Neuendorffer dc120bae46 [MLIR] Do not link mlir-cpu-runner with X86 libs
The three libs where recently added to the `mlir-cpu-runner`'s
`CMakeLists.txt` file. This prevent the runner to compile on other
platform (e.g. Power in my case).  Native codegen is pulled in
by the ExecutionEngine library, so this is redundant in any case.

Differential Revision: https://reviews.llvm.org/D75916
2020-03-11 11:35:59 -07:00
Denis Khalikov 1090a83069 [mlir][vulkan-runner] Update mlir-vulkan-runner execution driver.
* Adds GpuLaunchFuncToVulkanLaunchFunc conversion pass.
* Moves a serialization of the `spirv::Module` from LaunchFuncToVulkanCalls pass to newly created pass.
* Updates LaunchFuncToVulkanCalls instrumentation pass, adds `initVulkan` and `deinitVulkan` runtime calls.
* Adds `bindResource` call to bind specifc resource by the given descriptor set and descriptor binding.
* Eliminates static construction and desctruction of `VulkanRuntimeManager`.

Differential Revision: https://reviews.llvm.org/D75192
2020-03-10 15:58:31 -04:00
River Riddle 320f0b0036 [mlir] Change EffectKind in unsigned for bitfield to avoid miscompile in
MSVC

MSVC has problems if the type of the bitfield is different, leading to
invalid code generation.
2020-03-06 23:01:49 -08:00
River Riddle 20dca52288 [mlir][SideEffects] Enable specifying side effects directly on the arguments/results of an operation.
Summary:
New classes are added to ODS to enable specifying additional information on the arguments and results of an operation. These classes, `Arg` and `Res` allow for adding a description and a set of 'decorators' along with the constraint. This enables specifying the side effects of an operation directly on the arguments and results themselves.

Example:
```
def LoadOp : Std_Op<"load"> {
  let arguments = (ins Arg<AnyMemRef, "the MemRef to load from",
                           [MemRead]>:$memref,
                       Variadic<Index>:$indices);
}
```

Differential Revision: https://reviews.llvm.org/D74440
2020-03-06 14:04:36 -08:00
River Riddle f8923584da [mlir][SideEffects] Define a set of interfaces and traits for defining side effects
This revision introduces the infrastructure for defining side-effects and attaching them to operations. This infrastructure allows for defining different types of side effects, that don't interact with each other, but use the same internal mechanisms. At the base of this is an interface that allows operations to specify the different effect instances that are exhibited by a specific operation instance. An effect instance is comprised of the following:

* Effect: The specific effect being applied.
  For memory related effects this may be reading from memory, storing to memory, etc.

* Value: A specific value, either operand/result/region argument, the effect pertains to.

* Resource: This is a global entity that represents the domain within which the effect is being applied.

MLIR serves many different abstractions, which cover many different domains. Simple effects are may have very different context, for example writing to an in-memory buffer vs a database. This revision defines uses this infrastructure to define a set of initial MemoryEffects. The are effects that generally correspond to memory of some kind; Allocate, Free, Read, Write.

This set of memory effects will be used in follow revisions to generalize various parts of the compiler, and make others more powerful(e.g. DCE).

This infrastructure was originally proposed here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/v2mNl4vFCUM

Differential Revision: https://reviews.llvm.org/D74439
2020-03-06 14:04:36 -08:00
Stephen Neuendorffer 9f979d7ad5 [MLIR] Fixes for BUILD_SHARED_LIBS=on
Differential Revision: https://reviews.llvm.org/D75308
2020-03-06 13:25:18 -08:00
Valentin Churavy 7c64f6bf52 [MLIR] Add support for libMLIR.so
Putting this up mainly for discussion on
how this should be done. I am interested in MLIR from
the Julia side and we currently have a strong preference
to dynamically linking against the LLVM shared library,
and would like to have a MLIR shared library.

This patch adds a new cmake function add_mlir_library()
which accumulates a list of targets to be compiled into
libMLIR.so.  Note that not all libraries make sense to
be compiled into libMLIR.so.  In particular, we want
to avoid libraries which primarily exist to support
certain tools (such as mlir-opt and mlir-cpu-runner).

Note that the resulting libMLIR.so depends on LLVM, but
does not contain any LLVM components.  As a result, it
is necessary to link with libLLVM.so to avoid linkage
errors. So, libMLIR.so requires LLVM_BUILD_LLVM_DYLIB=on

FYI, Currently it appears that LLVM_LINK_LLVM_DYLIB is broken
because mlir-tblgen is linked against libLLVM.so and
and independent LLVM components.

Previous version of this patch broke depencies on TableGen
targets.  This appears to be because it compiled all
libraries to OBJECT libraries (probably because cmake
is generating different target names).  Avoiding object
libraries results in correct dependencies.

(updated by Stephen Neuendorffer)

Differential Revision: https://reviews.llvm.org/D73130
2020-03-06 13:25:18 -08:00