Commit Graph

6 Commits

Author SHA1 Message Date
Tom Stellard db04590717 R600/SI: Add missing -mcpu=SI to assembler test
llvm-svn: 235630
2015-04-23 19:33:55 +00:00
Tom Stellard d1f0f0268c R600/SI: Add assembler support for all CI and VI VOP1 instructions
llvm-svn: 235629
2015-04-23 19:33:54 +00:00
Tom Stellard 7130ef49cb R600/SI: Improve AsmParser support for forced e64 encoding
We can now force e64 encoding even when the operands would be legal
for e32 encoding.

llvm-svn: 235626
2015-04-23 19:33:48 +00:00
Tom Stellard d7e6f13671 R600/SI: Initial support for assembler and inline assembly
This is currently considered experimental, but most of the more
commonly used instructions should work.

So far only SI has been extensively tested, CI and VI probably work too,
but may be buggy.  The current set of tests cases do not give complete
coverage, but I think it is sufficient for an experimental assembler.

See the documentation in R600Usage for more information.

llvm-svn: 234381
2015-04-08 01:09:26 +00:00
Tom Stellard 49f8bfdcb7 R600/SI: Add a stub GCNTargetMachine
This is equivalent to the AMDGPUTargetMachine now, but it is the
starting point for separating R600 and GCN functionality into separate
targets.

It is recommened that users start using the gcn triple for GCN-based
GPUs, because using the r600 triple for these GPUs will be deprecated in
the future.

llvm-svn: 225277
2015-01-06 18:00:21 +00:00
Tom Stellard 9d7ddd516e R600/SI: Start implementing an assembler
This was done using the Sparc and PowerPC AsmParsers as guides.  So far it
is very simple and only supports sopp instructions.

llvm-svn: 221994
2014-11-14 14:08:00 +00:00