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41 Commits

Author SHA1 Message Date
Daniel Sanders cefddb2ca6 Revert r205194 - [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16. 
There's a couple additional bits I missed.

llvm-svn: 205195
 2014-03-31 14:34:36 +00:00
Daniel Sanders a104300dbe [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16. 
llvm-svn: 205194
 2014-03-31 14:30:05 +00:00
Chandler Carruth 442f784814 [cleanup] Re-sort all the includes with utils/sort_includes.py. 
llvm-svn: 202811
 2014-03-04 10:07:28 +00:00
Petar Jovanovic a5da588b2f [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions 
Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.

Patch by Sasa Stankovic.

Differential Revision: http://llvm-reviews.chandlerc.com/D2592

llvm-svn: 200783
 2014-02-04 18:41:57 +00:00
Reed Kotler 5bde5c35f4 Distinguish and choose 16 or 32 bit forms of save/restore for Mips16. 
llvm-svn: 196999
 2013-12-11 03:32:44 +00:00
Reed Kotler e0a34ee66e Cleaning up of prologue/epilogue code for Mips16. First step 
here is to make save/restore into variable number of argument instructions.

llvm-svn: 196726
 2013-12-08 16:51:52 +00:00
Daniel Sanders 7e51fe19d5 [mips][msa] Added support for matching splati from normal IR (i.e. not intrinsics) 
Updated some of the vshf since they (correctly) emit splati's now

llvm-svn: 191511
 2013-09-27 11:48:57 +00:00
Daniel Sanders 2630718ae8 [mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics) 
llvm-svn: 191302
 2013-09-24 14:20:00 +00:00
Akira Hatanaka 92ec3bd50b [mips] Place parentheses around && to silence warning. 
llvm-svn: 190234
 2013-09-07 00:26:26 +00:00
Akira Hatanaka 2c544d8ed5 [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, which is 
equivalent to "beq $zero, $zero, offset".

llvm-svn: 190220
 2013-09-06 23:40:15 +00:00
Akira Hatanaka 39f915b58a [micromips] Print instruction alias "not" if the last operand of a nor is zero. 
llvm-svn: 188851
 2013-08-21 01:18:46 +00:00
Akira Hatanaka e2a39e7532 [mips] Delete unnecessary InstAliases. Also, clear some of the InstAlias' 
EmitAlias flag and have MipsInstPrinter::printAlias print the aliases.

llvm-svn: 187824
 2013-08-06 22:35:29 +00:00
Akira Hatanaka 34a32c0b87 [mips] Replace usages of register classes with register operands. Also, remove 
unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print
jalr InstAliases in MipsInstPrinter::printAlias.

llvm-svn: 187821
 2013-08-06 22:20:40 +00:00
Akira Hatanaka 5973e8371a [mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias that 
turns "bal" into "bgezal".

llvm-svn: 187440
 2013-07-30 20:24:24 +00:00
Akira Hatanaka 52dd808bc3 [mips] Add comment and simplify function. 
llvm-svn: 187371
 2013-07-29 19:08:34 +00:00
Akira Hatanaka 1fb1b8b811 [mips] Fix FP branch instructions to have explicit FP condition code register 
operands.

llvm-svn: 187238
 2013-07-26 20:13:47 +00:00
Akira Hatanaka 0b40014d4e [mips] Delete register print method MipsInstPrinter::printCPURegs that is not 
needed. The generic method printOperand will do.

No functionality change.

llvm-svn: 187231
 2013-07-26 18:50:42 +00:00
Akira Hatanaka 53900e5124 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo 
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3

llvm-svn: 187229
 2013-07-26 18:34:25 +00:00
Jack Carter 9c1a027fe8 This patch that sets the EmitAlias flag in td files 
and enables the instruction printer to print aliased 
instructions. 

Due to usage of RegisterOperands a change in common 
code (utils/TableGen/AsmWriterEmitter.cpp) is required 
to get the correct register value if it is a RegisterOperand.

Contributer: Vladimir Medic
 
llvm-svn: 174358
 2013-02-05 08:32:10 +00:00
Jack Carter 873c724b4a This patch tackles the problem of parsing Mips 
register names in the standalone assembler llvm-mc.

Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.


The problem is resolved by the Mips specific AsmParser 
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.


Contributer: Vladimir Medic
llvm-svn: 172284
 2013-01-12 01:03:14 +00:00
Akira Hatanaka bb6e74a2f1 [mips] Generate big GOT code. 
llvm-svn: 168460
 2012-11-21 20:40:38 +00:00
Akira Hatanaka 6035fe78c7 Add HIGHER and HIGHEST relocations to Mips backend. 
llvm-svn: 160599
 2012-07-21 03:09:04 +00:00
Akira Hatanaka 7d33c78e3b Enclose instruction rdhwr with directives, which are needed when target is 
mips32 rev1 (the directives are emitted when target is mips32r2 too).

llvm-svn: 159770
 2012-07-05 19:26:38 +00:00
Benjamin Kramer 1c0541b031 Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter. 
All implementations used the same code.

llvm-svn: 153866
 2012-04-02 08:32:38 +00:00
Craig Topper dab9e35ad0 Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. 
llvm-svn: 153863
 2012-04-02 07:01:04 +00:00
Jia Liu f54f60f3ce remove blanks, and some code format 
llvm-svn: 151625
 2012-02-28 07:46:26 +00:00
Jia Liu 9f6101191b remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. 
llvm-svn: 150805
 2012-02-17 08:55:11 +00:00
Jia Liu dd6c1cd4e8 add Emacs tag and fix some comment error in file headers 
llvm-svn: 150775
 2012-02-17 01:23:50 +00:00
Craig Topper e55c556a24 Convert assert(0) to llvm_unreachable 
llvm-svn: 149961
 2012-02-07 02:50:20 +00:00
Akira Hatanaka 9e1d369e3c Tidy up. Simplify logic. No functional change intended. 
llvm-svn: 146896
 2011-12-19 19:52:25 +00:00
Akira Hatanaka bff84e1914 Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object 
emission is not supported yet, but a patch that adds the support should follow
soon.

llvm-svn: 146572
 2011-12-14 18:26:41 +00:00
Bruno Cardoso Lopes 61e6d987bf Add a few moreLocal/Global R_MIPS_GOT related fixups and 
make the addend fixup code a bit more generic

Patch by Jack Carter.

llvm-svn: 145998
 2011-12-07 00:28:57 +00:00
Akira Hatanaka aa1f4c7986 Fix printing of MCSymbolRegExpr. Needs three closing parentheses for 
VK_Mips_GPOFF_HI/LO.

llvm-svn: 144366
 2011-11-11 03:58:36 +00:00
Bruno Cardoso Lopes d5edb3847a Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts. 
Patch by Jack Carter.

llvm-svn: 144139
 2011-11-08 22:26:47 +00:00
Benjamin Kramer 20baffb257 Replace (Lower|Upper)caseString in favor of StringRef's newest methods. 
llvm-svn: 143891
 2011-11-06 20:37:06 +00:00
Owen Anderson bcc3fadad9 These do not need to be conditional on the presence of CommentStream, as they have a fallback path now. 
llvm-svn: 140267
 2011-09-21 17:58:45 +00:00
Owen Anderson 69fa8ffeef In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. 
llvm-svn: 140217
 2011-09-21 00:25:23 +00:00
Owen Anderson a0c3b97221 Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations. 
llvm-svn: 139876
 2011-09-15 23:38:46 +00:00
Akira Hatanaka 83dee99c1b 80 columns. 
llvm-svn: 139339
 2011-09-09 00:13:35 +00:00
Benjamin Kramer dbdff47cb3 Silence compiler warning. 
llvm-svn: 134730
 2011-07-08 20:18:13 +00:00
Akira Hatanaka 9c6028f98e Lower MachineInstr to MC Inst and print to .s files. 
llvm-svn: 134661
 2011-07-07 23:56:50 +00:00