Commit Graph

3 Commits

Author SHA1 Message Date
Peter Collingbourne 628ec9f193 ELF: Place relro sections after non-relro sections in r/w segment.
This is in preparation for my next change, which will introduce a relro
nobits section. That requires that relro sections appear at the end of the
progbits part of the r/w segment so that the relro nobits section can appear
contiguously.

Because of the amount of churn required in the test suite, I'm making this
change separately.

llvm-svn: 291523
2017-01-10 01:21:30 +00:00
Peter Smith de3e73880e [ELF] Add support for static TLS to ARM
The module index dynamic relocation R_ARM_DTPMOD32 is always 1 for an
executable. When static linking and when we know that we are not a shared
object we can resolve the module index relocation statically.
    
The logic in handleNoRelaxTlsRelocation remains the same for Mips as it
has its own custom GOT writing code. For ARM we add the module index
relocation to the GOT when it can be resolved statically.
    
In addition the type of the RelExpr for the static resolution of TlsGotRel
should be R_TLS and not R_ABS as we need to include the size of
the thread control block in the calculation.
    
Addresses the TLS part of PR30218.

Differential revision: https://reviews.llvm.org/D27213

llvm-svn: 288153
2016-11-29 16:23:50 +00:00
Peter Smith fde6213fe8 [ARM] ARM TLS shouldn't use relaxations
The ARM TLS relocations are placed on literal data and not the 
code-sequence, it is therefore not possible to implement the relaxTls* 
functions. This change updates handleMipsTlsRelocation() to
handleNoRelaxTlsRelocation() and incorporates ARM as well as Mips.

The ARM support in handleNoRelaxTlsRelocation() currently needs to ouput
the module index dynamic relocation in all cases as it is relying on the 
dynamic linker to set the module index in the got.

Should address PR30218

Differential Revision: https://reviews.llvm.org/D24827

llvm-svn: 282250
2016-09-23 13:54:48 +00:00