Commit Graph

139857 Commits

Author SHA1 Message Date
Nicolai Haehnle a785209bc2 AMDGPU: Fix Two Address problems with v_movreld
Summary:
The v_movreld machine instruction is used with three operands that are
in a sense tied to each other (the explicit VGPR_32 def and the implicit
VGPR_NN def and use). There is no way to express that using the currently
available operand bits, and indeed there are cases where the Two Address
instructions pass does the wrong thing.

This patch introduces a new set of pseudo instructions that are identical
in intended semantics as v_movreld, but they only have two tied operands.

Having to add a new set of pseudo instructions is admittedly annoying, but
it's a fairly straightforward and solid approach. The only alternative I
see is to try to teach the Two Address instructions pass about Three Address
instructions, and I'm afraid that's trickier and is going to end up more
fragile.

Note that v_movrels does not suffer from this problem, and so this patch
does not touch it.

This fixes several GL45-CTS.shaders.indexing.* tests.

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25633

llvm-svn: 284980
2016-10-24 14:56:02 +00:00
Nico Weber b38d341106 Revert 284971.
It seems to break selfhost on some bots, see e.g.
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/21
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/20
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/22

llvm-svn: 284979
2016-10-24 14:52:04 +00:00
Nirav Dave 1a9044b782 [MC] Fix Various End Of Line Comment checkings
Fix AsmParser lines to correctly handle end-of-line pre-processor
comments parsing when '#' is not the assembly line comment prefix.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25567

llvm-svn: 284978
2016-10-24 14:35:29 +00:00
Pavel Labath 676a875b06 [Chrono] Fix !HAVE_FUTIMENS build
If we don't have futimens(), we fall back to futimes(), which only supports
microsecond timestamps. In that case, we need to explicitly cast away the extra
precision in setLastModificationAndAccessTime().

llvm-svn: 284977
2016-10-24 14:19:28 +00:00
Pavel Labath 51c454c1a9 Remove unused #includes of TimeValue.h. NFC.
llvm-svn: 284975
2016-10-24 14:00:26 +00:00
Pavel Labath bff47b51b6 [Object] Replace TimeValue with std::chrono
Summary:
Most of the changes are very straight-forward. The only choice I had to make was
to use second-precision time points in the Archive classes. I did this because
the archive files use that precision in the on-disk representation anyway.

Reviewers: rafael, zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25773

llvm-svn: 284974
2016-10-24 13:38:27 +00:00
Joel Jones 504bf334b0 AArch64 ILP32 relocations for assembly and ELF
Summary:
Add relocations for AArch64 ILP32. Includes:
  - Addition of definitions for R_AARCH32_*
  - Definition of new -target-abi: ilp32
  - Definition of data layout string
  - Tests for added relocations. Not comprehensive, but matches
    existing tests for 64-bit. Renames "CHECK-OBJ" to "CHECK-OBJ-LP64".
  - Tests for llvm-readobj

Reviewers: zatrazz, peter.smith, echristo, t.p.northover

Subscribers: aemerson, rengolin, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25159

llvm-svn: 284973
2016-10-24 13:37:13 +00:00
Krzysztof Parzyszek f74683f930 [RDF] Add default move constructors/assignment operators
llvm-svn: 284972
2016-10-24 13:15:20 +00:00
Pablo Barrio f9e0d0b7d0 [JumpThreading] Unfold selects that depend on the same condition
Summary:
These are good candidates for jump threading. This enables later opts
(such as InstCombine) to combine instructions from the selects with
instructions out of the selects. SimplifyCFG will fold the select
again if unfolding wasn't worth it.

Patch by James Molloy and Pablo Barrio.

Reviewers: reames, bkramer, mcrosier, gberry, haicheng, jmolloy, sebpop

Subscribers: jojo, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D25477

llvm-svn: 284971
2016-10-24 13:04:45 +00:00
Simon Pilgrim 6d2de6aa9e Fix windows builds by swapping windows.h and wincrypt.h ordering.
We need to include windows.h first even though it breaks default include ordering rules

llvm-svn: 284968
2016-10-24 12:39:23 +00:00
Pavel Labath 757ca886cd Remove TimeValue usage from llvm/Support
Summary:
This is a follow-up to D25416. It removes all usages of TimeValue from
llvm/Support library (except for the actual TimeValue declaration), and replaces
them with appropriate usages of std::chrono. To facilitate this, I have added
small utility functions for converting time points and durations into appropriate
OS-specific types (FILETIME, struct timespec, ...).

Reviewers: zturner, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25730

llvm-svn: 284966
2016-10-24 10:59:17 +00:00
Simon Dardis 9c34854833 [mips] synci microMIPS instruction definition.
Add synci to the microMIPS instruction definitions, mark the MIPS sync & synci
as not being part of microMIPS. This does not cover the sync instruction alias,
as that will be handled with a different patch. Add sync to the valid tests for
microMIPS.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25795

llvm-svn: 284962
2016-10-24 10:23:59 +00:00
Hal Finkel fd448408e3 [llvm-opt-report] Fix unroll-count reporting
Fix the implementation of OptReportLocationInfo's operator < so that contexts
with different unroll counts are reported separately.

llvm-svn: 284957
2016-10-24 05:07:18 +00:00
Craig Topper 8ec5c7326d [AVX-512] Remove masked pmin/pmax intrinsics and autoupgrade to native IR.
Clang patch to replace 512-bit vector and 64-bit element versions with native IR will follow.

llvm-svn: 284955
2016-10-24 04:04:16 +00:00
Sanjay Patel 9ca028c2d6 [DAG] enhance computeKnownBits to handle SRL/SRA with vector splat constant
llvm-svn: 284953
2016-10-23 23:13:31 +00:00
Simon Pilgrim d06641d3dc Use SDValue::getConstantOperandVal() helper. NFCI.
llvm-svn: 284949
2016-10-23 20:17:21 +00:00
Justin Lebar a45e6fde58 Remove LLVM_CONSTEXPR.
Summary: With MSVC 2013 and GCC < 4.8 gone, we can use the "constexpr" keyword.

Reviewers: bkramer, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25901

llvm-svn: 284947
2016-10-23 19:39:16 +00:00
Simon Pilgrim d09c04d267 [CostModel][X86] Added tests for current integer signed/unsigned remainder costs
llvm-svn: 284940
2016-10-23 18:35:02 +00:00
Simon Pilgrim 6ac1e98b09 [X86][SSE] Add SSE41/AVX1 costs for vector shifts.
We were defaulting to SSE2 costs which weren't taking into account the availability of PBLENDW/PBLENDVB to improve merging of per-element shift results.

llvm-svn: 284939
2016-10-23 16:49:04 +00:00
Simon Pilgrim e16b1e2271 [CostModel][X86] Added tests for current integer trunc costs
llvm-svn: 284938
2016-10-23 15:17:52 +00:00
Simon Pilgrim 96ef0c1103 Use APInt::isAllOnesValue instead of popcnt. NFCI.
More obvious implementation and faster too.

llvm-svn: 284937
2016-10-23 15:09:44 +00:00
Dylan McKay 479a13c0aa [AVR] Add the machine code disassembler
This adds a super basic implementation of a machine code disassembler.

It doesn't support any operands with custom encoding.

llvm-svn: 284930
2016-10-22 23:57:59 +00:00
Simon Pilgrim d3829c89bc [X86][AVX512VL] Added support for combining target 256-bit shuffles to AVX512VL VPERMV3
llvm-svn: 284922
2016-10-22 20:15:39 +00:00
Simon Pilgrim 56c0524f0f [X86][AVX512] Added support for combining target shuffles to AVX512 VPERMV3
llvm-svn: 284921
2016-10-22 19:53:59 +00:00
Brian Gesiak ae8c2517b4 [lit] Add more testing instructions to README
Summary:
r283710 introduced two regressions, one to llvm-lit, and the other to
lit executables that were installed via setuptools. Add instructions on
how to test for these regressions in the future.

Reviewers: ddunbar, delcypher, beanz, chapuni, cmatthews, echristo

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25459

llvm-svn: 284919
2016-10-22 17:27:31 +00:00
James Molloy 2bae8640d7 [ARM] Fix crash in ConstantIslands
tPCRelJT may not be the first instruction in a block. Check that instead of dereferencing a broken iterator.

llvm-svn: 284917
2016-10-22 09:58:37 +00:00
Zvi Rackover 8eb99d88d4 [X86] Apply the Update LLC Test Checks tool on the mmx-bitcast test
llvm-svn: 284916
2016-10-22 07:15:00 +00:00
Craig Topper b084c90a18 [X86] Add support for printing shuffle comments for VALIGN instructions.
llvm-svn: 284915
2016-10-22 06:51:56 +00:00
Craig Topper 7b2b8db438 [X86] Add support for lowering v4i64 and v8i64 shuffles directly to PALIGNR. I think shuffle combine can figure it out later, but we should try to get it right up front.
llvm-svn: 284914
2016-10-22 06:51:52 +00:00
Craig Topper 9f374533e3 [X86] Remove unnecessary AVX2 check that was already covered by an assertion earlier in the function. NFC
llvm-svn: 284913
2016-10-22 06:51:49 +00:00
Craig Topper bea5cb5491 [X86] Remove 128-bit lane handling from the main loop of matchVectorShuffleAsByteRotate. Instead check for is128LaneRepeatedSuffleMask before the loop and just loop over the repeated mask.
I plan to use the loop to support VALIGND/Q shuffles so this makes it easier to reuse.

llvm-svn: 284912
2016-10-22 06:51:44 +00:00
Simon Pilgrim 0d376bcbf0 [X86][SSE] Use getConstVector helper for VPERMV mask generation. NFCI.
llvm-svn: 284911
2016-10-22 06:18:36 +00:00
Daniel Berlin f5361139bb Now that VS2013 is gone, make a memoryssa structure an anonymous union again
llvm-svn: 284910
2016-10-22 04:15:41 +00:00
Kostya Serebryany 65f102d4d2 [libFuzzer] mutation: insert the size of the input in bytes as one of the ways to mutate a binary integer
llvm-svn: 284909
2016-10-22 03:48:53 +00:00
Gerolf Hoflehner 9e2afa8bd7 [BasicAA] Fix - missed alias in GEP expressions
In BasicAA GEP operand values get adjusted ("wrap-around") based on the
pointersize. Otherwise, in non-64b modes, AA could report false negatives.
However, a wrap-around is valid only for a fully evaluated expression.
It had been introduced to fix an alias problem in
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160118/326163.html.
This commit restricts the wrap-around to constant gep operands only where the
value is known at compile-time.

llvm-svn: 284908
2016-10-22 02:41:39 +00:00
Davide Italiano 738837eed9 [CtorUtils] Modernize. No functional changes intended.
llvm-svn: 284904
2016-10-22 01:21:24 +00:00
Kostya Serebryany 10ae9e23a3 [libFuzzer] typo in a test
llvm-svn: 284903
2016-10-22 01:07:38 +00:00
Kostya Serebryany 2bfff021ad [libFuzzer] add a test for asan's strict_string_checks=1
llvm-svn: 284902
2016-10-22 00:05:44 +00:00
David L. Jones 0db4549a1e Fix map insertion that is elided in release build.
The assert() macro doesn't actually execute its body in Release builds, so using
it to check cache invariants requires that the insertion be outside of the
assert() statement. This change does that, and also makes sure to return the
actual map contents.

llvm-svn: 284898
2016-10-21 23:30:39 +00:00
Sanjay Patel 5b7767f646 [x86] add test for missing vector SRA combine via computeKnownBits
llvm-svn: 284896
2016-10-21 23:02:31 +00:00
Justin Lebar 7b15e2946f [ADT] Don't rely on string literals not being convertible to non-const char* in CachedHashString.
The build was breaking on some platforms because we assumed that
CachedHashString("foo") would match the CachedHashString(StringRef)
constructor rather than the CachedHashString(char*) constructor.

To fix this, provide a CachedHashString(const char*) constructor, and
add a dummy argument to the old CachedHashString(char*) constructor.

llvm-svn: 284892
2016-10-21 22:10:23 +00:00
Konstantin Zhuravlyov fda33eaf0c [AMDGPU] Perform uchar to float combine for ISD::SINT_TO_FP
This will prevent following regression when enabling i16 support (D18049):
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll

Differential Revision: https://reviews.llvm.org/D25805

llvm-svn: 284891
2016-10-21 22:10:03 +00:00
Justin Lebar 5e83dfedb8 Switch SmallSetVector to use DenseSet when it overflows its inline space.
Summary:
SetVector already used DenseSet, but SmallSetVector used std::set.  This
leads to surprising performance differences.  Moreover, it means that
the set of key types accepted by SetVector and SmallSetVector are
quite different!

In order to make this change, we had to convert some callsites that used
SmallSetVector<std::string, N> to use SmallSetVector<CachedHashString, N>
instead.

Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25648

llvm-svn: 284887
2016-10-21 21:45:01 +00:00
Justin Bogner 8659d16631 Support: Annotate Error and Expected<> with LLVM_NODISCARD
It's always a mistake to ignore return values with Error or Expected
types.

llvm-svn: 284884
2016-10-21 21:01:12 +00:00
Bob Haarman 62c730c9bd fixed typo in InstrProf.h; NFC
llvm-svn: 284880
2016-10-21 20:38:37 +00:00
Justin Lebar 3c37dc0cb2 [ADT] Get rid of use of LLVM_NOEXCEPT in CachedHashString.h.
LLVM_NOEXCEPT is no longer necessary (yay).

llvm-svn: 284876
2016-10-21 20:28:00 +00:00
Tom Stellard 6c7dd980e4 AMDGPU/SI: Fix crash caused by r284267
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25782

llvm-svn: 284875
2016-10-21 20:25:11 +00:00
Sanjay Patel ca92c36e01 [DAG] enhance computeKnownBits to handle SHL with vector splat constant
Also, use APInt to avoid crashing on types larger than vNi64.

llvm-svn: 284874
2016-10-21 20:16:27 +00:00
Justin Lebar c9d66eb05b [ADT] Compare strings' hashes first before comparing their values.
Summary:
We already have the hashes in hand, and comparing hashes should be much
more discriminatory than comparing the StringRefs' sizes.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25705

llvm-svn: 284872
2016-10-21 20:10:51 +00:00
Justin Lebar d87ea9a1c9 [ADT] Add CachedHashString.
Summary:
This is like CachedHashStringRef, but owns its data.

This lets us use strings inside of DenseMaps.

Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25645

llvm-svn: 284871
2016-10-21 20:10:48 +00:00
Justin Lebar 245c3e75cd [IR] Add DenseMapInfo<CallSite>.
Summary:
A CallSite is basically an Instruction*, and you can put Instruction*s
into DenseMaps, so you should be able to do the same with CallSites.

This is used in a later patch.

Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25643

llvm-svn: 284870
2016-10-21 20:10:44 +00:00
Li Huang faa857dba7 [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor.
Summary:
When SCEVRewriteVisitor traverses the SCEV DAG, it may visit the same SCEV
multiple times if this SCEV is referenced by multiple other SCEVs. This has
exponential time complexity in the worst case. Memoizing the results will
avoid re-visiting the same SCEV. Add a map to save the results, and override
the visit function of SCEVVisitor. Now SCEVRewriteVisitor only visit each
SCEV once and thus returns the same result for the same input SCEV.

This patch fixes PR18606, PR18607.

Reviewers: Sanjoy Das, Mehdi Amini, Michael Zolotukhin

Differential Revision: https://reviews.llvm.org/D25810

llvm-svn: 284868
2016-10-21 20:05:21 +00:00
Kevin Enderby 2f9d8d0702 Fix a bug in the code of llvm-cxxdump in dumpArchive() when
iterating over an archive with object and non-object members that
would cause an Abort because to was not calling consumeError()
when the code was wanting to ignore a non-object file.

Found by Justin Bogner!

llvm-svn: 284867
2016-10-21 20:03:14 +00:00
Kostya Serebryany 42909a6f3a [libFuzzer] mention one more trophie
llvm-svn: 284866
2016-10-21 20:01:45 +00:00
Peter Collingbourne ecdd58f1d6 Analysis: Move llvm::getConstantRangeFromMetadata to IR library.
We're about to start using it there.

Differential Revision: https://reviews.llvm.org/D25877

llvm-svn: 284865
2016-10-21 19:59:26 +00:00
Peter Collingbourne e9bd49824d X86: Improve BT instruction selection for 64-bit values.
If a 64-bit value is tested against a bit which is known to be in the range
[0..31) (modulo 64), we can use the 32-bit BT instruction, which has a slightly
shorter encoding.

Differential Revision: https://reviews.llvm.org/D25862

llvm-svn: 284864
2016-10-21 19:57:55 +00:00
Simon Pilgrim ab48872313 [X86][AVX512BWVL] Added support for lowering v16i16 shuffles to AVX512BWVL vpermw
llvm-svn: 284863
2016-10-21 19:54:38 +00:00
Bob Haarman 653baa2aaa [pdb] added support for dumping globals stream
Summary: This adds support for dumping the globals stream from PDB files using llvm-pdbdump, similar to the support we have for the publics stream.

Reviewers: ruiu, zturner

Subscribers: beanz, mgorny, modocache

Differential Revision: https://reviews.llvm.org/D25801

llvm-svn: 284861
2016-10-21 19:43:19 +00:00
Simon Pilgrim da814cba0d [X86][AVX512BWVL] Added support for combining target v16i16 shuffles to AVX512BWVL vpermw
llvm-svn: 284860
2016-10-21 19:40:29 +00:00
Simon Pilgrim 0109bf116f [X86][AVX512] Added support for combining target shuffles to AVX512 vpermpd/vpermq/vpermps/vpermd/vpermw
llvm-svn: 284858
2016-10-21 19:18:09 +00:00
Krzysztof Parzyszek 6e7fa99d3a [RDF] Use RegisterId typedef more consistently, NFC
llvm-svn: 284857
2016-10-21 19:12:13 +00:00
Anna Thomas 0860259434 [StripGCRelocates] New pass to remove gc.relocates added by RS4GC
Summary:
Utility pass to remove gc.relocates created by rewrite statepoints for GC.
With respect to safepoint verification, the IR generated would be incorrect, and cannot run
as such.

This would be a single transformation on the final optimized IR.
The benefit of the pass is for easy analysis when the IRs are 'polluted' by too
many gc.relocates.
Added tests.

test run: All RS4GC tests with -verify option. Local downstream tests on large
IR files. This also works when the pointer being gc.relocated is another
gc.relocate.

Reviewers: sanjoy, reames

Subscribers: beanz, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D25096

llvm-svn: 284855
2016-10-21 18:43:16 +00:00
Kevin Enderby 41c9c00bf0 For llvm-objdump for Mach-O files add printing of
the ARM_THREAD_STATE in the same format as
otool-classic(1) on darwin.

Also remove an extra space in printing the initprot to make
the output match otool-classic(1) on darwin.

rdar://28851457

llvm-svn: 284852
2016-10-21 18:22:35 +00:00
Sanjay Patel 81029f6a76 [DAG] fold negation of sign-bit
0 - X --> 0, if the sub is NUW
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW
0 - X --> X, if X is 0 or the minimum signed value

This is the DAG equivalent of:
https://reviews.llvm.org/rL284649

plus the fold for the NUW case which already existed in InstSimplify.

Note that we miss a vector fold because of a deficiency in the DAG version of
computeKnownBits().

llvm-svn: 284844
2016-10-21 17:24:26 +00:00
Sanjay Patel 97de8a4c3a [x86] add tests for potential negation folds
These are the backend equivalents for the tests added in r284627.
The patterns may emerge late, so we should have folds for these in the DAG too.

llvm-svn: 284842
2016-10-21 16:56:29 +00:00
Krzysztof Parzyszek b71085b547 [Hexagon] Handle spills of partially defined double vector registers
After register allocation it is possible to have a spill of a register
that is only partially defined. That in itself it fine, but creates a
problem for double vector registers. Stores of such registers are pseudo
instructions that are expanded into pairs of individual vector stores,
and in case of a partially defined source, one of the stores may use
an entirely undefined register. To avoid this, track the defined parts
and only generate actual stores for those.

llvm-svn: 284841
2016-10-21 16:38:29 +00:00
Derek Schuff 6f69783f1f [WebAssembly] Fix for 0xc call_indirect changes
Summary:
Need to reorder the operands to have the callee as the last argument.
Adds a pseudo-instruction, and a pass to lower it into a real
call_indirect.

This is the first of two options for how to fix the problem.

Reviewers: dschuff, sunfish

Subscribers: jfb, beanz, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D25708

llvm-svn: 284840
2016-10-21 16:38:07 +00:00
Abderrazek Zaafrani 9daf8110c8 Set the vectorizer MaxInterleaveFactor for Exynos.
llvm-svn: 284839
2016-10-21 16:28:27 +00:00
Reid Kleckner ac2a2a86e4 Fix -Wunused-variable warning in libFuzzer
llvm-svn: 284838
2016-10-21 16:26:27 +00:00
Simon Pilgrim 372e916a3f [X86][SSE] Regenerated sext/zext constant folding tests and added i686 tests
llvm-svn: 284837
2016-10-21 16:22:16 +00:00
Simon Pilgrim 2d96daa885 [X86] Use DAG::getBuildVector helper wrapper where possible. NFCI.
llvm-svn: 284835
2016-10-21 16:07:51 +00:00
Konstantin Zhuravlyov 0ff17b627d [MachineMemOperand][AtomicSDNode] Remove getSuccessOrdering()
Differential Revision: https://reviews.llvm.org/D25786

llvm-svn: 284834
2016-10-21 16:02:35 +00:00
Simon Pilgrim 098bd72804 [X86][SSE] Regenerated chained pmovsx store tests and added i686 tests
llvm-svn: 284833
2016-10-21 15:51:24 +00:00
Abderrazek Zaafrani 9f382f53d1 Test commit
llvm-svn: 284832
2016-10-21 15:24:08 +00:00
Artur Pilipenko 47dc098c06 [LVI] Fix a bug with a guard being the very first instruction in a BB not taken into account
While looking for guards use reverse iterator and scan up to rend() not to begin()

llvm-svn: 284827
2016-10-21 15:02:21 +00:00
Sanjay Patel 501be9b3d7 fix variable names; NFCI
Because we're just 'or-ing' these 2 variables later in the code, I
don't think there's a logical bug here, but of course the string with
"no size" is the one that should have the size suffix stripped off.

llvm-svn: 284826
2016-10-21 14:58:30 +00:00
Artem Tamazov 751985a757 [AMDGPU][mc] Fix ds_min/max[_rtn]_f32 - extra source operand removed.
Fixes Bug 28215. Lit tests updated.

Differential Revision: https://reviews.llvm.org/D25837

llvm-svn: 284825
2016-10-21 14:49:22 +00:00
Sanjay Patel cbaba93ce8 [DAG] use SDNode flags 'nsz' to enable fadd/fsub with zero folds
As discussed in D24815, let's start the process of killing off the broken fast-math global
state housed in TargetOptions and eliminate the need for function-level fast-math attributes.

Here we enable two similar folds that are possible when we don't care about signed-zero:
fadd nsz x, 0 --> x
fsub nsz 0, x --> -x

Note that although the test cases include a 'sin' function call, I'm side-stepping the 
FMF-on-calls question (and lack of support in the DAG) for now. It's not needed for these
tests - isNegatibleForFree/GetNegatedExpression just look through a ISD::FSIN node.

Also, when we create an FNEG node and propagate the Flags of the FSUB to it, this doesn't
actually do anything today because Flags are silently dropped for any node that is not a
binary operator.

Differential Revision: https://reviews.llvm.org/D25297

llvm-svn: 284824
2016-10-21 14:36:58 +00:00
Simon Pilgrim c98d99a600 [X86][AVX2] Begun generalizing lowering to VPERMD/VPERMPS in preparation for AVX512 support.
llvm-svn: 284823
2016-10-21 13:00:47 +00:00
Simon Pilgrim f3e9ddbf77 Wdocumentation fix
llvm-svn: 284822
2016-10-21 12:51:16 +00:00
Simon Pilgrim 32b06235da [X86][AVX512] Add mask/maskz writemask support to subvector broadcast shuffle decode comments
llvm-svn: 284821
2016-10-21 12:14:24 +00:00
John Brawn 84b21835f1 [LoopUnroll] Keep the loop test only on the first iteration of max-or-zero loops
When we have a loop with a known upper bound on the number of iterations, and
furthermore know that either the number of iterations will be either exactly
that upper bound or zero, then we can fully unroll up to that upper bound
keeping only the first loop test to check for the zero iteration case.

Most of the work here is in plumbing this 'max-or-zero' information from the
part of scalar evolution where it's detected through to loop unrolling. I've
also gone for the safe default of 'false' everywhere but howManyLessThans which
could probably be improved.

Differential Revision: https://reviews.llvm.org/D25682

llvm-svn: 284818
2016-10-21 11:08:48 +00:00
Simon Pilgrim f447fbf913 [X86][AVX] Add 32-bit target tests for vector lzcnt/tzcnt to demonstrate missed folding opportunities
llvm-svn: 284816
2016-10-21 10:50:52 +00:00
Bjorn Pettersson 9fcd605d1e [AArch64] Corrected spill size for DDD register class. NFCI
Summary:
The spill size was incorrectly set to 196 bits,
which isn't a multiple of 8. This problem was detected when
experimenting with asserts that the spill size should be a
multiple of the byte size.

New corrected value for the spill size is set to 192 bits.

Note that tablegen (RegisterInfoEmitter) will divide the
size set in the RegisterClass definition by 8. So this
change should not have any impact on the tablegen output
(trunc(192/8) == trunc(196/8) == 24 bytes).

Reviewers: t.p.northover

Subscribers: llvm-commits, aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D25818

llvm-svn: 284814
2016-10-21 09:53:42 +00:00
Benjamin Kramer 0d41eb8cd1 Fix WebAssembly test after r284757.
The change to MachineSink shuffles code around, disable it.

llvm-svn: 284813
2016-10-21 09:51:41 +00:00
Benjamin Kramer aa48572b9d [Support] Fix AlignOf test on i386-linux.
On i386 alignof(double) = 8 is not the same as alignof(struct { double
}) = 4. This used to be not an issue because the old implementation
always measured alignment inside of structs. Wrap a dummy struct around
the test to avoid this issue.

llvm-svn: 284812
2016-10-21 09:15:57 +00:00
Craig Topper c1db0db864 [AVX-512] Add tests to show opportunities for commuting vpermi2/vpermt2 instructions.
Commuting will be added in a future commit.

llvm-svn: 284808
2016-10-21 05:55:40 +00:00
Davide Italiano d15477b09d Revert "[GVN/PRE] Hoist global values outside of loops."
There's no agreement about this patch. I personally find the
PRE machinery of the current GVN hard enough to reason about
that I'm not sure I'll try to land this again, instead of working
on the rewrite).

llvm-svn: 284796
2016-10-21 01:37:02 +00:00
Keno Fischer b04df8eaa2 Fix cross-endianness RuntimeDyld relocation for ARM
rL284780 fixed the PREL31 relocation and added a test for it. Being
the first such test for ARM relocations, it exposed incorrect endianness
assumptions (causing buildbot failures on big-endian hosts). Fix that by
using the same helpers used for the x86 case.

llvm-svn: 284789
2016-10-20 22:15:56 +00:00
Li Huang fcfe8cd3ae [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV
This is to avoid inlining too many multiplication operands into a SCEV, which could 
take exponential time in the worst case.

Reviewers: Sanjoy Das, Mehdi Amini, Michael Zolotukhin

Differential Revision: https://reviews.llvm.org/D25794

llvm-svn: 284784
2016-10-20 21:38:39 +00:00
Keno Fischer c32ffe3916 Fix PREL31 relocation on ARM
Summary:
This is a 31bits relative relocation instead of a 32bits absolute relocation.

Reviewers: t.p.northover, peter.smith, rengolin

Subscribers: aemerson, llvm-commits, samparker

Differential Revision: https://reviews.llvm.org/D25069

llvm-svn: 284780
2016-10-20 21:15:29 +00:00
Michael Kuperstein b2443ed62b [X86] Enable interleaved memory access by default
This lets the loop vectorizer generate interleaved memory accesses on x86.

Differential Revision: https://reviews.llvm.org/D25350

llvm-svn: 284779
2016-10-20 21:04:31 +00:00
Daniel Berlin cd2deacac6 [MSSA] Avoid unnecessary use walks when calling getClobberingMemoryAccess
Summary:
This allows us to mark when uses have been optimized.
This lets us avoid rewalking (IE when people call getClobberingAccess on everything), and also
enables us to later relax the requirement of use optimization during updates with less cost.

Reviewers: george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25172

llvm-svn: 284771
2016-10-20 20:13:45 +00:00
Kevin Enderby c8bb42283e Another additional error check for invalid Mach-O files for the
load commands that use the MachO::twolevel_hints_command type
which includes only the LC_TWOLEVEL_HINTS load command.

This is not used in llvm libObject code or in llvm tool code.  But
does appear in one of the binary test files.  While this load command is
obsolete it is easier to add code for it in libObject than edit or change
the binary test case.

llvm-svn: 284769
2016-10-20 20:10:30 +00:00
Zachary Turner 6e2c89b54a Fix case of file include path.
llvm-svn: 284763
2016-10-20 18:34:37 +00:00
Zachary Turner 4d49eb9fa0 [CodeView] Refactor serialization to use StreamInterface.
This was all using ArrayRef<>s before which presents a problem
when you want to serialize to or deserialize from an actual
PDB stream.  An ArrayRef<> is really just a special case of
what can be handled with StreamInterface though (e.g. by using
a ByteStream), so changing this to use StreamInterface allows
us to plug in a PDB stream and get all the record serialization
and deserialization for free on a MappedBlockStream.

Subsequent patches will try to remove TypeTableBuilder and
TypeRecordBuilder in favor of class that operate on
Streams as well, which should allow us to completely merge
the reading and writing codepaths for both types and symbols.

Differential Revision: https://reviews.llvm.org/D25831

llvm-svn: 284762
2016-10-20 18:31:19 +00:00
Konstantin Zhuravlyov 521e5ef4ce [AMDGPU] Make note record name a static const member of target streamer
Differential Revision: https://reviews.llvm.org/D25746

llvm-svn: 284760
2016-10-20 18:22:36 +00:00
Konstantin Zhuravlyov 08326b6256 [AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
Differential Revision: https://reviews.llvm.org/D25693

llvm-svn: 284759
2016-10-20 18:12:38 +00:00
Dehao Chen f03f51555a Using branch probability to guide critical edge splitting.
Summary:
The original heuristic to break critical edge during machine sink is relatively conservertive: when there is only one instruction sinkable to the critical edge, it is likely that the machine sink pass will not break the critical edge. This leads to many speculative instructions executed at runtime. However, with profile info, we could model the splitting benefits: if the critical edge has 50% taken rate, it would always be beneficial to split the critical edge to avoid the speculated runtime instructions. This patch uses profile to guide critical edge splitting in machine sink pass.

The performance impact on speccpu2006 on Intel sandybridge machines:

spec/2006/fp/C++/444.namd                  25.3  +0.26%
spec/2006/fp/C++/447.dealII               45.96  -0.10%
spec/2006/fp/C++/450.soplex               41.97  +1.49%
spec/2006/fp/C++/453.povray               36.83  -0.96%
spec/2006/fp/C/433.milc                   23.81  +0.32%
spec/2006/fp/C/470.lbm                    41.17  +0.34%
spec/2006/fp/C/482.sphinx3                48.13  +0.69%
spec/2006/int/C++/471.omnetpp             22.45  +3.25%
spec/2006/int/C++/473.astar               21.35  -2.06%
spec/2006/int/C++/483.xalancbmk           36.02  -2.39%
spec/2006/int/C/400.perlbench              33.7  -0.17%
spec/2006/int/C/401.bzip2                  22.9  +0.52%
spec/2006/int/C/403.gcc                   32.42  -0.54%
spec/2006/int/C/429.mcf                   39.59  +0.19%
spec/2006/int/C/445.gobmk                 26.98  -0.00%
spec/2006/int/C/456.hmmer                 24.52  -0.18%
spec/2006/int/C/458.sjeng                 28.26  +0.02%
spec/2006/int/C/462.libquantum            55.44  +3.74%
spec/2006/int/C/464.h264ref               46.67  -0.39%

geometric mean                                   +0.20%

Manually checked 473 and 471 to verify the diff is in the noise range.

Reviewers: rengolin, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24818

llvm-svn: 284757
2016-10-20 18:06:52 +00:00
Simon Pilgrim 365be4f95c [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors
We weren't checking for uniform const costs before the general cost, resulting in very high estimates.

llvm-svn: 284755
2016-10-20 18:00:35 +00:00
Pirama Arumuga Nainar 05b0f93ad3 Fix *_EXTEND_VECTOR_INREG legalization
Summary:
While promoting *_EXTEND_VECTOR_INREG nodes whose inputs are already
promoted, perform the appropriate sign extension for the promoted node
before doing the *_EXTEND_VECTOR_INREG operation.  If not, the undefined
high-order bits of the promoted operand may (a) be garbage inc ase of
zext) or (b) contribute the wrong sign-bit (in case of sext)

Updated the promote-vec3.ll test after this change.  The diff shows
explicit zeroing in case of zext and intermediate sign extension in case
of sext.

Reviewers: RKSimon

Subscribers: llvm-commits, srhines

Differential Revision: https://reviews.llvm.org/D25790

llvm-svn: 284752
2016-10-20 17:56:36 +00:00
Simon Pilgrim 1388c0acc1 [CostModel][X86] Added tests for sdiv/udiv costs for uniform const and uniform const power-of-2
Shows poor costings in AVX1/AVX512BW for certain vector types

llvm-svn: 284748
2016-10-20 17:16:38 +00:00
Sanjay Patel 0051efcf97 [Target] remove TargetRecip class; 2nd try
This is a retry of r284495 which was reverted at r284513 due to use-after-scope bugs
caused by faulty usage of StringRef.

This version also renames a pair of functions:
getRecipEstimateDivEnabled()
getRecipEstimateSqrtEnabled()
as suggested by Eric Christopher.

original commit msg:

[Target] remove TargetRecip class; move reciprocal estimate isel functionality to TargetLowering

This is a follow-up to https://reviews.llvm.org/D24816 - where we changed reciprocal estimates to be function attributes
rather than TargetOptions.

This patch is intended to be a structural, but not functional change. By moving all of the
TargetRecip functionality into TargetLowering, we can remove all of the reciprocal estimate
state, shield the callers from the string format implementation, and simplify/localize the
logic needed for a target to enable this.

If a function has a "reciprocal-estimates" attribute, those settings may override the target's
default reciprocal preferences for whatever operation and data type we're trying to optimize.
If there's no attribute string or specific setting for the op/type pair, just use the target
default settings.

As noted earlier, a better solution would be to move the reciprocal estimate settings to IR
instructions and SDNodes rather than function attributes, but that's a multi-step job that
requires infrastructure improvements. I intend to work on that, but it's not clear how long
it will take to get all the pieces in place.

Differential Revision: https://reviews.llvm.org/D25440

llvm-svn: 284746
2016-10-20 16:55:45 +00:00
Benjamin Kramer d65ec2ceb2 Put the move ctor for PassManager back for now, it breaks some builds.
For some reason using the default move ctor creates undefined references
to it.

llvm-svn: 284745
2016-10-20 16:50:07 +00:00
Simon Pilgrim 025e26dd32 [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer vectors
We weren't accounting for legal types on every subtarget, meaning that many of the costs were using defaults.

We still don't correctly cost (or test) the 512-bit sdiv/udiv by uniform const cases, nor the power-of-2 cases.

llvm-svn: 284744
2016-10-20 16:39:11 +00:00
Valery Pykhtin e55fd41f73 [AMDGPU] add fcopysign(f64, f32) pattern
Differential revision: https://reviews.llvm.org/D25827

llvm-svn: 284743
2016-10-20 16:17:54 +00:00
Benjamin Kramer b667ef79ea [Support] Put back the MSVC hack for AlignedCharArray.
MSVC 2015 still errors when passing an alignas'd object by value as an
argument.

llvm-svn: 284738
2016-10-20 15:53:04 +00:00
Benjamin Kramer abe323ef8e [Support] Remove llvm::alignOf now that all uses are gone.
Also clean up the legacy hacks for AlignedCharArray. I'm keeping
LLVM_ALIGNAS alive for a bit longer because GCC 4.8.0 (which we still
support apparently) shipped a buggy alignas(). All other supported
compilers have a working alignas.

llvm-svn: 284736
2016-10-20 15:36:38 +00:00
Benjamin Kramer b2505005c7 Retire llvm::alignOf in favor of C++11 alignof.
No functionality change intended.

llvm-svn: 284733
2016-10-20 15:02:18 +00:00
Benjamin Kramer 26b2593b24 [GVN] Use defaulted members. No functional change.
llvm-svn: 284726
2016-10-20 13:09:12 +00:00
Simon Dardis 226752c15d [mips][mcjit] Add the majority of N32 support.
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.

Patch by: Daniel Sanders

llvm-svn: 284724
2016-10-20 13:02:23 +00:00
Simon Pilgrim 16cc616ebc [CostModel][X86] Added tests for sdiv/udiv costs for scalar and 128/256/512 bit integer vectors
Shows current bug in AVX1/AVX512BW costs for 256 bit vector types

llvm-svn: 284723
2016-10-20 12:34:00 +00:00
Benjamin Kramer 2a8bef8769 Do a sweep over move ctors and remove those that are identical to the default.
All of these existed because MSVC 2013 was unable to synthesize default
move ctors. We recently dropped support for it so all that error-prone
boilerplate can go.

No functionality change intended.

llvm-svn: 284721
2016-10-20 12:20:28 +00:00
Pavel Labath 59838f7ea6 Reapply "Add Chrono.h - std::chrono support header"
This is a resubmission of r284590. The mingw build should be fixed now. The
problem was we were matching time_t with _localtime_64s, which was incorrect on
_USE_32BIT_TIME_T systems. Instead I use localtime_s, which should always
evaluate to the correct function.

llvm-svn: 284720
2016-10-20 12:05:50 +00:00
Simon Pilgrim 618d3aedaf [DAGCombiner] Add general constant vector support to (srl (shl x, c), c) -> (and x, cst2)
We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

llvm-svn: 284717
2016-10-20 11:10:21 +00:00
Simon Pilgrim 46aa89399d Wdocumentation fix
llvm-svn: 284715
2016-10-20 10:53:38 +00:00
Simon Pilgrim 25059360d5 Fix spelling mistake in comment.
llvm-svn: 284714
2016-10-20 10:42:14 +00:00
Simon Pilgrim 071da46a35 Fix MSVC bool -> uint64_t promotion warning
llvm-svn: 284713
2016-10-20 10:37:58 +00:00
Benjamin Kramer 656d821aa8 [Go bindings] Update for r284678 API changes.
Alignment moved from createBasicType to createAutoVariable.

llvm-svn: 284707
2016-10-20 09:14:39 +00:00
Jonas Paulsson 8010b631d5 [SystemZ] Post-RA scheduler implementation
Post-RA sched strategy and scheduling instruction annotations for z196, zEC12
and z13.

This scheduler optimizes decoder grouping and balances processor resources
(including side steering the FPd unit instructions).

The SystemZHazardRecognizer keeps track of the scheduling state, which can
be dumped with -debug-only=misched.

Reviers: Ulrich Weigand, Andrew Trick.
https://reviews.llvm.org/D17260

llvm-svn: 284704
2016-10-20 08:27:16 +00:00
George Rimar de69e9f5db [Object/ELF] - Check index argument in getSymbol().
Without this check LLD crashes when SHT_GROUP section has invalid symbol index
because of next code:

template <class ELFT>
StringRef elf::ObjectFile<ELFT>::getShtGroupSignature(const Elf_Shdr &Sec) {
..
  const Elf_Sym *Sym = Obj.getSymbol(Symtab, Sec.sh_info);
..
}
If sh_info is too large, &Symbols[Index] just asserts.

No testcases provided because llvm-objdump/llvm-readelf does 
not use getSymbol() function.

I`ll commit testcase for LLD separatelly.

Differential revision: https://reviews.llvm.org/D25516

llvm-svn: 284702
2016-10-20 08:03:10 +00:00
Peter Collingbourne c7766778a0 X86: Allow expressions to appear as u8imm operands.
llvm-svn: 284688
2016-10-20 01:58:34 +00:00
Peter Collingbourne de1f039360 X86: Deduplicate some lowering code. NFCI.
llvm-svn: 284686
2016-10-20 01:21:26 +00:00
Victor Leschuk 2461a2e2c5 DebugInfo: remove broken bitcode upgrade test
llvm-svn: 284682
2016-10-20 00:26:36 +00:00
Reid Kleckner 40d7230f2f Use __func__ directly now that all supported compilers support it
Remove the portability macro now that it is unused.

llvm-svn: 284681
2016-10-20 00:22:23 +00:00
Victor Leschuk 2ede126b1b DebugInfo: preparation to implement DW_AT_alignment
- Add alignment attribute to DIVariable family
 - Modify bitcode format to match new DIVariable representation
 - Update tests to match these changes (also add bitcode upgrade test)
 - Expect that frontend passes non-zero align value only when it is not default
   (was forcibly aligned by alignas()/_Alignas()/__atribute__(aligned())

Differential Revision: https://reviews.llvm.org/D25073

llvm-svn: 284678
2016-10-20 00:13:12 +00:00
Derek Schuff 7edf93bc5b [WebAssembly] Update extending load test for new i1 behavior
r284611 changed the behavior of the DAG legalizer for sign-extending i1
values. Update the wasm extending load test to match.

llvm-svn: 284677
2016-10-20 00:10:34 +00:00
Reid Kleckner 990504e625 Remove LLVM_NOEXCEPT and replace it with noexcept
Now that we have dropped MSVC 2013, all supported compilers support
noexcept and we can drop this portability macro.

llvm-svn: 284672
2016-10-19 23:52:38 +00:00
Kevin Enderby 210030ba95 Next set of additional error checks for invalid Mach-O files for the
load commands that use the MachO::thread_command type
but are not used in llvm libObject code but used in llvm tool code.

This includes the LC_UNIXTHREAD and LC_THREAD
load commands.

A quick note about the philosophy of the error checking in
libObject for Mach-O files, the idea behind the checking is
that we never will return a Mach-O file out of libObject that
contains unknown things in the load commands.

To do this the 32-bit ARM and PPC general tread states
needed to be defined as two test case binaries contained
them.  If other thread states for other CPUs need to be
added we will do that as needed.

Going forward the LC_MAIN load command is used to
set the entry point in Mach-O executables these days
instead of an LC_UNIXTHREAD as was done in the past.
So today only in core files are LC_THREAD load commands
and thread states usually found.

Other thread states have not yet been defined in
include/Support/MachO.h at this time.  But that can be
added as needed with their corresponding checking also
added.

llvm-svn: 284668
2016-10-19 23:44:34 +00:00
Reid Kleckner e1d6998f5d Update Compiler.h to fail fast when building with MSVC 2013
llvm-svn: 284665
2016-10-19 23:34:58 +00:00
Rong Xu fe90d86c8e [PGO] Fix a use-after-move. NFC.
llvm-svn: 284664
2016-10-19 23:31:59 +00:00
Reid Kleckner 98508a8344 Revert "DenseSet: Appease msc18 to define derived constructors explicitly."
This reverts commit r284570. MSVC 18 / 2013 is not supported anymore.

llvm-svn: 284661
2016-10-19 23:04:57 +00:00
Reid Kleckner 6130a2df5c Update docs to reflect new minimum MSVC version requirement
Mailing list discussion about this:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/104631.html

Code changes to simplify the ifdefs will come next, and can be reverted
without affecting the policy if someone needs it.

llvm-svn: 284660
2016-10-19 23:04:41 +00:00
Rong Xu 2c684cfd94 [PGO] Fix bogus warning for merging empty llvm profile file
Profile runtime can generate an empty raw profile (when there is no function in
the shared library). This empty profile is treated as a text format profile.  A
test format profile without the flag of "#IR" is thought to be a clang
generated profile.  So in llvm profile merging, we will get a bogus warning of
"Merge IR generated profile with Clang generated profile."

The fix here is to skip the empty profile (when the buffer size is 0) for
profile merge.

Reviewers: vsk, davidxl

Differential Revision: http://reviews.llvm.org/D25687

llvm-svn: 284659
2016-10-19 22:51:17 +00:00
Lang Hames 1009b0b30f [BuildingAJIT] Use the remote target triple to construct the TargetMachine in
Chapter 5.

Chapter 5 demonstrates remote JITing: code is executed on the remote, not the
machine running the REPL, so it's the remote's triple (and TargetMachine) that
we need.

llvm-svn: 284657
2016-10-19 22:41:03 +00:00
Mehdi Amini db46b7d217 Add computeHostNumPhysicalCores() implementation for Darwin
Differential Revision: https://reviews.llvm.org/D25800

llvm-svn: 284656
2016-10-19 22:36:07 +00:00
Wei Ding 3cb2a1e8d1 AMDGPU : Add a function to enable and disable IEEEBit for SC and shader
respectively.

Differential Revision: http://reviews.llvm.org/D25789

llvm-svn: 284655
2016-10-19 22:34:49 +00:00
Lang Hames 412d045e81 Remove the JIT EH/small code model tests for now.
These tests rely on two sections being allocated with a limited displacement
from one to the other to work. We've never guaranteed this, and consequently
these tests usually fail. That led to them being XFAILed, but now they XPASS
whenever the sections do happen to be allocated nearby in memory. So I'm
removing these for now to get rid of the noise. We can re-instate them if/when
we take the time to implement a displacement-respecting allocator.

llvm-svn: 284654
2016-10-19 22:19:38 +00:00
Chris Bieneman 4646fe0ac9 [CMake] Make the runtimes directory work with bootstrap builds
This patch builds on clang r284648, and allows the runtime directory to make the bootstrap builds depend on the builtin libraries.

This patch also make the bootstrap build depend on configuring the other runtimes because the libcxx headers are copied during configuration. I have left a TODO in the code to remove that once I come up with a better solution.

llvm-svn: 284650
2016-10-19 21:50:25 +00:00
Sanjay Patel efd8885772 [InstSimplify] fold negation of sign-bit
0 - X --> X, if X is 0 or the minimum signed value
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW

I noticed this pattern might be created in the backend after the change from D25485, 
so we'll want to add a similar fold for the DAG.

The use of computeKnownBits in InstSimplify may be something to investigate if the
compile time of InstSimplify is noticeable. We could replace computeKnownBits with 
specific pattern matchers or limit the recursion.

Differential Revision: https://reviews.llvm.org/D25785

llvm-svn: 284649
2016-10-19 21:23:45 +00:00
Lang Hames 9ca9a31948 [BuildingAJIT] Make the chapter 5 server export symbols.
This will allow chapter 5 to work on Linux.

llvm-svn: 284637
2016-10-19 20:22:12 +00:00
Hans Wennborg 2d55d67c62 Typo: nomed struct -> named struct
llvm-svn: 284635
2016-10-19 20:10:03 +00:00
Reid Kleckner f8d1d12fef [GlobalMerge] Handle non-landingpad EH pads
This code crashed on funclet-style EH instructions such as catchpad,
catchswitch, and cleanuppad. Just treat all EH pad instructions
equivalently and avoid merging the globals they reference through any
use.

llvm-svn: 284633
2016-10-19 19:56:22 +00:00
Artur Pilipenko 5c6ef75485 [IndVarSimplify] Teach calculatePostIncRange to take guards into account
Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D25739

llvm-svn: 284632
2016-10-19 19:43:54 +00:00
Matthew Simpson 41fa838f07 [LV] Avoid emitting trivially dead instructions
Some instructions from the original loop, when vectorized, can become trivially
dead. This happens because of the way we structure the new loop. For example,
we create new induction variables and induction variable "steps" in the new
loop. Thus, when we go to vectorize the original induction variable update, it
may no longer be needed due to the instructions we've already created. This
patch prevents us from creating these redundant instructions. This reduces code
size before simplification and allows greater flexibility in code generation
since we have fewer unnecessary instruction uses.

Differential Revision: https://reviews.llvm.org/D25631

llvm-svn: 284631
2016-10-19 19:22:02 +00:00
Chad Rosier 6e3a92ec88 [AliasSetTracker] Add support for memcpy and memmove.
Differential Revision: https://reviews.llvm.org/D25776

llvm-svn: 284630
2016-10-19 19:09:03 +00:00
Artur Pilipenko f2d5dc5dc6 [IndVarSimplify] Use control-dependent range information to prove non-negativity
This change is motivated by the case when IndVarSimplify doesn't widen a comparison of IV increment because it can't prove IV increment being non-negative. We end up with a redundant trunc of the widened increment on this example.

for.body:
  %i = phi i32 [ %start, %for.body.lr.ph ], [ %i.inc, %for.inc ]
  %within_limits = icmp ult i32 %i, 64
  br i1 %within_limits, label %continue, label %for.end

continue:
  %i.i64 = zext i32 %i to i64
  %arrayidx = getelementptr inbounds i32, i32* %base, i64 %i.i64
  %val = load i32, i32* %arrayidx, align 4
  br label %for.inc

for.inc:
  %i.inc = add nsw nuw i32 %i, 1
  %cmp = icmp slt i32 %i.inc, %limit
  br i1 %cmp, label %for.body, label %for.end

There is a range check inside of the loop which guarantees the IV to be non-negative. NSW on the increment guarantees that the increment is also non-negative. Teach IndVarSimplify to use the range check to prove non-negativity of loop increments.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D25738

llvm-svn: 284629
2016-10-19 18:59:03 +00:00
Chad Rosier 16970a847c [AliasSetTracker] Return void for add() functions. NFC.
Differential Revision: https://reviews.llvm.org/D25748

llvm-svn: 284628
2016-10-19 18:50:32 +00:00
Sanjay Patel cf26c27478 [InstSimplify] move one and add more tests for potential negation folds
llvm-svn: 284627
2016-10-19 18:42:12 +00:00
Rafael Espindola 5d8ad4f757 Add a macro for prefetching data.
It will be used in lld.

llvm-svn: 284626
2016-10-19 18:34:32 +00:00