Commit Graph

47368 Commits

Author SHA1 Message Date
Rafael Espindola fd75d45b88 Remove the dwarf numbers from the D registers. They don't have dwarf numbers
and should probably be encoded as

DW_OP_reg 32 DW_OP_piece 4 DW_OP_reg 33

llvm-svn: 132274
2011-05-29 02:21:01 +00:00
Cameron Zwarich 6528a54946 Fix ARM fast isel to correctly flag memory operands to stores. This fixes
-verify-machineinstrs failures on several tests.

llvm-svn: 132268
2011-05-28 20:34:49 +00:00
Nadav Rotem d86c1c41fb Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).

llvm-svn: 132263
2011-05-28 17:57:14 +00:00
Benjamin Kramer e260b2b08a Erase instructions _after_ checking their type.
llvm-svn: 132256
2011-05-28 11:48:37 +00:00
Benjamin Kramer fd53a27f99 ConstantFoldInstOperands doesn't like compares, hand it off to instsimplify instead.
Fixes PR10040.

llvm-svn: 132254
2011-05-28 10:16:58 +00:00
John McCall 046c47e970 Implement and document the llvm.eh.resume intrinsic, which is
transformed by the inliner into a branch to the enclosing landing pad
(when inlined through an invoke).  If not so optimized, it is lowered
DWARF EH preparation into a call to _Unwind_Resume (or _Unwind_SjLj_Resume
as appropriate).  Its chief advantage is that it takes both the
exception value and the selector value as arguments, meaning that there
is zero effort in recovering these;  however, the frontend is required
to pass these down, which is not actually particularly difficult.

Also document the behavior of landing pads a bit better, and make it
clearer that it's okay that personality functions don't always land at
landing pads.  This is just a fact of life.  Don't write optimizations that
rely on pushing things over an unwind edge.

llvm-svn: 132253
2011-05-28 07:45:59 +00:00
Charles Davis 5638b9f01e When generating code for Win64 EH, emit StartProc and EndProc directives.
llvm-svn: 132250
2011-05-28 04:21:04 +00:00
Bruno Cardoso Lopes 325110f30d Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
2011-05-28 04:07:29 +00:00
Eric Christopher 368976f5cc This actually starts at offset 0, not 1.
llvm-svn: 132246
2011-05-28 03:16:22 +00:00
Jakob Stoklund Olesen fd3f71ef3a Create two BlockInfo entries when a live range is discontinuous through a block.
Delete the Kill and Def markers in BlockInfo. They are no longer
necessary when BlockInfo describes a continuous live range.

This only affects the relatively rare kind of basic block where a live
range looks like this:

 |---x   o---|

Now live range splitting can pretend that it is looking at two blocks:

 |---x
         o---|

This allows the code to be simplified a bit.

llvm-svn: 132245
2011-05-28 02:33:00 +00:00
Jakob Stoklund Olesen 5cc91b2611 Add SplitAnalysis::getNumLiveBlocks().
It is important that this function returns the same number of live blocks as
countLiveBlocks(CurLI) because live range splitting uses the number of live
blocks to ensure it is making progress.

This is in preparation of supporting duplicate UseBlock entries for basic blocks
that have a virtual register live-in and live-out, but not live-though.

llvm-svn: 132244
2011-05-28 02:32:57 +00:00
Akira Hatanaka a6664cdbf0 Change the set of callee-saved registers for non-MIPS32 architectures specified
in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a
double precision register get saved.

 

llvm-svn: 132243
2011-05-28 01:41:05 +00:00
Eric Christopher d00e8ad803 Implement the 'M' output modifier for arm inline asm. This is fairly
register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.

rdar://9119939

llvm-svn: 132242
2011-05-28 01:40:44 +00:00
Akira Hatanaka b406843fe5 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Devang Patel 8816bbc02d Select DW_AT_const_value size based on global variable size.
llvm-svn: 132239
2011-05-28 00:39:18 +00:00
Rafael Espindola 19fea7a840 Add 132187 back now that the real problem is fixed.
llvm-svn: 132238
2011-05-28 00:24:37 +00:00
Rafael Espindola 836f7db2cc Fix the root cause of the bootstrap failure:
There was no way to check if a given register/mode pair was valid. We now return
an error code (-2) instead of asserting. If anyone thinks that an assert
at this point  is really needed, we can autogen a hasValidDwarfRegNum instead.

llvm-svn: 132236
2011-05-28 00:13:01 +00:00
Cameron Zwarich 1d553a2cc4 Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
and add some basic tests for them.

llvm-svn: 132235
2011-05-27 23:54:00 +00:00
Charles Davis 91ed799eb4 Stub out support for Win64-style exceptions. Note that this is merely using
the Win64 EH mechanism to implement GCC-style exceptions. LLVM supports
hardly anything else at this point!

llvm-svn: 132234
2011-05-27 23:47:32 +00:00
Bruno Cardoso Lopes 787dfadc7c ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
2011-05-27 23:46:09 +00:00
Rafael Espindola a5149b5cea It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check.
llvm-svn: 132230
2011-05-27 23:36:02 +00:00
Cameron Zwarich 75d99e4b70 Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.

llvm-svn: 132225
2011-05-27 22:26:04 +00:00
Rafael Espindola b8e08be77d Fix a regression I recently introduced by removing DwarfRegNum of
subregisters:

When a value is in a subregister, at least report the location as being
the superregister. We should extend the .td files to encode the bit
range so that we can produce a DW_OP_bit_piece.

llvm-svn: 132224
2011-05-27 22:15:01 +00:00
Rafael Espindola d23bfb8a7a Make size computation less brittle.
llvm-svn: 132222
2011-05-27 22:05:41 +00:00
Charles Davis 041ec4aada Add the suffix to the Win64 EH data sections' names if given. Add a test for
this. XFAIL'd, because the COFF AsmParser can't handle .section yet.

llvm-svn: 132220
2011-05-27 21:38:47 +00:00
Nadav Rotem a9effb13dd Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place. Re-apply 131534 and fix the multi-step promotion of integers.

llvm-svn: 132217
2011-05-27 21:03:13 +00:00
Eli Friedman ddf7f55531 Attempt to preserve debug line info in LICM; as the comment in the code says, it's hard to pick good line numbers for this transformation, but something is better than nothing.
rdar://9143729

llvm-svn: 132215
2011-05-27 20:31:51 +00:00
Evan Cheng 518bcd0ef4 Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
llvm-svn: 132211
2011-05-27 20:11:27 +00:00
Chad Rosier 3252177f16 CRC32 intrinsics were renamed at revision 132163. This submission
fixes aliasing issues with the old and new names as well as adds test
cases for the auto-upgrader.
Fixes rdar 9472944.

llvm-svn: 132207
2011-05-27 19:38:10 +00:00
Devang Patel 39e22eae49 Keep this simple. Use DIType to get signness and size of a type. Based on size, select appropraite form.
llvm-svn: 132206
2011-05-27 19:13:26 +00:00
Charles Davis 03eef62db0 Add a parameter to the Win64 EH section getters to get a section with a
suffix (e.g. .xdata$myfunc). The suffix part isn't implemented yet, but
I'll get to it in the next patch.

Fix up all callers of the affected functions. Make them pass said suffix to
the function.

llvm-svn: 132205
2011-05-27 19:09:24 +00:00
Dan Gohman c6f2ddfc04 Update this comment.
llvm-svn: 132202
2011-05-27 18:42:33 +00:00
Eli Friedman 942e1c10f6 Don't sink or hoist debug info instrinsics; it isn't useful. This also prevents LICM sinking from erasing debug intrinsics which don't dominate any exit block of the loop.
rdar://9143943 .

llvm-svn: 132201
2011-05-27 18:37:52 +00:00
John McCall bd04b74bb2 Fix the inliner to maintain the current de facto invoke semantics:
- the selector for the landing pad must provide all available information
    about the handlers, filters, and cleanups within that landing pad
  - calls to _Unwind_Resume must be converted to branches to the enclosing
    lpad so as to avoid re-entering the unwinder when the lpad claimed it
    was going to handle the exception in some way
This is quite specific to libUnwind-based unwinding.  In an effort to not
interfere too badly with other unwinders, and with existing hacks in frontends,
this only triggers on _Unwind_Resume (not _Unwind_Resume_or_Rethrow) and does
nothing with selectors if it cannot find a selector call for either lpad.

llvm-svn: 132200
2011-05-27 18:34:38 +00:00
Jakob Stoklund Olesen 6019944901 Delete MethodBodies that only filtered reserved registers.
The register allocators know to filter reserved registers from the allocation
orders, so we don't need all of this boilerplate.

llvm-svn: 132199
2011-05-27 18:27:13 +00:00
Devang Patel f1d04706fb Handle signed types gracefully.
This fixes regressions reported by buildbots as a fallout of r132193.

llvm-svn: 132197
2011-05-27 18:15:52 +00:00
Eli Friedman b868c83e67 Oops, wasn't intending to commit this. Partial revert of r132194.
llvm-svn: 132195
2011-05-27 18:04:04 +00:00
Eli Friedman fe84bd659c Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076
llvm-svn: 132194
2011-05-27 18:02:04 +00:00
Devang Patel 3c6aed2d98 Select DW_AT_const_value size based on variable size.
llvm-svn: 132193
2011-05-27 16:45:18 +00:00
Rafael Espindola 0373d007e9 Remove DwarfRegNum from the individual bits of the condition register.
These should be DW_OP_bit_piece of CR (64).

llvm-svn: 132192
2011-05-27 16:15:27 +00:00
Rafael Espindola ecb5573047 Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece.
llvm-svn: 132190
2011-05-27 16:01:08 +00:00
Charles Davis ea5dc3a67b Assorted fixes for Win64 EH unwind info emission:
- Flip order of bitfields. This gets our output matching GAS.
- Handle case where the end of the prolog wasn't specified.
- If the resulting unwind info struct is less than 8 bytes, pad to 8 bytes.

Add a test for the latter two.

llvm-svn: 132188
2011-05-27 15:10:25 +00:00
Rafael Espindola 2daba3380d Remove dwarf numbers from subregs. We should use DW_OP_bit_piece to
refer to them.

I tested this with both check-all and the gdb testsuite.

llvm-svn: 132187
2011-05-27 15:08:24 +00:00
Benjamin Kramer 749ef5f420 InstCombine: Make switch folding with equality compares more aggressive by trying instsimplify on the arm where we know the compared value.
Stuff like "x == y ? y : x&y" now folds into "x&y".

llvm-svn: 132185
2011-05-27 13:00:16 +00:00
Cameron Zwarich 34ef49dc74 Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk.
llvm-svn: 132181
2011-05-27 05:04:51 +00:00
Eric Christopher 9b67db8ea7 Make the branch encoding for tBcc more obvious that it's a 4-byte opcode
followed by a conditional and imm8.

llvm-svn: 132179
2011-05-27 03:50:53 +00:00
Eric Christopher bd59e89331 Fix comment.
llvm-svn: 132178
2011-05-27 03:46:51 +00:00
Charles Davis 6d1c4c73a9 Start keeping track of where the various unwind instructions are in the prolog.
Use them to calculate the offset inside the prolog. Emit this value when
emitting the unwind codes.

llvm-svn: 132177
2011-05-27 03:25:01 +00:00
Charles Davis 761313b28d Add missing break statements. Align UNWIND_INFO and RUNTIME_FUNCTION structs
to 4 bytes.

I'm surprised no one caught the missing break statements.

llvm-svn: 132176
2011-05-27 02:43:19 +00:00
Charles Davis a60cd577fd My attempt at fixing the leak reported by the valgrind buildbots. Valgrind will
still report leaks, but they're spurious now. Valgrind cannot peer into
std::vector objects--or any dynamic array, for that matter--because it doesn't
know how big the array is.

llvm-svn: 132174
2011-05-27 02:01:08 +00:00