Commit Graph

7744 Commits

Author SHA1 Message Date
Tres Popp 5aa5eba135 [mlir][NFC] Rename MathToLLVM->MathToLibm 2021-05-31 08:41:00 +02:00
Chris Lattner 1e344ce4f3 [CSE] Make domInfo a stored property, cut use of DominanceInfo::hasDominanceInfo. NFC.
CSE is the only client of this API, refactor it a bit to pull the query
internally to make changes to DominanceInfo a bit easier.  This commit
also improves comments a bit.
2021-05-30 12:23:39 -07:00
Butygin bb542f2a76 [mlir] StandardToLLVM: option to disable AllocOp lowering
Differential Revision: https://reviews.llvm.org/D103237
2021-05-30 17:50:25 +03:00
Chris Lattner 67d0e79b1f [Dominance] Speed up recalculate noticable, NFC.
This avoids trying to find the RegionKindInterface for every
operation in the program, we only need it if they have regions.

Differential Revision: https://reviews.llvm.org/D103367
2021-05-29 10:50:22 -07:00
Chris Lattner d11abdfd5a [Verifier] Inline a method to simplify the code in preparation for bigger changes, NFC.
Differential Revision: https://reviews.llvm.org/D103365
2021-05-29 10:33:27 -07:00
Chris Lattner bde21b6245 [Verifier] Significantly speed up IsolatedFromAbove checking. NFC.
The implementation had a couple of problems, including checking
"isProperAncestor" in an inefficient way.  It also recursed into
other "isolated from above" ops.  In the case of CIRCT, we get
three levels of isolated ops:

  mlir::ModuleOp
    firrtl::CircuitOp
       firrtl::FModuleOp

The verification for module would recurse into the circuits and
fmodules checking them.  The verifier hook for circuit would
recurse into all the modules reverifying them, fmoduleop would
then reverify them.  The same happens for mlir::ModuleOp and Func.

While here, fix an old design problem: IsolatedFromAbove checking
was implemented by a method on the Region class, which isn't
actually general and isn't used by anything else.  Move it over
to be a trait impl verifier method like the others and specialize
it for its task.

Differential Revision: https://reviews.llvm.org/D103345
2021-05-28 16:13:45 -07:00
Jacques Pienaar 82f7b5e1b9 [mlir] Add missing namespace to createCanonicalizerPass. 2021-05-28 09:12:55 -07:00
Lei Zhang 4694097dab [mlir] Don't elide the last op if there is no terminator
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103264
2021-05-28 07:25:49 -04:00
KareemErgawy e493abcf55 [MLIR][SPIRV] Use getAsmResultName(...) hook for ConstantOp.
Implements better naming for results of `spv.Constant` ops by making it
inherit from OpAsmOpInterface and implementing the associated
getAsmResultName(...) hook.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D103152
2021-05-28 09:28:02 +02:00
Mehdi Amini 80e684b194 Fix comment to reflect what the method is doing (NFC) 2021-05-28 00:02:59 +00:00
Aart Bik ef1cc4e7ae [mlir][capi] fix build issue with "all passes" registration
Some builds exposed missing dependences on trafo/conv passes.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D103283
2021-05-27 14:57:21 -07:00
River Riddle 8cbbc5d00b [mlir-lsp-server] Add support for processing split files
MLIR tools very commonly use `// -----` to split a file into distinct sub documents, that are processed separately. This revision adds support to mlir-lsp-server for splitting MLIR files based on this sigil, and processing them separately.

Differential Revision: https://reviews.llvm.org/D102660
2021-05-27 14:42:37 -07:00
River Riddle d47dd11071 [mlir] Add support for querying the ModRef behavior from the AliasAnalysis class
This allows for checking if a given operation may modify/reference/or both a given value. Right now this API is limited to Value based memory locations, but we should expand this to include attribute based values at some point. This is left for future work because the rest of the AliasAnalysis API also has this restriction.

Differential Revision: https://reviews.llvm.org/D101673
2021-05-27 13:57:29 -07:00
Eugene Zhulenev 8f23fac4da [mlir:Async] Convert assertions to async errors only inside async functions
Differential Revision: https://reviews.llvm.org/D103278
2021-05-27 12:49:00 -07:00
Jacques Pienaar 5618a5a059 [mlir] Update cmake variable post D102976 2021-05-27 11:11:58 -07:00
Eugene Zhulenev 9136b7d075 [mlir] AsyncRefCounting: check that LivenessBlockInfo is not nullptr
Differential Revision: https://reviews.llvm.org/D103270
2021-05-27 10:54:21 -07:00
thomasraoux 750799b7bc [mlir][NFC] Don't outline kernel in MMA integration tests
This matches better how other gpu integration tests are done.

Differential Revision: https://reviews.llvm.org/D103099
2021-05-27 09:43:54 -07:00
Eugene Zhulenev d8c84d2a4e [mlir] Async: Add error propagation support to async groups
Depends On D103109

If any of the tokens/values added to the `!async.group` switches to the error state, than the group itself switches to the error state.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103203
2021-05-27 09:35:11 -07:00
Eugene Zhulenev 39957aa424 [mlir] Add error state and error propagation to async runtime values
Depends On D103102

Not yet implemented:
1. Error handling after synchronous await
2. Error handling for async groups

Will be addressed in the followup PRs

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103109
2021-05-27 09:28:47 -07:00
Eugene Zhulenev c412979cde [mlir] Async reference counting for block successors with divergent reference counted liveness
Support reference counted values implicitly passed (live) only to some of the successors.

Example: if branched to ^bb2 token will leak, unless `drop_ref` operation is properly created

```
^entry:
  %token = async.runtime.create : !async.token
   cond_br %cond, ^bb1, ^bb2
^bb1:
  async.runtime.await %token
  async.runtime.drop_ref %token
  br ^bb2
^bb2:
  return
```

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103102
2021-05-27 09:21:59 -07:00
thomasraoux b44007bec2 [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.
In order to allow large matmul operations using the MMA ops we need to chain
operations this is not possible unless "DOp" and "COp" type have matching
layout so remove the "DOp" layout and force accumulator and result type to
match.
Added a test for the case where the MMA value is accumulated.

Differential Revision: https://reviews.llvm.org/D103023
2021-05-27 09:13:51 -07:00
Nicolas Vasilache ce4f99e7f2 [mlir][Linalg] Add comprehensive bufferization support for subtensor (5/n)
This revision refactors and simplifies the pattern detection logic: thanks to SSA value properties, we can actually look at all the uses of a given value and avoid having to pattern-match specific chains of operations.

A bufferization pattern for subtensor is added and specific inplaceability analysis is implemented for the simple case of subtensor. More advanced use cases will follow.

Differential revision: https://reviews.llvm.org/D102512
2021-05-27 12:48:08 +00:00
Matthias Springer 108ca7a7e7 [mlir] Support dialect-wide canonicalization pattern registration
* Add `hasCanonicalizer` option to Dialect.
* Initialize canonicalizer with dialect-wide canonicalization patterns.
* Add test case to TestDialect.

Dialect-wide canonicalization patterns are useful if a canonicalization pattern does not conceptually associate with any single operation, i.e., it should not be registered as part of an operation's `getCanonicalizationPatterns` function. E.g., this is the case for canonicalization patterns that match an op interface.

Differential Revision: https://reviews.llvm.org/D103226
2021-05-27 17:35:21 +09:00
Alexander Belyaev 62686a47a4 [mlir] Add TestLinalgDistribution.cpp to cmake build. 2021-05-27 08:59:33 +02:00
Alexander Belyaev 281ee42911 [mlir] Add a pass to distribute linalg::TiledLoopOp.
Differential Revision: https://reviews.llvm.org/D103194
2021-05-27 08:45:20 +02:00
Frank Laub b5c3f17e70 [MLIR] Add support for empty IVs to affine.parallel
Allow support for specifying empty IVs in an `affine.parallel`.

For example:

```
affine.parallel () = () to () {
  affine.yield
}
```

Reviewed By: bondhugula, jbruestle

Differential Revision: https://reviews.llvm.org/D102895
2021-05-26 23:45:11 +00:00
harsh-nod 94d67b51dd [mlir] Add n-D vector lowering to LLVM for cast ops
The casting ops (sitofp, uitofp, fptosi, fptoui) lowering currently does
not handle n-D vectors. This patch fixes that.

Differential Revision: https://reviews.llvm.org/D103207
2021-05-26 15:26:49 -07:00
Aart Bik 97f15eda4f [mlir][python] Provide "all passes" registration module in Python
Currently, passes are registered on a per-dialect basis, which
provides the smallest footprint obviously. But for prototyping
and experimentation, a convenience "all passes" module is provided,
which registers all known MLIR passes in one run.

Usage in Python:

import mlir.all_passes_registration

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103130
2021-05-26 15:14:57 -07:00
thomasraoux e5eff533f7 [mlir] Make StripDebugInfo strip out block arguments locs
Differential Revision: https://reviews.llvm.org/D103187
2021-05-26 11:05:38 -07:00
Alexander Belyaev 74a89cba8c [mlir] Add `distributionTypes` to LinalgTilingOptions.
Differential Revision: https://reviews.llvm.org/D103161
2021-05-26 17:51:38 +02:00
Valentin Clement 1005ef445d [mlir][openacc] Translate UpdateOp to LLVM IR
Add translation to LLVM IR for the UpdateOp with host and device operands.
Translation is done with call using the runtime. This is done in a similar way as
D101504 and D102381.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D102382
2021-05-26 11:42:15 -04:00
Adrian Kuegel dee46d0829 [mlir] Fold complex.create(complex.re(op), complex.im(op))
Differential Revision: https://reviews.llvm.org/D103148
2021-05-26 14:02:53 +02:00
Butygin 91e0cb6598 [mlir] LocalAliasAnalysis: Assume allocation scope to function scope if cannot determine better
It helps when checking aliasing between AllocOp result and function arguments.

Differential Revision: https://reviews.llvm.org/D102557
2021-05-26 12:06:56 +03:00
Adrian Kuegel cb65419b1a [mlir] Simplify folding code (NFC) 2021-05-26 11:00:07 +02:00
Adrian Kuegel b99f892b02 [mlir] Fold complex.re(complex.create) and complex.im(complex.create)
This extends the folding we already have. A test needs to be adjusted.

Differential Revision: https://reviews.llvm.org/D103141
2021-05-26 10:53:05 +02:00
Rob Suderman e5d227e95c [NFC][MLIR][TOSA] Replaced tosa linalg.indexed_generic lowerings with linalg.index
Indexed Generic should be going away in the future. Migrate to linalg.index.

Reviewed By: NatashaKnk, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D103110
2021-05-25 15:34:28 -07:00
Chris Lattner aaa2982d71 [MLIR Core] Cache the empty StringAttr like we do for empty dictionaries. NFC.
MLIRContext holds a few special case values that occur frequently like empty
dictionary and NoneType, which allow us to avoid taking locks to get an instance
of them.  Give the empty StringAttr this treatment as well.  This cuts several
percent off compile time for CIRCT.

Differential Revision: https://reviews.llvm.org/D103117
2021-05-25 14:58:17 -07:00
Chris Lattner a6a57f03be [Toy] Update tests to pass with top-down canonicalize pass. NFC 2021-05-25 14:51:05 -07:00
Chris Lattner a004da0d77 [Canonicalize] Switch the default setting to "top down".
This provides a sizable compile time improvement by seeding
the worklist in an order that leads to less iterations of the
worklist.

This patch only changes the behavior of the Canonicalize pass
itself, it does not affect other passes that use the
GreedyPatternRewrite driver

Differential Revision: https://reviews.llvm.org/D103053
2021-05-25 13:42:11 -07:00
Chris Lattner 2f23f9e641 [Canonicalize] Fully parameterize the pass based on config options. NFC.
This allows C++ clients of the Canonicalize pass to specify their own
Config option struct to control how Canonicalize works, increasing reusability.

This also allows controlling these settings for the default Canonicalize pass
using command line options.  This is useful for testing and for playing with
things on the command line.

Differential Revision: https://reviews.llvm.org/D103069
2021-05-25 13:09:51 -07:00
Mathieu Fehr dc2aa47676 [mlir] Add a copy constructor to FailureOr
The copy constructor was missing from FailureOr.

Note that I do not have commit access.

Differential Revision: https://reviews.llvm.org/D98955
2021-05-25 12:10:57 -07:00
Mathieu Fehr 1bf3fd9bb5 [mlir] Use unique_function in AbstractOperation fields
Currently, AbstractOperation fields are function pointers.
Modifying them to unique_function allow them to contain
runtime information.

For instance, this allows operations to be defined at runtime.

Differential Revision: https://reviews.llvm.org/D103031
2021-05-25 11:36:12 -07:00
Markus Böck 31d1ae7975 [mlir][doc] Fix links and references in documentation of Tutorials
This patch is the third in a series of patches fixing markdown links and references inside the mlir documentation.

This patch addresses all broken references to other markdown files and sections inside the Tutorials folder.

Differential Revision: https://reviews.llvm.org/D103017
2021-05-25 20:18:50 +02:00
Alexander Belyaev 2ea6e13bf8 [mlir] Add an optional distributionTypes attribute to TiledLoopOp.
Differential Revision: https://reviews.llvm.org/D103104
2021-05-25 20:04:41 +02:00
Tobias Gysi 6779fcb26f [mlir][linalg] Update Linalg.md (NFC).
Update the paragraph on generic / indexed_generic to reflect the unification of these operations.

Differential Revision: https://reviews.llvm.org/D102775
2021-05-25 17:46:41 +00:00
Aart Bik ca446e58c8 [sparse][mlir] simplify sparse runtime support library
Removed some of the older raw "MLIRized" versions that are
no longer needed now that the sparse runtime support library
can focus on the proper sparse tensor types rather than the
opague pointer approach of the past. This avoids legacy...

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D102960
2021-05-25 09:39:14 -07:00
Markus Böck 09b5ebc07b [mlir][CAPI][test] Change casts and fprintf format strings from long to intptr_t
A test in ir.c makes use of casting a void* to an integer type to print it's address. This cast is currently done with the datatype `long` however, which is only guaranteed to be equal to the pointer width on LP64 system. Other platforms may use a length not equal to the pointer width. 64bit Windows as an example uses 32 bit for `long` which does not match the 64 bit pointers.
This also results in clang warning due to `-Wvoid-pointer-to-int-cast`.

Technically speaking, since the test only passes the value 42, it does not cause any issues, but it'd be nice to fix the warning at least.

Differential Revision: https://reviews.llvm.org/D103085
2021-05-25 17:48:54 +02:00
Markus Böck 9b99336d5d [mlir][doc] Fix links and references in documentation of Dialects
This patch is the first in a series of patches fixing markdown links and references inside the mlir documentation. I chose to split it in a few reviews to be able to iterate quicker and to ease review.

This patch addresses all broken references to other markdown files and sections inside the Dialects folder.

One change that was also done was to insert '/' between the markdown files and section:
Example:
Builtin.md#integertype
was changed to:
Builtin.md/#integertype

After compilation, hugo then translates the later to jump directly to the integer type section, but not the former. Not inserting the slash would simply jump to just the Builtin page, instead of the integertype section. I therefore changed occurrences of the former version to the later as well.

Differential Revision: https://reviews.llvm.org/D103011
2021-05-25 14:51:15 +02:00
Tres Popp 6054bfa813 [mlir] Support buffer hoisting on allocas
This adds support for hoisting allocas in both BufferHoisting and
BufferLoopHoisting.

Differential Revision: https://reviews.llvm.org/D102681
2021-05-25 14:50:01 +02:00
Markus Böck 5e2a302e37 [mlir][doc] Fix links and references in documentation of Rationale
This patch is the second in a series of patches fixing markdown links and references inside the mlir documentation.

This patch addresses all broken references to other markdown files and sections inside the Rationale folder.

In addition to fixing the links and references like in the previous patch, I also changed references which are URLs to the mlir.llvm.org/docs website, to proper relative markdown references instead.

Differential Revision: https://reviews.llvm.org/D103013
2021-05-25 14:48:07 +02:00
Matthias Springer f718a53d7e [mlir] Disallow certain transfer ops in VectorToSCF
Disallow transfer ops that change the element type of the transfer. Such transfers could be supported in the future, if needed.

Differential Revision: https://reviews.llvm.org/D102746
2021-05-25 21:39:43 +09:00
Vinayaka Bandishti eff269fc9f [MLIR][Affine][LICM] Mark users of `iter_args` variant
Prevent users of `iter_args` of an affine for loop from being hoisted
out of it. Otherwise, LICM leads to a violation of the SSA dominance
(as demonstrated in the added test case).

Fixes: https://bugs.llvm.org/show_bug.cgi?id=50103

Reviewed By: bondhugula, ayzhuang

Differential Revision: https://reviews.llvm.org/D102984
2021-05-25 15:56:52 +05:30
Tres Popp 9ccdc2e23b [mlir] Fold memref.dim of OffsetSizeAndStrideOpInterface outputs
This previously handled memref::SubviewOp, but this can be extended to
all ops implementing the interface.

Differential Revision: https://reviews.llvm.org/D103076
2021-05-25 12:16:10 +02:00
Matthias Springer 5017b0f88b [mlir] Check only last dim stride in transfer op lowering
Lower a 1D vector transfer op to LLVM if the last dim stride is 1. Also fixes a bug in the original unit stride computation.

Differential Revision: https://reviews.llvm.org/D102897
2021-05-25 17:53:24 +09:00
River Riddle 60c735d409 [mlir-opt] Don't enable `printOpOnDiagnostic` if it was explicitly disabled.
We are currently explicitly setting the flag solely based on the value of `-verify`, which ends up ignoring the situation where the user explicitly disabled this option from the command line.

Differential Revision: https://reviews.llvm.org/D102952
2021-05-24 15:56:48 -07:00
thomasraoux dae9038611 [mlir] Lower sm version for TensorCore intergration tests
Those tests only require sm70, this allows to run those integration
tests on more hardware.

Differential Revision: https://reviews.llvm.org/D103049
2021-05-24 14:45:24 -07:00
Chris Lattner 64716b2c39 [GreedyPatternRewriter] Introduce a config object that allows controlling internal parameters. NFC.
This exposes the iterations and top-down processing as flags, and also
allows controlling whether region simplification is desirable for a client.
This allows deleting some duplicated entrypoints to
applyPatternsAndFoldGreedily.

This also deletes the Constant Preprocessing pass, which isn't worth it
on balance.

All defaults are all kept the same, so no one should see a behavior change.

Differential Revision: https://reviews.llvm.org/D102988
2021-05-24 12:40:40 -07:00
George d3e6c2ddc3 Surface clone APIs in CAPI
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D102987
2021-05-24 11:53:00 -07:00
Stella Laurenzo 96aa0a4115 Enable MLIR Python bindings for TOSA.
Differential Revision: https://reviews.llvm.org/D103035
2021-05-24 18:04:50 +00:00
Markus Böck d35bd98651 [mlir][doc] Fix links and references in top level docs directory
This is the fourth and final patch in a series of patches fixing markdown links and references inside the mlir documentation. This patch combined with the other three should fix almost every broken link on mlir.llvm.org as far as I can tell.

This patch in particular addresses all Markdown files in the top level docs directory.

Differential Revision: https://reviews.llvm.org/D103032
2021-05-24 18:43:00 +02:00
Suraj Sudhir 1ceff40df0 [mlir][tosa] Align tensor rank specifications with current spec
Deconstrains several TOSA operators to align with the current TOSA spec, including all the elementwise ops.
Note: some more ops are under consideration for further cleanup; they will follow once the spec has been updated.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D102958
2021-05-24 16:03:42 +00:00
Uday Bondhugula 587408c199 [MLIR] Drop old cmake var names
Drop old cmake variable names that were kept around so that zorg
buildbot could be migrated, which has now happened (D102977). D102976
had fixed the inconsistent names.

Differential Revision: https://reviews.llvm.org/D102997
2021-05-24 15:30:01 +05:30
John Demme c65bb760df [MLIR] [Python] Add Operation.parent
Attribute to get the parent operation of an operation.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D102981
2021-05-23 20:52:43 -07:00
Uday Bondhugula 9c21ddb70a [MLIR] Make MLIR cmake variable names consistent
Fix inconsistent MLIR CMake variable names. Consistently name them as
MLIR_ENABLE_<feature>.

Eg: MLIR_CUDA_RUNNER_ENABLED -> MLIR_ENABLE_CUDA_RUNNER

MLIR follows (or has mostly followed) the convention of naming
cmake enabling variables in the from MLIR_ENABLE_... etc. Using a
convention here is easy and also important for convenience. A counter
pattern was started with variables named MLIR_..._ENABLED. This led to a
sequence of related counter patterns: MLIR_CUDA_RUNNER_ENABLED,
MLIR_ROCM_RUNNER_ENABLED, etc.. From a naming standpoint, the imperative
form is more meaningful. Additional discussion at:
https://llvm.discourse.group/t/mlir-cmake-enable-variable-naming-convention/3520

Switch all inconsistent ones to the ENABLE form. Keep the couple of old
mappings needed until buildbot config is migrated.

Differential Revision: https://reviews.llvm.org/D102976
2021-05-24 08:43:10 +05:30
Haruki Imai 000a05fd1a [mlir] Normalize dynamic memrefs with a map of tiled-layout.
Steps for normalizing dynamic memrefs for tiled layout map
1. Check if original map is tiled layout. Only tiled layout is supported.
2. Create normalized memrefType. Dimensions that include dynamic dimensions
   in the map output will be dynamic dimensions.
3. Create new maps to calculate each dimension size of new memref.
   In tiled layout, the dimension size can be calculated by replacing
    "floordiv <tile size>" with "ceildiv <tile size>" and
    "mod <tile size>" with "<tile size>".
4. Create AffineApplyOp to apply the new maps. The output of AffineApplyOp is
   dynamicSizes for new AllocOp.
5. Add the new dynamic sizes in new AllocOp.

This patch also set MemRefsNormalizable trant in CastOp and DimOp since
they used with dynamic memrefs.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D97655
2021-05-24 08:39:36 +05:30
Philipp Krones c2f819af73 [MC] Refactor MCObjectFileInfo initialization and allow targets to create MCObjectFileInfo
This makes it possible for targets to define their own MCObjectFileInfo.
This MCObjectFileInfo is then used to determine things like section alignment.

This is a follow up to D101462 and prepares for the RISCV backend defining the
text section alignment depending on the enabled extensions.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101921
2021-05-23 14:15:23 -07:00
Chris Lattner 81467f500f [IR] Add a Location to BlockArgument
This adds the ability to specify a location when creating BlockArguments.
Notably Value::getLoc() will return this correctly, which makes diagnostics
more precise (e.g. the example in test-legalize-type-conversion.mlir).

This is currently optional to avoid breaking any existing code - if
absent, the BlockArgument defaults to using the location of its enclosing
operation (preserving existing behavior).

The bulk of this change is plumbing location tracking through the parser
and printer to make sure it can round trip (in -mlir-print-debuginfo
mode).  This is complete for generic operations, but requires manual
adoption for custom ops.

I added support for function-like ops to round trip their argument
locations - they print correctly, but when parsing the locations are
dropped on the floor.  I intend to fix this, but it will require more
invasive plumbing through "function_like_impl" stuff so I think it
best to split it out to its own patch.

This is a reapply of the patch here: https://reviews.llvm.org/D102567
with an additional change: we now never defer block argument locations,
guaranteeing that we can round trip correctly.

This isn't required in all cases, but allows us to hill climb here and
works around unrelated bugs like https://bugs.llvm.org/show_bug.cgi?id=50451

Differential Revision: https://reviews.llvm.org/D102991
2021-05-23 14:10:00 -07:00
Markus Böck 9a6eb4968e [mlir][doc] Fix links and indentation of mlir::ModuleOp description
All lines after the first are currently indented by one char further to the left than the first line. This leads to the first character of each sentence being cut from the resulting Markdown file after compilation. The text also contains 3 references to sections of other markdown files. One was missing the file, while the other two had outdated files, leading to 404 errors in the documentation.

Differential Revision: https://reviews.llvm.org/D102983
2021-05-23 20:01:54 +02:00
Butygin 0dd36f81b9 [mlir][linalg][nfc] Fix signed/unsigned comparison warning in header
Differential Revision: https://reviews.llvm.org/D102968
2021-05-22 17:18:01 +03:00
Butygin 4184018253 [mlir][SCF] Canonicalize nested ParallelOp's
Differential Revision: https://reviews.llvm.org/D102799
2021-05-22 14:00:00 +03:00
Navdeep Kumar e552fa28da [MLIR][GPU] Add CUDA Tensor core WMMA test
Add a test case to test the complete execution of WMMA ops on a Nvidia
GPU with tensor cores. These tests are enabled under
MLIR_RUN_CUDA_TENSOR_CORE_TESTS.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D95334
2021-05-22 16:19:36 +05:30
Uday Bondhugula 3597b2c37d [MLIR] Drop stale reference to mlir-edsc-builder-api-test
Drop stale reference to mlir-edsc-builder-api-test.

Differential Revision: https://reviews.llvm.org/D102967
2021-05-22 16:11:29 +05:30
Butygin 9afbca746b [mlir] ConvertStandardToLLVM: make AllocLikeOpLowering public
It is useful for someone who wants to implement custom AllocOp LLVM lowering

Differential Revision: https://reviews.llvm.org/D102932
2021-05-22 12:57:45 +03:00
Andrew Young ab3cd2601b
[mlir][docs] Add memref and sparse_tensor to Passes.md
These pass documents belong on the main pass page, and not generated as
top level pages.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D102947
2021-05-21 15:23:39 -07:00
Aart Bik c194b49c9c [mlir][sparse] add full dimension ordering support
This revision completes the "dimension ordering" feature
of sparse tensor types that enables the programmer to
define a preferred order on dimension access (other than
the default left-to-right order). This enables e.g. selection
of column-major over row-major storage for sparse matrices,
but generalized to any rank, as in:

dimOrdering = affine_map<(i,j,k,l,m,n,o,p) -> (p,o,j,k,i,l,m,n)>

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D102856
2021-05-21 12:35:13 -07:00
Marius Brehler b3127c94dd [mlir][docs] Fix links to index and integer types
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D102922
2021-05-21 18:21:29 +02:00
Alexander Belyaev 335fa18028 [mlir] NFC: Expose tiled_loop->scf pattern.
Differential Revision: https://reviews.llvm.org/D102921
2021-05-21 18:19:00 +02:00
Alexander Belyaev 9ecc8178d7 [mlir] Add support for fusion into TiledLoopOp.
Differential Revision: https://reviews.llvm.org/D102722
2021-05-21 18:13:45 +02:00
Navdeep Kumar eaaf7a6a09 [MLIR][GPU][NVVM] Add conversion of warp synchronous matrix-multiply accumulate GPU ops
Add conversion of warp synchronous matrix-multiply
accumulate GPU ops
Add conversion of warp synchronous matrix-multiply accumulate GPU ops to
NVVM ops. The following conversions are added :-
  1.) subgroup_mma_load_matrix -> wmma.m16n16k16.load.[a,b,c]..row.stride
  2.) subgroup_mma_store_matrix -> wmma.m16n16k16.store.d.[f16,f32].row.stride
  3.) subgroup_mma_compute -> wmma.m16n16k16.mma.row.row.[f16,f32].[f16,f32]

Reviewed By: bondhugula, ftynse

Differential Revision: https://reviews.llvm.org/D95331
2021-05-21 21:20:33 +05:30
Stephan Herhut 90e55dfcf4 [mlir][memref] Improve canonicalization of memref.clone
The previous implementation did not handle casting behavior properly and
did not consider aliases.

Differential Revision: https://reviews.llvm.org/D102785
2021-05-21 16:34:50 +02:00
Matthias Springer 8fb4897934 [mlir] Disallow tensor types in VectorToSCF
Support for tensor types can be added if needed.

Differential Revision: https://reviews.llvm.org/D102749
2021-05-21 22:45:14 +09:00
Stephan Herhut 884a6291f0 [mlir][linalg] Add scalar operands inlining pattern
This pattern inlines operands to a linalg.generic operation that use a constant
index and hence are loop-invariant scalars. This reduces the number of
linalg.generic operands and unlocks some canonicalizations that rely on seeing
an explicit tensor.extract.

Differential Revision: https://reviews.llvm.org/D102682
2021-05-21 15:23:28 +02:00
Adrian Kuegel 28844212fe [mlir] Add additional traits to EqualOp and NotEqualOp.
This matches the traits of the other binary ops.

Differential Revision: https://reviews.llvm.org/D102916
2021-05-21 15:04:26 +02:00
Nicolas Vasilache 8eb18a0f3e [mlir][Standard] NFC - Drop remaining EDSC usage
Drop the remaining EDSC subdirectories and update all uses.

Differential Revision: https://reviews.llvm.org/D102911
2021-05-21 10:40:39 +00:00
Adrian Kuegel a1a429dc1d [mlir] NFC - Use builder.getI1Type() 2021-05-21 11:44:57 +02:00
Adrian Kuegel 7eb85cdb10 [mlir] Add convenience builders for EqualOp and NotEqualOp.
The result type is always I1. This additional builder allows to omit the result type.

Differential Revision: https://reviews.llvm.org/D102905
2021-05-21 11:32:25 +02:00
Adrian Kuegel fb8b2b86d3 [mlir] Add conversion from Complex to Standard dialect for NotEqualOp.
Differential Revision: https://reviews.llvm.org/D102902
2021-05-21 10:46:50 +02:00
Konrad Kleine 0297506d20 [mlir] Rename MlirLspServerLib -> MLIRLspServerLib
I noticed while packaging mlir that most mlir library names start
with `libMLIR`. The only different libary was `libMlirLspServerLib.a`.

That's why I changed the library to be similarly named to the others.

Differential Revision: https://reviews.llvm.org/D102881
2021-05-21 10:25:54 +02:00
Nicolas Vasilache e84a9b9bb3 [mlir][Affine] NFC - Drop Affine EDSC usage
Drop the Affine dialect EDSC subdirectory and update all uses.

Differential Revision: https://reviews.llvm.org/D102878
2021-05-20 21:45:45 +00:00
Nicolas Vasilache e3cf7c88c4 [mlir][MemRef] NFC - Drop MemRef EDSC usage
Drop the MemRef dialect EDSC subdirectory and update all uses.

Differential Revision: https://reviews.llvm.org/D102868
2021-05-20 20:13:58 +00:00
Nicolas Vasilache 4519ca3d2e [mlir][Linalg] NFC - Drop Linalg EDSC usage
Drop the Linalg dialect EDSC subdirectory and update all uses.

Differential Revision: https://reviews.llvm.org/D102848
2021-05-20 15:33:56 +00:00
Adrian Kuegel ac00cb0d2a [mlir] Add conversion from complex to standard dialect for EqualOp.
This adds the straightforward conversion for EqualOp
(two complex numbers are equal if both the real and the imaginary part are equal).

Differential Revision: https://reviews.llvm.org/D102840
2021-05-20 14:25:56 +02:00
Adrian Kuegel a28fe17d73 [mlir] Add EqualOp and NotEqualOp to complex dialect. 2021-05-20 13:25:07 +02:00
Nicolas Vasilache ef33c6e3ce [mlir][Linalg] Drop spurious usage of OperationFolder
Instead, use createOrFold builders which result in more static information available.

Differential Revision: https://reviews.llvm.org/D102832
2021-05-20 09:17:58 +00:00
Matthias Springer 4cd1b66dff [mlir] Add Python bindings for vector dialect
Also add a minimal test case for vector.print.

Differential Revision: https://reviews.llvm.org/D102826
2021-05-20 17:53:08 +09:00
Tobias Gysi 99a198641c [mlir][Python][linalg] Fix to limit size of SmallVector.
Stack allocate at most two ScalarAssign elements. Using the default number of inlined elements triggered a static assert in some setups (https://reviews.llvm.org/D102075).

Differential Revision: https://reviews.llvm.org/D102827
2021-05-20 07:24:41 +00:00
River Riddle 92469ca027 [mlir] Refactor the implementation of pass crash reproducers
The current implementation has several key limitations and weirdness, e.g local reproducers don't support dynamic pass pipelines, error messages don't include the passes that failed, etc. This revision refactors the implementation to support more use cases, and also be much cleaner.

The main change in this revision, aside from moving the implementation out of Pass.cpp and into its own file, is the addition of a crash recovery pass instrumentation. For local reproducers, this instrumentation handles setting up the recovery context before executing each pass. For global reproducers, the instrumentation is used to provide a more detailed error message, containing information about which passes are running and on which operations.

Example of new message:

```
error: Failures have been detected while processing an MLIR pass pipeline
note: Pipeline failed while executing [`TestCrashRecoveryPass` on 'module' operation: @foo]: reproducer generated at `crash-recovery.mlir.tmp`
```

Differential Revision: https://reviews.llvm.org/D101854
2021-05-19 16:59:53 -07:00
River Riddle 64ce90e1af [mlir] Add a new `print-ir-after-failure` IR pass printing flag
This flag will print the IR after a pass only in the case where the pass failed. This can be useful to more easily view the invalid IR, without needing to print after every pass in the pipeline.

Differential Revision: https://reviews.llvm.org/D101853
2021-05-19 16:54:20 -07:00
hasheddan 0316f3e649 [mlir][docs] Fix minor typos in vector dialect docs
Updates a minor typo in vector dialect documentation.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D101203
2021-05-19 14:20:28 -07:00
Aart Bik bf9ef3efaa [mlir][sparse] skip sparsification for unannotated (or unhandled) cases
Skip the sparsification pass for Linalg ops without annotated tensors
(or cases that are not properly handled yet).

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D102787
2021-05-19 13:49:28 -07:00