82e80019a5
Remove the optimizations that convert BRCOND and BR_CC into
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unconditional branches or fallthroghes. Instcombine/SimplifyCFG
should be simplifying branches with known conditions.
This fixes some problems caused by these transformations not
updating the MachineBasicBlock CFG.
llvm-svn: 89017
2009-11-17 00:47:23 +00:00
6b3f32e6d7
Fix a typo in a comment.
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llvm-svn: 88953
2009-11-16 20:35:59 +00:00
a627e26d39
Enable the tail call optimization when the caller returns undef.
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llvm-svn: 88737
2009-11-14 02:06:30 +00:00
f80dc08059
Don't let a noalias difference disrupt the tailcall optimization.
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llvm-svn: 88672
2009-11-13 18:49:38 +00:00
5f4eecf961
Adjust isConstantSplat to allow for big-endian targets.
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PPC is such a target; make it work.
llvm-svn: 87060
2009-11-13 01:45:18 +00:00
1fbe054450
Add a bool flag to StackObjects telling whether they reference spill
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
llvm-svn: 87022
2009-11-12 20:49:22 +00:00
68e4945c03
Add compare_lower and equals_lower methods to StringRef. Switch all users of
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StringsEqualNoCase (from StringExtras.h) to it.
llvm-svn: 87020
2009-11-12 20:36:59 +00:00
2904aa9f6e
"Attach debug info with llvm instructions" mode was enabled a month ago. Now make it permanent and remove old way of inserting intrinsics to encode debug info for line number and scopes.
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llvm-svn: 87014
2009-11-12 19:02:56 +00:00
9f34406a90
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
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llvm-svn: 86876
2009-11-11 19:59:24 +00:00
6f7d5b22bb
Emit correct code when making a ConstantPool entry for a vector
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constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements. In practice any target with
8-bit bytes must support i8 *as data*). 7320806 (partial).
llvm-svn: 86751
2009-11-10 23:16:41 +00:00
f6eeaebd76
Implement support to debug inlined functions.
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llvm-svn: 86748
2009-11-10 23:06:00 +00:00
dca0c28452
Codegen support for the llvm.invariant/lifetime.start/end intrinsics:
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just throw them away.
llvm-svn: 86678
2009-11-10 09:08:09 +00:00
a951526510
Remove an unneeded #include.
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llvm-svn: 86601
2009-11-09 22:28:30 +00:00
f04c4cdb27
Fix for 64-bit builds.
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llvm-svn: 86600
2009-11-09 22:28:21 +00:00
ad7c6124e7
Hide a couple of options.
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llvm-svn: 86522
2009-11-09 06:49:37 +00:00
f93bb39b03
Add 8 bit libcalls and make use of them for msp430
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llvm-svn: 86384
2009-11-07 17:14:39 +00:00
8e1d7222a7
Fix PR5421 by APInt'izing switch lowering.
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llvm-svn: 86354
2009-11-07 07:50:34 +00:00
fc032ced22
Fix memoizing of CvtRndSatSDNode
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llvm-svn: 86340
2009-11-07 04:46:25 +00:00
07119737aa
Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
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llvm-svn: 86324
2009-11-07 02:11:54 +00:00
43bdc260d6
Avoid printing a redundant space in SDNode->dump().
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llvm-svn: 86151
2009-11-05 18:49:11 +00:00
34341e69c4
Make -print-machineinstrs more readable.
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- Be consistent when referring to MachineBasicBlocks: BB#0.
- Be consistent when referring to virtual registers: %reg1024.
- Be consistent when referring to unknown physical registers: %physreg10.
- Be consistent when referring to known physical registers: %RAX
- Be consistent when referring to register 0: %reg0
- Be consistent when printing alignments: align=16
- Print jump table contents.
- Don't print host addresses, in general.
- and various other cleanups.
llvm-svn: 85682
2009-10-31 20:19:03 +00:00
ba8735d25a
When discarding SrcValue information, discard all of it so that code
...
that uses this information knows to behave conservatively.
llvm-svn: 85654
2009-10-31 14:14:04 +00:00
a0ca9e944f
Fix warning with gcc-4.0 and signed/unsigned.
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llvm-svn: 85648
2009-10-31 09:24:35 +00:00
d814e32e57
Don't mark registers dead here when processing nodes with MVT::Flag
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results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.
llvm-svn: 85638
2009-10-30 23:57:47 +00:00
6c9388011b
Initial target-independent CodeGen support for BlockAddresses.
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llvm-svn: 85556
2009-10-30 01:27:03 +00:00
05efd893db
Remove some unnecessary spaces in debug output.
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llvm-svn: 85536
2009-10-29 23:30:06 +00:00
554a75a973
Move some code from being emitted as boilerplate duplicated in every
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*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
llvm-svn: 85530
2009-10-29 22:30:23 +00:00
453d64c9f5
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
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bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
llvm-svn: 85517
2009-10-29 18:10:34 +00:00
1fd4c577d2
Make sure we return the right sized type here.
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llvm-svn: 85436
2009-10-28 21:32:16 +00:00
14ca753e28
Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
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chains have no users, they can't be predecessors of the condition.
llvm-svn: 85394
2009-10-28 15:28:02 +00:00
cd139c0373
Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
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recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
llvm-svn: 85369
2009-10-28 03:44:30 +00:00
83896a59e1
Add a second ValueType argument to isFPImmLegal.
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llvm-svn: 85361
2009-10-28 01:43:28 +00:00
4b46cbfc23
Mark dead physregdefs dead immediately. This helps MachineSink and
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MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
2009-10-28 01:13:53 +00:00
d04cb6d0fa
rename indbr -> indirectbr to appease the residents of #llvm.
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llvm-svn: 85351
2009-10-28 00:19:10 +00:00
a5e078b677
Update the MachineBasicBlock CFG for an indirect branch.
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llvm-svn: 85325
2009-10-27 22:10:34 +00:00
a4374e66f0
Add CodeGen support for indirect branches.
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llvm-svn: 85323
2009-10-27 21:56:26 +00:00
26076a8f10
don't use stdio
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llvm-svn: 85296
2009-10-27 20:42:54 +00:00
16993aa30b
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
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llvm-svn: 85281
2009-10-27 19:56:55 +00:00
3ed871fe62
add enough support for indirect branch for the feature test to pass
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(assembler,asmprinter, bc reader+writer) and document it. Codegen
currently aborts on it.
llvm-svn: 85274
2009-10-27 19:13:16 +00:00
0997991252
pseudosourcevalue is also still using getGlobalContext(), so it isn't
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thread safe either.
llvm-svn: 85253
2009-10-27 17:02:08 +00:00
7a50b280c1
Add objectsize intrinsic and hook it up through codegen. Doesn't
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do anything than return "I don't know" at the moment.
llvm-svn: 85189
2009-10-27 00:52:25 +00:00
de5ad42aa1
Remove FreeInst.
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Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.
llvm-svn: 85176
2009-10-26 23:43:48 +00:00
974e12b2d3
Remove includes of Support/Compiler.h that are no longer needed after the
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
2009-10-25 06:57:41 +00:00
02d5f77d26
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
2009-10-25 06:33:48 +00:00
4ef112be62
APInt-ify the gep scaling code, so that it correctly handles the case where
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the scale overflows pointer-sized arithmetic. This fixes PR5281.
llvm-svn: 84954
2009-10-23 17:57:43 +00:00
8626367e38
Fix null pointer dereference.
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llvm-svn: 84806
2009-10-22 00:15:17 +00:00
a6faf60831
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
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transform.
llvm-svn: 84683
2009-10-20 21:37:45 +00:00
0e9d9ca855
-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed
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stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2 .
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
llvm-svn: 84424
2009-10-18 18:16:27 +00:00
0b8db2dab7
Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue.
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llvm-svn: 84411
2009-10-18 06:27:36 +00:00
8759585aba
Revert 84315 for now. Re-thinking the patch.
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llvm-svn: 84321
2009-10-17 07:53:04 +00:00
Dan Gohman