Commit Graph

147609 Commits

Author SHA1 Message Date
Eric Christopher fc2beaa136 Recommit r179497 after fixing uninitialized variable.
llvm-svn: 179512
2013-04-15 07:07:21 +00:00
Nadav Rotem a440a356e0 Document our desire to enable the loop vectorizer on -Os in future releases.
llvm-svn: 179511
2013-04-15 05:56:55 +00:00
Nadav Rotem 57da1fdd55 Docs: merge the description of the BB and SLP vectorizers and document the -fslp-vectorize-aggressive flag.
llvm-svn: 179510
2013-04-15 05:53:23 +00:00
Nadav Rotem d4dcc003df Add an option -vectorize-slp-aggressive for running the BB vectorizer. Make -fslp-vectorize run the slp-vectorizer.
llvm-svn: 179508
2013-04-15 05:39:58 +00:00
Nadav Rotem 6a0dd6b78c Add a new flag -vectorize-slp-aggressive to enable Hals BB vectorizer.
llvm-svn: 179507
2013-04-15 05:38:41 +00:00
Nadav Rotem 0a2604daab Rename the slp-vectorizer clang/llvm flags. No functionality change.
llvm-svn: 179506
2013-04-15 04:57:18 +00:00
Nadav Rotem a1e5e44eb3 Rename the slp-vectorizer clang/llvm flags. No functionality change.
llvm-svn: 179505
2013-04-15 04:54:42 +00:00
Nadav Rotem 5d393c416f SLPVectorizer: Add support for vectorizing trees that start at compare instructions.
llvm-svn: 179504
2013-04-15 04:25:27 +00:00
Jia Liu f3076492c2 fix include path in doc Extending LLVM
llvm-svn: 179503
2013-04-15 03:26:13 +00:00
Hal Finkel 95e6ea69be Mark all PPC comparison instructions as not having side effects
Now that the CR spilling issues have been resolved, we can remove the
unmodeled-side-effect attributes from the comparison instructions (and also
mark them as isCompare). By allowing these, by default, to have unmodeled side
effects, we were hiding problems with CR spilling; but everything seems much
happier now.

llvm-svn: 179502
2013-04-15 02:37:46 +00:00
Dmitri Gribenko 6e06e04ec1 Comment command table: use inheritance instead of duplicating code
llvm-svn: 179501
2013-04-15 02:31:50 +00:00
Hal Finkel 6736988ae2 Fix PPC64 CR spill location for callee-saved registers
This fixes an ABI bug for non-Darwin PPC64. For the callee-saved condition
registers, the spill location is specified relative to the stack pointer (SP +
8). However, this is not relative to the SP after the new stack frame is
established, but instead relative to the caller's stack pointer (it is stored
into the linkage area of the parent's stack frame).

So, like with the link register, we don't directly spill the CRs with other
callee-saved registers, but just mark them to be spilled during prologue
generation.

In practice, this reverts r179457 for PPC64 (but leaves it in place for PPC32).

llvm-svn: 179500
2013-04-15 02:07:05 +00:00
Eric Christopher 1f140317e3 Revert "Remove some unused triple and data layout."
This reverts commit r179497 and the accompanying commit as it broke random platforms that aren't osx.

llvm-svn: 179499
2013-04-14 23:35:36 +00:00
Eric Christopher 4eebd14ad0 Remove some unused triple and data layout.
llvm-svn: 179498
2013-04-14 23:32:44 +00:00
Eric Christopher e1876a2b79 If we've specified a triple on the command line then go ahead
and use that as the default triple for the module and target
data layout.

llvm-svn: 179497
2013-04-14 23:32:40 +00:00
Richard Smith dbf74baee5 CodeGen support for function-local static thread_local variables with
non-constant constructors or non-trivial destructors. Plus bugfixes for
thread_local references bound to temporaries (the temporaries themselves are
lifetime-extended to become thread_local), and the corresponding case for
std::initializer_list.

llvm-svn: 179496
2013-04-14 23:01:42 +00:00
Rafael Espindola e45f58d8a9 Removed #if 0 code that doesn't compiled if uncommented.
llvm-svn: 179495
2013-04-14 22:08:07 +00:00
Nico Rieck 334c7bc7eb Use object file specific section type for initial text section
llvm-svn: 179494
2013-04-14 21:18:36 +00:00
David Majnemer 1fae195557 Reorders two transforms that collide with each other
One performs: (X == 13 | X == 14) -> X-13 <u 2
The other: (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1

The problem is that there are certain values of C1 and C2 that
trigger both transforms but the first one blocks out the second,
this generates suboptimal code.

Reordering the transforms should be better in every case and
allows us to do interesting stuff like turn:
  %shr = lshr i32 %X, 4
  %and = and i32 %shr, 15
  %add = add i32 %and, -14
  %tobool = icmp ne i32 %add, 0

into:
  %and = and i32 %X, 240
  %tobool = icmp ne i32 %and, 224

llvm-svn: 179493
2013-04-14 21:15:43 +00:00
Nadav Rotem 6ebddae118 Make the command line triple match the module triple.
llvm-svn: 179492
2013-04-14 20:13:05 +00:00
Richard Smith 6ea1a4d1dc Diagnose if a __thread or _Thread_local variable has a non-constant initializer
or non-trivial destructor.

llvm-svn: 179491
2013-04-14 20:11:31 +00:00
Anna Zaks 1ebded0a11 [analyzer] Add a link to the Building a Checker in 24 Hours talk to the developer manual
llvm-svn: 179490
2013-04-14 18:36:51 +00:00
Simon Atanasyan 607776140b [Mips] Support -mmicromips / -mno-micromips command line options.
llvm-svn: 179489
2013-04-14 14:07:51 +00:00
Simon Atanasyan f00872479c [Mips] Fix indentation.
llvm-svn: 179488
2013-04-14 14:07:41 +00:00
Simon Atanasyan 82eec3aeba [Mips] Follow-up to r179481. Reduce code duplication. Use
AddTargetFeature() routine to handle -msingle-float / -mdouble-float
options.

llvm-svn: 179487
2013-04-14 14:07:36 +00:00
Simon Atanasyan 1607191e66 [Mips] Follow-up to r179481. Consider "single-float" as a separate
independent of float ABI feature in the MipsTargetInfoBase class.

llvm-svn: 179486
2013-04-14 14:07:30 +00:00
Tobias Grosser 3ed2600cab SCEVValidator: Correctly store 'k * p' as a parameter
We do not only need to understand that 'k * p' is a parameter expression, but
also need to store this expression in the set of parameters. Before this patch
we wrongly stored the two individual parameters %k and %p.

Reported by: Sebastian Pop <spop@codeaurora.org>

llvm-svn: 179485
2013-04-14 13:15:59 +00:00
Rafael Espindola 50ba983d25 Add driver support for fedora 18 on ARM.
llvm-svn: 179484
2013-04-14 10:14:21 +00:00
Benjamin Kramer 7d62ea86e5 Miscellaneous cleanups for VecUtils.h
llvm-svn: 179483
2013-04-14 09:33:08 +00:00
John McCall ad327cd214 Handle incompatible redeclarations of library builtins better.
Invalid redeclarations of valid explicit declarations shouldn't
take the same path as redeclarations of implicit declarations,
and invalid local extern declarations shouldn't foul things up
for everybody else.

llvm-svn: 179482
2013-04-14 08:50:55 +00:00
Simon Atanasyan 512dc38f81 [Mips] Remove "single" from the list of valid MIPS float ABI names. Add
two new options –msingle-float and –mdouble-float. These options can be
used simultaneously with float ABI selection options (-mfloat-abi,
-mhard-float, -msoft-float). They mark whether a floating-point
coprocessor supports double-precision operations.

llvm-svn: 179481
2013-04-14 08:37:15 +00:00
Nadav Rotem efa56e18be Document the SLP infrastructure.
llvm-svn: 179480
2013-04-14 07:42:25 +00:00
Nadav Rotem 3403c11529 SLP: Document the scalarization cost method.
llvm-svn: 179479
2013-04-14 07:22:22 +00:00
Nadav Rotem 0db0690a70 Document the decision to assume that the cost of floats is twice as much as integers.
llvm-svn: 179478
2013-04-14 05:55:18 +00:00
Jakob Stoklund Olesen eed1072ff8 Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.

llvm-svn: 179477
2013-04-14 05:48:50 +00:00
Nadav Rotem 029208ceeb Remove unused function attributes.
llvm-svn: 179476
2013-04-14 05:47:04 +00:00
Nadav Rotem 54b413d157 SLPVectorizer: Add support for trees that don't start at binary operators, and add the cost of extracting values from the roots of the tree.
llvm-svn: 179475
2013-04-14 05:15:53 +00:00
Jakob Stoklund Olesen c3c28f8599 Add support for the abs64 SPARC v9 code model.
For when 16 TB just isn't enough.

llvm-svn: 179474
2013-04-14 05:10:36 +00:00
Jakob Stoklund Olesen c8fc76b078 Add support for the SPARC v9 abs44 code model.
This is the default model for non-PIC 64-bit code. It supports
text+data+bss linked anywhere in the low 16 TB of the address space.

llvm-svn: 179473
2013-04-14 04:57:51 +00:00
Jakob Stoklund Olesen 2e64d7ab1d Use target flags for printing SPARC asm operands.
64-bit code models need multiple relocations that can't be inferred from
the opcode like they can in 32-bit code.

llvm-svn: 179472
2013-04-14 04:35:19 +00:00
Jakob Stoklund Olesen e0fc832b77 Also put target flags on SPARC constant pool references.
Constant pool entries are accessed exactly the same way as global
variables.

llvm-svn: 179471
2013-04-14 04:35:16 +00:00
Nadav Rotem 0b9cf8567b SLPVectorizer: add initial support for reduction variable vectorization.
llvm-svn: 179470
2013-04-14 03:22:20 +00:00
Jakob Stoklund Olesen dc1ed57858 Fix patterns for 64-bit pointers.
This fixes the pic32 code model for SPARC v9.

llvm-svn: 179469
2013-04-14 01:53:23 +00:00
Jakob Stoklund Olesen 1fb08a8b08 Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.

Also define flags to be used by the 64-bit code models.

llvm-svn: 179468
2013-04-14 01:33:32 +00:00
Howard Hinnant f3b02b17af Accidentally disallowed explicit tuple conversions when all elements of the tuple can be explicitly converted.
llvm-svn: 179467
2013-04-14 00:01:13 +00:00
Greg Clayton 9594f4c818 Fixed issues with the way ELF symbols are parsed:
- Do not add symbols with no names
- Make sure that symbols from ELF symbol tables know that the byte size is correct. Previously the symbols would calculate their sizes by looking for the next symbol and take symbols that had zero size and make them have invalid sizes.
- Added the ability to dump raw ELF symbols by adding a Dump method to ELFSymbol

Also removed some unused code from lldb_private::Symtab.

llvm-svn: 179466
2013-04-13 23:17:23 +00:00
Hal Finkel 2f29391504 Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriately
Leaving MFCR has having unmodeled side effects is not enough to prevent
unwanted instruction reordering post-RA. We could probably apply a stronger
barrier attribute, but there is a better way: Add all (not just the first) CR
to be spilled as live-in to the entry block, and add all CRs to the MFCR
instruction as implicitly killed.

Unfortunately, I don't have a small test case.

llvm-svn: 179465
2013-04-13 23:06:15 +00:00
Rafael Espindola 4f16ebfb30 Simplify test so that it is more portable.
I have checked that the test still fails when the "|| !P.isRegularFile()" from
the original patch is removed.

llvm-svn: 179464
2013-04-13 22:26:02 +00:00
Jakob Stoklund Olesen 15b3e90081 Define SPARC code models.
Currently, only abs32 and pic32 are implemented. Add a test case for
abs32 with 64-bit code. 64-bit PIC code is currently broken.

llvm-svn: 179463
2013-04-13 19:02:23 +00:00
Jakob Stoklund Olesen 6a0a3eb53e Use the correct types when matching ADDRri patterns from frame indexes.
It doesn't seem like anybody is checking types this late in isel, so no
test case.

llvm-svn: 179462
2013-04-13 19:02:16 +00:00