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Author SHA1 Message Date
Jay Foad 0819a6416f [SelectionDAG] Better legalization for FSHL and FSHR 
In SelectionDAGBuilder always translate the fshl and fshr intrinsics to
FSHL and FSHR (or ROTL and ROTR) instead of lowering them to shifts and
ORs. Improve the legalization of FSHL and FSHR to avoid code quality
regressions.

Differential Revision: https://reviews.llvm.org/D77152
 2020-08-21 10:32:49 +01:00
Sjoerd Meijer 13db7490fa [AArch64] Peephole optimization: merge AND and TST instructions 
In some cases Clang does not perform merging of instructions AND and TST (aka
ANDS xzr).

Example:

  tst x2, x1
  and x3, x2, x1

to:

  ands x3, x2, x1

This patch add such merging during instruction selection: when AND is replaced
with ANDS instruction in LowerSELECT_CC, all users of AND also should be
changed for using this ANDS instruction

Short discussion on mailing list:
http://llvm.1065342.n5.nabble.com/llvm-dev-ARM-Peephole-optimization-instructions-tst-add-tp133109.html

Patch by Pavel Kosov.

Differential Revision: https://reviews.llvm.org/D71701
 2020-02-27 09:23:47 +00:00
Roman Lebedev 3a5ca1c8b5 [DAGCombine][X86][AArch64][NFC] Add tests for shift-by-signext 
llvm-svn: 373014
 2019-09-26 20:49:49 +00:00