Commit Graph

176245 Commits

Author SHA1 Message Date
Saleem Abdulrasool fbfbaf6a93 Permit -Wswitch coverage for enumerations.
Thanks to David Blakie and Richard Smith for pointing out that we can retain the
-Wswitch coverage while avoiding the warning from GCC by pushing the unreachable
outside of the switch!

llvm-svn: 210812
2014-06-12 19:33:26 +00:00
Rafael Espindola 8730ee7375 Try to fix the polly build.
llvm-svn: 210811
2014-06-12 19:22:17 +00:00
Juergen Ributzka 5ad463f55e Revert "[FastIsel][X86] Add support for lowering the first 8 floating-point arguments."
Reverting it because it breaks several tests.

llvm-svn: 210810
2014-06-12 19:21:43 +00:00
Alexey Samsonov f0e4034c42 [llvm-symbolizer] Fix parsing DW_AT_ranges in Fission skeleton compile unit DIEs.
Turns out that DW_AT_ranges_base attribute sets the offset for
DW_AT_ranges values specified in the .dwo file, but not for DW_AT_ranges specified
in the skeleton compile unit DIE in the main executable. This is extremely confusing,
and would hopefully be fixed in DWARF-5 when it's finalized. For now this
behavior makes sense, as otherwise Fission would break DWARF consumers who
doesn't know anything about DW_AT_ranges_base.

llvm-svn: 210809
2014-06-12 18:52:35 +00:00
Bob Wilson 6823a0b678 Add missing "InitializerConstant" to global variable syntax in LangRef.
The syntax for Global Variables in LangRef is missing the initializer.
This syntax section was added in r199218 along with changes to the
dllexport/dllimport handling, and I guess it was just an oversight to omit the
initializer values. I’ve marked the initializer as optional because this syntax
is used for both declarations and definitions.

llvm-svn: 210808
2014-06-12 18:42:55 +00:00
Eli Bendersky dc6de2ce29 Revert r210721 as it causes breakage in internal builds (and possibly GDB).
llvm-svn: 210807
2014-06-12 18:05:39 +00:00
Saleem Abdulrasool 3c890c4ad6 X86: stifle GCC warning
lib/Target/X86/X86TargetTransformInfo.cpp: In member function ‘virtual unsigned int {anonymous}::X86TTI::getIntImmCost(unsigned int, unsigned int, const llvm::APInt&, llvm::Type*) const’:
lib/Target/X86/X86TargetTransformInfo.cpp:920:60: warning: enumeral and non-enumeral type in conditional expression [enabled by default]

This seems like an unhelpful warning, but there doesnt seem to be a controlling
flag, so add an explicit cast to silence the warning.

llvm-svn: 210806
2014-06-12 17:56:18 +00:00
Rafael Espindola 885719f027 Trying to fix the windows build.
llvm-svn: 210805
2014-06-12 17:49:35 +00:00
Saleem Abdulrasool c9340d2575 Basic: fix warnings from GCC
tools/clang/lib/Basic/DiagnosticIDs.cpp: In function ‘clang::DiagnosticIDs::Level toLevel(clang::diag::Severity)’:
tools/clang/lib/Basic/DiagnosticIDs.cpp:382:1: warning: control reaches end of non-void function [-Wreturn-type]

tools/clang/lib/Format/Format.cpp: In member function ‘virtual std::string clang::format::ParseErrorCategory::message(int) const’:
tools/clang/lib/Format/Format.cpp:282:1: warning: control reaches end of non-void function [-Wreturn-type]

Add a default cases that asserts that we handle the severity, parse error.

llvm-svn: 210804
2014-06-12 17:43:37 +00:00
Rafael Espindola a6e9c3e43a Remove system_error.h.
This is a minimal change to remove the header. I will remove the occurrences
of "using std::error_code" in a followup patch.

llvm-svn: 210803
2014-06-12 17:38:55 +00:00
Rafael Espindola 8a8e554adc Include system_error directly.
llvm-svn: 210802
2014-06-12 17:19:42 +00:00
Rafael Espindola 54427ccef3 include system_error directly.
llvm-svn: 210801
2014-06-12 17:15:58 +00:00
Rafael Espindola 1675d51eac Run llvm/utils/sort_includes.py in a few files.
This will reduce the noise in a followup patch.

llvm-svn: 210800
2014-06-12 17:12:28 +00:00
Rafael Espindola 7264b0bf29 Uses #include "..." instead of #include <...> for llvm headers.
llvm-svn: 210799
2014-06-12 17:08:11 +00:00
Fariborz Jahanian 8456406cdf More tests for // rdar://17259812
llvm-svn: 210798
2014-06-12 16:55:43 +00:00
Rafael Espindola fd85bb3424 include system_error directly.
llvm-svn: 210797
2014-06-12 16:53:02 +00:00
Simon Atanasyan 033ecd1cc8 [Mips] Make exe-dynamic.test test case independent from external input files.
llvm-svn: 210796
2014-06-12 16:46:47 +00:00
Fariborz Jahanian 4eba3dc7df Objective-C. Use isObjCRetainableType in my last
patch. NFC.

llvm-svn: 210795
2014-06-12 16:12:30 +00:00
Artyom Skrobov 8bafe4b942 adding re-include guards into lib/Support/reg*.h
llvm-svn: 210794
2014-06-12 16:07:56 +00:00
Zachary Turner 0921f6bdb8 Remove pimpl class from PassRegistry.
Since removeRegistrationListener is no longer called during static
destruction, we can get rid of the pimpl in PassRegistry.

This should clean up the code somewhat, increase clarity, and also
allows us to put the Lock as a member of the class, instead of as a
ManagedStatic.

As part of this change, the PassInfo class is moved from
PassSupport.h to its own file, to eliminate the otherwise circular
header dependency between PassRegistry.h and PassSupport.h

Reviewed by: rnk, dblaikie

Differential Revision: http://reviews.llvm.org/D4107

llvm-svn: 210793
2014-06-12 16:06:51 +00:00
Tom Stellard 7783b0adf4 Revert "SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for vectors"
This reverts commit r210540, adds a testcase for the regression it
caused, and marks the R600 test it was supposed to fix as XFAIL.

llvm-svn: 210792
2014-06-12 16:04:47 +00:00
Eli Bendersky 96e1ee1ed4 Explicitly initialize all fields to avoid -Wmissing-field-initializers warning.
llvm-svn: 210791
2014-06-12 15:47:57 +00:00
James Molloy 1417b0be3e Disable the load/store optimization pass for Thumb-1.
Moritz's changes have improved codegen a lot, but further testing showed significant correctness problems. Disable by default until these have been worked out.

Patch by Moritz Roth!

llvm-svn: 210789
2014-06-12 15:18:33 +00:00
Daniel Sanders 3d3ea53f32 [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6
Summary:
Also tightened up the acceptable condition operand for these instructions
on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior
to that only $fcc0 is acceptable.

We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's
probably best to do this in InstCombine.

Depends on D4111

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4112

llvm-svn: 210787
2014-06-12 15:00:17 +00:00
Daniel Sanders 39a1ca75ba [mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6
Summary:
These instructions are not implemented for any MIPS ISA so we only need
testcases.

Depends on D4110

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4111

llvm-svn: 210786
2014-06-12 14:54:13 +00:00
Rafael Espindola b1a4d3a26c Don't import error_code into the lld namespace.
llvm-svn: 210785
2014-06-12 14:53:47 +00:00
Daniel Sanders fd61fd3b6f [mips][mips64r6] [sl][duw]xc1 are not available on MIPS32r6/MIPS64r6
Summary:
Folded mips64-fp-indexed-ls.ll into fp-indexed-ls.ll. To do so, the zext's in
mips64-fp-indexed-ls.ll were changed to implicit sign extensions (performed
by getelementptr). This does not affect the purpose of the test.

Depends on D4004

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4110

llvm-svn: 210784
2014-06-12 14:19:28 +00:00
Rafael Espindola 0a5f9cf50d Replace llvm::error_code with std::error_code.
llvm-svn: 210783
2014-06-12 14:11:22 +00:00
Dinesh Dwivedi 95f0d51bd3 This removes TODO added in http://reviews.llvm.org/D3658
The patch transforms

ABS(NABS(X)) -> ABS(X)
NABS(ABS(X)) -> NABS(X)

Differential Revision: http://reviews.llvm.org/D4040

llvm-svn: 210782
2014-06-12 14:06:00 +00:00
Rafael Espindola 4956850fdc replace llvm::error_code with std::error_code.
llvm-svn: 210781
2014-06-12 14:04:54 +00:00
Rafael Espindola c080917ec2 Replace llvm::error_code with std::error_code.
llvm-svn: 210780
2014-06-12 14:02:15 +00:00
Daniel Sanders 6c97d979df [mips][mips64r6] prefx is not available on MIPS32r6/MIPS64r6
Summary: We haven't implemented this instruction so we only add a test case.

Reviewers: vmedic, zoran.jovanovic, jkolek

Reviewed By: jkolek

Differential Revision: http://reviews.llvm.org/D4004

llvm-svn: 210779
2014-06-12 13:51:27 +00:00
Daniel Sanders 557889affd [mips][mips64r6] 80 col corrections that should have been in r210777.
llvm-svn: 210778
2014-06-12 13:42:04 +00:00
Daniel Sanders 0fa6041625 [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6
Summary:
c.cond.fmt has been replaced by cmp.cond.fmt. Where c.cond.fmt wrote to
dedicated condition registers, cmp.cond.fmt writes 1 or 0 to normal FGR's
(like the GPR comparisons).

mov[fntz] have been replaced by seleqz and selnez. These instructions
conditionally zero a register based on a bool in a GPR. The results can
then be or'd together to act as a select without, for example, requiring a third
register read port.

mov[fntz].[ds] have been replaced with sel.[ds]

MIPS64r6 currently generates unnecessary sign-extensions for most selects.
This is because the result of a SETCC is currently an i32. Bits 32-63 are
undefined in i32 and the behaviour of seleqz/selnez would otherwise depend
on undefined bits. Later, we will fix this by making the result of SETCC an
i64 on MIPS64 targets.

Depends on D3958

Reviewers: jkolek, vmedic, zoran.jovanovic

Reviewed By: vmedic, zoran.jovanovic

Differential Revision: http://reviews.llvm.org/D4003

llvm-svn: 210777
2014-06-12 13:39:06 +00:00
Rafael Espindola 15c5784d3c Replace llvm::error_code with std::error_code.
llvm-svn: 210776
2014-06-12 13:32:11 +00:00
Daniel Sanders 559dd851b6 [mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6
Summary: Depends on D3957

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3958

llvm-svn: 210775
2014-06-12 12:58:20 +00:00
Rafael Espindola 374597abfc Allow lowercase messages in this test again.
I misunderstood where the message was being converted.

llvm-svn: 210774
2014-06-12 12:40:04 +00:00
Zoran Jovanovic b9c07f3b86 [mips][mips64r6] Add R_MIPS_PC19_S2
Differential Revision: http://reviews.llvm.org/D3866

llvm-svn: 210773
2014-06-12 12:40:00 +00:00
Rafael Espindola ed6882b835 Don't import make_error_code into the llvm namespace.
llvm-svn: 210772
2014-06-12 11:58:49 +00:00
Daniel Sanders 1f6f0f4b54 [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64
Summary:
To make this work for both AFGR64 and FGR64 register sets, I've had to make the
instruction definition consistent with the white lie (that it reads the lower
32-bits of the register) when they are generated by expandBuildPairF64().

Corrected the definition of hasMips32r2() and hasMips64r2() to include
MIPS32r6 and MIPS64r6.

Depends on D3956

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3957

llvm-svn: 210771
2014-06-12 11:55:58 +00:00
Zoran Jovanovic 28a0ca0759 [mips][mips64r6] Add bgec and bgeuc instructions
Differential Revision: http://reviews.llvm.org/D4017

llvm-svn: 210770
2014-06-12 11:47:44 +00:00
Andrea Di Biagio 2dd3b3b674 [X86] Teach how to dump the name of target node RDTSCP_DAG.
When I originally added node RDTSCP_DAG (r207127) I forgot to add
a string name for it in method 'getTargetNodeName'.

No functional change intended.

llvm-svn: 210769
2014-06-12 11:37:24 +00:00
Rafael Espindola 1f24317d87 Fix msvc unittest build.
Looks like msvc has an asymmetrical operator ==.

llvm-svn: 210768
2014-06-12 11:35:17 +00:00
Alexander Kornienko 3095b420f4 A follow-up to r210260: updated a comment. No functional changes.
llvm-svn: 210767
2014-06-12 11:25:45 +00:00
Alp Toker 65faa29670 CMake: don't install the internal config.h header
Background:
  http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-June/073707.html

llvm-svn: 210766
2014-06-12 11:25:18 +00:00
Alp Toker 10933d1489 Track clang changes from r210764
llvm-svn: 210765
2014-06-12 11:14:32 +00:00
Alp Toker d576e00b44 DiagnosticsEngine: update severity setters to new terminology
llvm-svn: 210764
2014-06-12 11:13:52 +00:00
Daniel Sanders ded02af45e [mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not available on MIPS32r6/MIPS64r6
Summary:
This patch updates both the assembler and the code generator.

MIPS32r6/MIPS64r6 replaces them with maddf.[ds] and msubf.[ds] which are fused
multiply-add/sub operations. We don't emit these yet, this patch only prevents the removed instructions from being emitted.

Depends on D3955

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3956

llvm-svn: 210763
2014-06-12 11:04:18 +00:00
Daniel Sanders 826f8b3d0c [mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6
Summary:
This patch disables madd/maddu/msub/msubu in both the assembler and code
generator.

Depends on D3896

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3955

llvm-svn: 210762
2014-06-12 10:54:16 +00:00
Andrea Di Biagio 972ff97f8c [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit vectors.
This patch adds target combine rules to match:
 - [AVX] Horizontal add/sub of packed single/double precision floating point
   values from 256-bit vectors;
 - [AVX2] Horizontal add/sub of packed integer values from 256-bit vectors.

llvm-svn: 210761
2014-06-12 10:53:48 +00:00