maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
69,299 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

22 Commits

Author SHA1 Message Date
Evan Cheng 977e7be9d4 Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 
llvm-svn: 59953
 2008-11-24 07:34:46 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Chris Lattner 4f2e4e0f92 Switch PPC return lower to use an autogenerated CC description. 
llvm-svn: 34940
 2007-03-06 00:59:59 +00:00
Jim Laskey 59e7a777da Honor cpu directive, take two. 
llvm-svn: 32492
 2006-12-12 20:57:08 +00:00
Chris Lattner a35f306740 Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
 2006-06-16 17:34:12 +00:00
Evan Cheng 305c49579c getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng dcec882286 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Chris Lattner 6e90062416 add callee saved vector regs 
llvm-svn: 26805
 2006-03-16 22:07:06 +00:00
Chris Lattner 7579cfb1a0 Mark instructions that are cracked by the PPC970 decoder as such. 
llvm-svn: 26720
 2006-03-13 05:15:10 +00:00
Chris Lattner 51348c5f27 Several big changes: 
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
   type instead of a table in the .cpp file.  Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
   algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
   accurately.

llvm-svn: 26719
 2006-03-12 09:13:49 +00:00
Chris Lattner b9f35f06bc Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421
 2006-02-28 07:08:22 +00:00
Evan Cheng d98701c639 Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Jim Laskey 53ad110490 Add attribute name and type to SubtargetFeatures. 
llvm-svn: 24012
 2005-10-26 17:28:23 +00:00
Chris Lattner abcce5c4b3 mark this as beta 
llvm-svn: 23906
 2005-10-23 22:23:45 +00:00
Chris Lattner a389f0d8fa rearrange things a bit so that instructions can use subtarget features in the 
future.

llvm-svn: 23902
 2005-10-23 22:08:13 +00:00
Chris Lattner 0d4923b975 improve -help output 
llvm-svn: 23892
 2005-10-23 05:28:51 +00:00
Jim Laskey 13a19453d2 Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's 
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.

llvm-svn: 23880
 2005-10-22 08:04:24 +00:00
Chris Lattner c5d511c4d9 64-bit reg support should not be enabled by default, as support isn't complete. 
llvm-svn: 23878
 2005-10-21 22:15:43 +00:00
Jim Laskey 9ed9032e22 Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Jim Laskey 74ab9960f2 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
Chris Lattner 7503d46feb Rename PowerPC*.td -> PPC*.td 
llvm-svn: 23740
 2005-10-14 23:40:39 +00:00
Chris Lattner 0921e3bfc1 Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td 
llvm-svn: 23738
 2005-10-14 23:37:35 +00:00