Commit Graph

260698 Commits

Author SHA1 Message Date
Matt Arsenault df6539f44b AMDGPU: Set StackGrowsUp in MCAsmInfo
Not sure what this does though.

llvm-svn: 301229
2017-04-24 19:40:51 +00:00
Stanislav Mekhanoshin bd5394be3d [AMDGPU] Merge M0 initializations
Merges equivalent initializations of M0 and hoists them into a common
dominator block. Technically the same code can be used with any
register, physical or virtual.

Differential Revision: https://reviews.llvm.org/D32279

llvm-svn: 301228
2017-04-24 19:37:54 +00:00
Piotr Padlewski 610c966a4e Handle invariant.group.barrier in BasicAA
Summary:
llvm.invariant.group.barrier returns pointer that mustalias
pointer it takes. It can't be marked with `returned` attribute,
because it would be remove easily. The other reason is that
only Alias Analysis can know about this, because if any other
pass would know it, then the result would be replaced with it's
argument, which would be invalid.

We can think about returned pointer as something that mustalias, but
it doesn't have to be bitwise the same as the argument.

Reviewers: dberlin, chandlerc, hfinkel, sanjoy

Subscribers: reames, nlewycky, rsmith, anna, amharc

Differential Revision: https://reviews.llvm.org/D31585

llvm-svn: 301227
2017-04-24 19:37:17 +00:00
Evgeniy Stepanov 9e536081fe [asan] Let the frontend disable gc-sections optimization for asan globals.
Also extend -asan-globals-live-support flag to all binary formats.

llvm-svn: 301226
2017-04-24 19:34:13 +00:00
Evgeniy Stepanov df217a2f3c [asan] Disable ASan global-GC depending on the target and compiler flags.
llvm-svn: 301225
2017-04-24 19:34:12 +00:00
Artem Dergachev 37de888867 [analyzer] Improve suppression for inlined defensive checks before operator &.
Null dereferences are suppressed if the lvalue was constrained to 0 for the
first time inside a sub-function that was inlined during analysis, because
such constraint is a valid defensive check that does not, by itself,
indicate that null pointer case is anyhow special for the caller.

If further operations on the lvalue are performed, the symbolic lvalue is
collapsed to concrete null pointer, and we need to track where does the null
pointer come from.

Improve such tracking for lvalue operations involving operator &.

rdar://problem/27876009

Differential Revision: https://reviews.llvm.org/D31982

llvm-svn: 301224
2017-04-24 19:30:33 +00:00
Carlo Bertolli 4287d65c10 [OpenMP] Initial implementation of code generation for pragma 'distribute parallel for' on host
https://reviews.llvm.org/D29508

This patch makes the following additions:

1. It abstracts away loop bound generation code from procedures associated with pragma 'for' and loops in general, in such a way that the same procedures can be used for 'distribute parallel for' without the need for a full re-implementation.
2. It implements code generation for 'distribute parallel for' and adds regression tests. It includes tests for clauses.

It is important to notice that most of the clauses are implemented as part of existing procedures. For instance, firstprivate is already implemented for 'distribute' and 'for' as separate pragmas. As the implementation of 'distribute parallel for' is based on the same procedures, then we automatically obtain implementation for such clauses without the need to add new code. However, this requires regression tests that verify correctness of produced code.

Looking forward to comments.

llvm-svn: 301223
2017-04-24 19:26:11 +00:00
Mandeep Singh Grang 799a2edb3d [SimplifyCFG] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718

Reviewers: majnemer, chenli, davide

Reviewed By: davide

Subscribers: davide, arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D26726

llvm-svn: 301222
2017-04-24 19:20:45 +00:00
Krzysztof Parzyszek 44e25f37ae Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
   - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
   - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
   - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;

This will allow making those values depend on subtarget features in the
future.

Differential Revision: https://reviews.llvm.org/D31783

llvm-svn: 301221
2017-04-24 18:55:33 +00:00
Dimitry Andric 49e033f41d Don't test setting sticky bits on files for modern BSDs
Summary: In rL297945, jhenderson added methods for setting permissions
to sys::fs, but some of the unittests that attempt to set sticky bits
(01000) on files fail on modern BSDs, such as FreeBSD, NetBSD and
OpenBSD.  This is because those systems do not allow regular users to
set sticky bits on files, only on directories.  Fix it by disabling
these particular tests on modern BSDs.

Reviewers: emaste, brad, jhenderson

Reviewed By: jhenderson

Subscribers: joerg, krytarowski, llvm-commits

Differential Revision: https://reviews.llvm.org/D32120

llvm-svn: 301220
2017-04-24 18:54:48 +00:00
Adrian Prantl 083e6a5b5c Don't emit CFI instructions at the end of a function
When functions are terminated by unreachable instructions, the last
instruction might trigger a CFI instruction to be generated. However,
emitting it would be be illegal since the function (and thus the FDE
the CFI is in) has already ended with the previous instruction.

Darwin's dwarfdump --verify --eh-frame complains about this and the
specification supports this.
Relevant bits from the DWARF 5 standard (6.4 Call Frame Information):

"[The] address_range [field in an FDE]: The number of bytes of
 program instructions described by this entry."

"Row creation instructions: [...]
 The new location value is always greater than the current one."
The first quotation implies that a CFI cannot describe a target
address outside of the enclosing FDE's range.

rdar://problem/26244988

Differential Revision: https://reviews.llvm.org/D32246

llvm-svn: 301219
2017-04-24 18:45:59 +00:00
Matthias Braun 285f88d4a3 Pragma: Fix DebugOverflowStack() resulting in endless loop.
Drive-by fix (noticed while working on https://reviews.llvm.org/D32205):
DebugOverflowStack() is supposed to provoke a stack overflow, however
LLVM was smart enough to use the red-zone and fold the load into a tail
jump on x86_64 optimizing this to an endless loop instead of a stack
overflow.

llvm-svn: 301218
2017-04-24 18:41:00 +00:00
George Karpenkov 0d447d514a Updates documentation for a syntax sugar libfuzzer flag,
as implemented in https://reviews.llvm.org/D32193

llvm-svn: 301217
2017-04-24 18:39:52 +00:00
George Karpenkov 38b0d82b2d Remove erroneous driver test for -fsanitize=fuzzer flag
libfuzzer is not available on all platforms, and hence we can not always
rely that it was compiled.

llvm-svn: 301216
2017-04-24 18:36:31 +00:00
Yaxun Liu fd23a0c095 CodeGen: Add a hook for getFenceOperandTy
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0.
This is fine for most targets. However for amdgcn target, the size of pointer in address space 0
depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is
32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target
triple environment. Therefore a hook is need in target lowering for getting the fence operand type.

This patch has no effect on targets other than amdgcn.

Differential Revision: https://reviews.llvm.org/D32186

llvm-svn: 301215
2017-04-24 18:26:27 +00:00
Evgeniy Stepanov 58ccc0949a Revert "Compute safety information in a much finer granularity."
Use-after-free in llvm::isGuaranteedToExecute.

llvm-svn: 301214
2017-04-24 18:25:07 +00:00
Sanjay Patel 0889225f51 [InstSimplify] move (A & ~B) | (A ^ B) -> (A ^ B) from InstCombine
This is a straight cut and paste, but there's a bigger problem: if this
fold exists for simplifyOr, there should be a DeMorganized version for
simplifyAnd. But more than that, we have a patchwork of ad hoc logic
optimizations in InstCombine. There should be some structure to ensure 
that we're not missing sibling folds across and/or/xor.
 

llvm-svn: 301213
2017-04-24 18:24:36 +00:00
George Karpenkov f2fc5b068e Flag -fsanitize=fuzzer to enable libfuzzer
Previously, adding libfuzzer to a project was a multi-step procedure,
involving libfuzzer compilation, linking the library, and specifying
coverage flags.
With this change,libfuzzer can be enabled by adding a single
-fsanitize=fuzzer flag instead.

llvm-svn: 301212
2017-04-24 18:23:24 +00:00
Matthias Braun f9796b76e9 X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC
Re-Commit of r300922 and r300923 with less aggressive assert (see
discussion at the end of https://reviews.llvm.org/D32205)

X86RegisterInfo::eliminateFrameIndex() and
X86FrameLowering::getFrameIndexReference() both had logic to compute the
base register. This consolidates the code.

Also use MachineInstr::isReturn instead of manually enumerating tail
call instructions (return instructions were not included in the previous
list because they never reference frame indexes).

Differential Revision: https://reviews.llvm.org/D32206

llvm-svn: 301211
2017-04-24 18:15:00 +00:00
Adrian Prantl f2c7997013 Use DW_OP_stack_value when reconstructing variable values with arithmetic.
When the location description of a source variable involves arithmetic
on the value itself, it needs to be marked with DW_OP_stack_value since it
is not describing the variable's location, but rather its value.

This is a follow-up to r297971 and fixes the source testcase quoted in
the comment in debuginfo-dce.ll.

rdar://problem/30725338

This reapplies r301093 without modifications.

llvm-svn: 301210
2017-04-24 18:11:42 +00:00
Adrian Prantl 283833d022 Add a testcase for DIExpression(DW_OP_stack_value)
and relax the assertion that prohibited its emission.

This fixes the assertion failure uncovered by r301093.

llvm-svn: 301209
2017-04-24 18:11:38 +00:00
Matt Arsenault 1c0ae3972f AMDGPU: Add StackPtr and FramePtr registers to MFI
These will be necessary for setting up call sequences.

llvm-svn: 301208
2017-04-24 18:05:16 +00:00
Shoaib Meenai b573b4b04d [ELF] Account for R_386_TLS_LDO_32 addend
This relocation type has an implicit addend. Account for it when
processing the relocation. Add an offset to an existing test to ensure
it gets processed correctly.

Fixes PR32634.

Differential Revision: https://reviews.llvm.org/D32336

llvm-svn: 301207
2017-04-24 18:02:11 +00:00
Matt Arsenault 3e02538a02 AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.

Also happens to stop emitting a nop in the case
debug trap is not supported.

llvm-svn: 301206
2017-04-24 17:49:13 +00:00
Davide Italiano ebd77645cc [DomPrinter] Add a way to programmatically dump a dot representation.
Differential Revision:  https://reviews.llvm.org/D32145

llvm-svn: 301205
2017-04-24 17:48:44 +00:00
Zachary Turner da949c1804 [llvm-pdbdump] Merge functionality of graphical and text dumpers.
The *real* difference between these two was that

a) The "graphical" dumper could recurse, while the text one could
   not.
b) The "text" dumper could display nested types and functions,
   while the graphical one could not.

Merge these two so that there is only one dumper that can recurse
arbitrarily deep and optionally display nested types or not.

llvm-svn: 301204
2017-04-24 17:47:52 +00:00
Zachary Turner 1690164cac [llvm-pdbdump] Re-write the record layout code to be more resilient.
This reworks the way virtual bases are handled, and also the way
padding is detected across multiple levels of aggregates, producing
a much more accurate result.

llvm-svn: 301203
2017-04-24 17:47:24 +00:00
Craig Topper cadadabb76 [Docs] Correct the path to the clang-format-diff.py script to include the clang-format directory.
llvm-svn: 301202
2017-04-24 17:39:35 +00:00
Craig Topper 1dec281104 [APInt] Simplify the zext and sext methods
This replaces a hand written copy loop with a call to memcpy for both zext and sext.

For sext, it replaces multiple if/else blocks propagating sign information forward. Now we just do a copy, a sign extension on the last copied word, a memset, and clearUnusedBits.

Differential Revision: https://reviews.llvm.org/D32417

llvm-svn: 301201
2017-04-24 17:37:10 +00:00
George Karpenkov 0ab4f06bf1 Testing commit credentials
llvm-svn: 301200
2017-04-24 17:28:32 +00:00
Matt Arsenault 02907f3039 InstCombine: Fix assert when reassociating fsub with undef
There is logic to track the expected number of instructions
produced. It thought in this case an instruction would
be necessary to negate the result, but here it folded
into a ConstantExpr fneg when the non-undef value operand
was cancelled out by the second fsub.

I'm not sure why we don't fold constant FP ops with undef currently,
but I think that would also avoid this problem.

llvm-svn: 301199
2017-04-24 17:24:37 +00:00
Craig Topper 8b37326ae2 [APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.

I've tried to make this similar to the lshr code with additions to handle the sign extension. I've also tried to do this with less if checks than the current ashr code by sign extending the original result to a word boundary before doing any of the shifting. This removes a lot of the complexity of determining where to fill in sign bits after the shifting.

Differential Revision: https://reviews.llvm.org/D32415

llvm-svn: 301198
2017-04-24 17:18:47 +00:00
Nicolai Haehnle 5dea645138 AMDGPU: Move v_readlane lane select from VGPR to SGPR
Summary:
Fix a compiler bug when the lane select happens to end up in a VGPR.

Clarify the semantic of the corresponding intrinsic to be that of
the corresponding GLSL: the lane select must be uniform across a
wave front, otherwise results are undefined.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D32343

llvm-svn: 301197
2017-04-24 17:17:36 +00:00
Xin Tong a266923d57 Compute safety information in a much finer granularity.
Summary:
Instead of keeping a variable indicating whether there are early exits
in the loop.  We keep all the early exits. This improves LICM's ability to
move instructions out of the loop based on is-guaranteed-to-execute.

I am going to update compilation time as well soon.

Reviewers: hfinkel, sanjoy, efriedma, mkuper

Reviewed By: hfinkel

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D32433

llvm-svn: 301196
2017-04-24 17:12:22 +00:00
Nicolai Haehnle 9c66185315 InstCombine/AMDGPU: Fix constant folding of llvm.amdgcn.{icmp,fcmp}
Summary:
The return value of these intrinsics should always have 0 bits for
inactive threads. This means that when all arguments are constant
and the comparison evaluates to true, the intrinsic should return
the current exec mask.

Fixes some GL_ARB_shader_ballot tests.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32344

llvm-svn: 301195
2017-04-24 17:08:43 +00:00
Igor Breger 87aafa073f [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Summary: [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.

Reviewers: zvi, t.p.northover, guyblank

Reviewed By: t.p.northover

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32288

llvm-svn: 301194
2017-04-24 17:05:52 +00:00
Simon Pilgrim f60f57e6e8 [DAGCombiner] Updated bswap byte offset variable names to be more descriptive. NFC
As discussed on D32039, use MaskByteOffset to describe the variable and also pull out repeated getOpcode() calls.

llvm-svn: 301193
2017-04-24 17:05:14 +00:00
Craig Topper c6b05684c6 [APInt] Fix repeated word in comments. NFC
llvm-svn: 301192
2017-04-24 17:00:22 +00:00
Nicolai Haehnle ef449787d8 AMDGPU: Fix crash when scheduling non-memory SMRD instructions
Summary: Fixes piglit spec/arb_shader_clock/execution/*

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32345

llvm-svn: 301191
2017-04-24 16:53:52 +00:00
Kuba Mracek dd13e4e0b0 [tsan] Include __tsan_external_* API from a header file instead of declaring them manually. NFC.
Differential Revision: https://reviews.llvm.org/D32384

llvm-svn: 301190
2017-04-24 16:48:30 +00:00
Kuba Mracek 264b6de4b0 [tsan] Remove the extra word "object" from description of external races
Differential Revision: https://reviews.llvm.org/D32383

llvm-svn: 301189
2017-04-24 16:42:29 +00:00
Haojian Wu 8fd72968d4 [clang-tidy] Some Cleanups for performance-faster-string-find check.
NFC

llvm-svn: 301188
2017-04-24 16:41:00 +00:00
Nirav Dave c799f3a809 [SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
While we use BaseIndexOffset in FindBetterNeighborChains to
appropriately realize they're almost the same address and should be
improved concurrently we do not use it in isAlias using the non-index
understanding FindBaseOffset instead. Adding a BaseIndexOffset check
in isAlias like should allow indexed stores to be merged.

FindBaseOffset to be excised in subsequent patch.

Reviewers: jyknight, aditya_nandakumar, bogner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31987

llvm-svn: 301187
2017-04-24 15:37:20 +00:00
Pavel Labath b4f6a95680 Update two android XFAILS
- XFAIL on TestNoreturnUnwind on all architectures
- TestStaticVariables fails with clang-3.8 as well

llvm-svn: 301186
2017-04-24 15:23:21 +00:00
Aaron Ballman 72163a9da5 Extend readability-container-size-empty to add comparisons to empty-state objects.
Patch by Josh Zimmerman.

llvm-svn: 301185
2017-04-24 14:57:09 +00:00
Kostya Kortchinsky 38199b2a30 [sanitizer] Cache SizeClassForTransferBatch in the 32-bit local cache
Summary:
`SizeClassForTransferBatch` is expensive and is called for every `CreateBatch`
and `DestroyBatch`. Caching it means `kNumClasses` calls in `InitCache`
instead. This should be a performance gain if more than `kNumClasses / 2`
batches are created and destroyed during the lifetime of the local cache.

I have chosen to fully remove the function and putting the code in `InitCache`,
which is a debatable choice.

In single threaded benchmarks leveraging primary backed allocations, this turns
out to be a sizeable gain in performances (greater than 5%). In multithreaded
benchmarks leveraging everything, it is less significant but still an
improvement (about 1%).

Reviewers: kcc, dvyukov, alekseyshl

Reviewed By: dvyukov

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D32365

llvm-svn: 301184
2017-04-24 14:53:38 +00:00
Argyrios Kyrtzidis b4b85f2033 [index] If the 'external_source_symbol' attribute indicates 'Swift' as the language then report it accordingly
llvm-svn: 301183
2017-04-24 14:52:00 +00:00
Daniel Jasper cab4617132 clang-format: Fix bad corner case in formatting of function types.
Before:
  std::function<
      LoooooooooooongTemplatedType<SomeType>*(
          LooooooooooooooooooooongType
              type)>
      function;

After:
  std::function<
      LoooooooooooongTemplatedType<
          SomeType>*(
          LooooooooooooooooongType type)>
      function;

clang-format generally avoids having lines like "SomeType>*(" as they
lead to parameter lists that don't belong together to be aligned. However, in
case it is better than the alternative, which can even be violating the column
limit.

llvm-svn: 301182
2017-04-24 14:28:49 +00:00
Simon Pilgrim 9111cd950d [X86][AVX] Add scheduling latency/throughput tests for missing AVX1 instructions
Had to split btver2/znver1 checks as only btver2 suppresses zeroupper

llvm-svn: 301181
2017-04-24 14:26:30 +00:00
Alex Lorenz a352ba0cbe [index] The relation between the declarations in template specializations
that 'override' declarations in the base template should be recorded

This can be used for improved "go to definition" feature in Xcode.

rdar://31604739

Differential Revision: https://reviews.llvm.org/D32020

llvm-svn: 301180
2017-04-24 14:04:58 +00:00