Commit Graph

291677 Commits

Author SHA1 Message Date
Luke Geeson 43e4367961 [AArch64] Audit on rL333634 to fix FP16 Disasm BitPatterns
llvm-svn: 333879
2018-06-04 09:41:32 +00:00
Pavel Labath 3ca31ba75a AppleDWARFIndex: Get function method-ness directly from debug info
Summary:
When searching for methods only, we need to do extra work to make sure
the functions we get from the apple tables are indeed methods.
Previously we were resolving the DIE into a SymbolContext and then
checked whether the enclosing CompilerDeclContext is a
class (or struct, or union).

This patch changes that to operate on the debug info directly. This
should be:
- simpler
- faster
- more consistent with the ManualDWARFIndex (which does the same check,
  only at indexing time).

What we lose this ways is for the language plugin to have a say in what
it considers to be a "class", but that's probably more flexibility than
we need (and if we really wanted to do that in the future, we could
implement a more direct way to consult the plugin about this).

This also fixes the find-method-local-struct test, which was failing
because we were not able to construct a CompilerDeclContext for a local
struct correctly.

As a drive-by, I rename the DWARFDIE's IsStructClassOrUnion method to
match the name on the CompilerDeclContext class.

Reviewers: clayborg, JDevlieghere

Subscribers: aprantl, lldb-commits

Differential Revision: https://reviews.llvm.org/D47470

llvm-svn: 333878
2018-06-04 09:05:27 +00:00
Eric Liu 528eb6599f Reland "[clangd] Adapt file migration in r332720"
This reverts commit r333535.

llvm-svn: 333877
2018-06-04 09:04:28 +00:00
Eric Liu a1dee23b89 Revert "Reland "[clangd] Adapt file migration in r332720""
This reverts commit r333533.

llvm-svn: 333876
2018-06-04 09:04:25 +00:00
Eric Liu 719674bdf1 Reland "[clangd] Adapt file migration in r332720"
This reverts commit r332752 (i.e. reland r332721).

llvm-svn: 333875
2018-06-04 09:04:19 +00:00
Eric Liu 44564ac7eb Reland "Move #include manipulation code to new lib/Tooling/Inclusions."
This reverts commit r333534 (i.e. reland r332720) after fixing module build.

Differential Revision: https://reviews.llvm.org/D47068

llvm-svn: 333874
2018-06-04 09:04:12 +00:00
Sander de Smalen d0a6f6a502 [AArch64][SVE] Fix range for DUP immediates (16bit elts)
For immediates used in DUP instructions that have the range
-128 to 127, or a multiple of 256 in the range -32768 to 32512,
one could argue that when the result element size is 16bits (.h),
the value can be considered both signed and unsigned.

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47619

llvm-svn: 333873
2018-06-04 07:24:23 +00:00
Sander de Smalen fd54a781f6 [AArch64][SVE] Asm: Print indexed element 0 as FPR.
Print the first indexed element as a FP register, for example:

  mov z0.d, z1.d[0]

Is now printed as:

  mov z0.d, d1

Next to printing, this patch also adds aliases to parse 'mov z0.d, d1'.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47571

llvm-svn: 333872
2018-06-04 07:07:35 +00:00
Sander de Smalen c33d668ab7 [AArch64][SVE] Asm: Support for indexed DUP instructions.
Unpredicated copy of indexed SVE element to SVE vector,
along with MOV-aliases.

For example:

  dup     z0.h, z1.h[0]

duplicates the first 16-bit element from z1 to all elements in
the result vector z0.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47570

llvm-svn: 333871
2018-06-04 06:40:55 +00:00
David Carlier a6303a9866 [TSan] FreeBSD / intercept thr_exit
intercepting thr_exit to terminate threads under FreeBSD.
Unblock few unit tests hanging.

Reviewers: krytarowski, vitalybuka, emaste

Reviewed By: dvyukov		

Differential Revision: https://reviews.llvm.org/D47677

M    lib/tsan/rtl/tsan_interceptors.cc

llvm-svn: 333870
2018-06-04 06:02:38 +00:00
Sander de Smalen 367a53b059 [AArch64][SVE] Asm: Support for FCPY immediate instructions.
Predicated copy of floating-point immediate value to SVE vector,
along with MOV-aliases.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: javed.absar

Differential Revision: https://reviews.llvm.org/D47518

llvm-svn: 333869
2018-06-04 05:58:06 +00:00
Sander de Smalen 512d57f1a5 [AArch64][SVE] Asm: Support for CPY immediate instructions
Predicated copy of possibly shifted immediate value into SVE
vector, along with MOV-aliases.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47517

llvm-svn: 333868
2018-06-04 05:40:46 +00:00
Dean Michael Berris d12cb59c7a [XRay][compiler-rt] Remove RTTI requirement from XRay Builds
XRay doesn't use RTTI and doesn't need it. We disable it explicitly in
the CMake config, similar to how the other sanitizers already do it.

Part of the work to address http://llvm.org/PR32274.

llvm-svn: 333867
2018-06-04 04:22:26 +00:00
Vedant Kumar 7dda22115e [Debugify] Add debug intrinsics before terminating musttail calls
After r333856, opt -debugify would just stop emitting debug value
intrinsics after encountering a musttail call. This wasn't sufficient to
avoid verifier failures.

Debug value intrinicss for all instructions preceding a musttail call
must also be emitted before the musttail call.

llvm-svn: 333866
2018-06-04 03:33:01 +00:00
Craig Topper ae5f0a8a78 [X86] Fix a couple places that were using macro arguments twice when of the usages could just be undefined.
One of the arguments was being used when the passthru argument is unused due to the mask being all 1s. But in that case the actual value doesn't matter so we should use undef instead to avoid expanding the macro argument unnecessarily.

llvm-svn: 333865
2018-06-04 02:56:18 +00:00
Serguei Katkov d894fb4288 [InstCombine] Fix div handling
When we optimize select basing on fact that div by 0 is undef
we should not traverse the instruction which are not guaranteed to
transfer execution to next instruction. Guard intrinsic is an example.

Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47576

llvm-svn: 333864
2018-06-04 02:52:36 +00:00
Saleem Abdulrasool 23d66ae1e4 Python: adjust the include directories
Restructure the include search order to adjust for libedit.  This
ensures that the variables are not unused if they are not defined.

llvm-svn: 333863
2018-06-04 02:08:12 +00:00
Mikhail R. Gadelha c10f611522 Moved RangedConstraintManager header to the StaticAnalyser include dir
Summary:
Moved `RangedConstraintManager` header from  `lib/StaticAnalyzer/Core/` to `clang/StaticAnalyzer/Core/PathSensitive/`. No changes to the code.

Reviewers: NoQ, george.karpenkov, dcoughlin

Reviewed By: george.karpenkov

Subscribers: NoQ, george.karpenkov, dcoughlin, ddcc

Differential Revision: https://reviews.llvm.org/D47640

llvm-svn: 333862
2018-06-04 00:23:01 +00:00
Vedant Kumar adbd27a599 [Debugify] Don't apply DI before the bitcode writer pass
Applying synthetic debug info before the bitcode writer pass has no
testing-related purpose. This commit prevents that from happening.

It also adds tests which check that IR produced with/without
-debugify-each enabled is identical after stripping. This makes it
possible to check that individual passes (or full pipelines) are
invariant to debug info.

llvm-svn: 333861
2018-06-04 00:11:49 +00:00
Vedant Kumar f0e4321c30 [opt] Add a -strip-module-flags option
The -strip-module-flags option strips llvm.module.flags metadata from a
module at the beginning of the opt pipeline.

This will be used to test whether the output of a pass is debug info
(DI) invariant.

E.g, after applying synthetic debug info to a test case, we'd like to
strip out all DI-related metadata and check that the final IR is
identical to a baseline file without any DI applied, to check that
optimizations aren't inhibited by debug info.

llvm-svn: 333860
2018-06-04 00:11:48 +00:00
Vedant Kumar 36b89d4456 Reformat overflowing lines, NFC
llvm-svn: 333859
2018-06-04 00:11:47 +00:00
Craig Topper 1359a46c48 [X86] Remove superfluous escaped new lines from intrinsic files.
llvm-svn: 333858
2018-06-03 23:31:01 +00:00
Craig Topper 9923eac358 [X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
llvm-svn: 333857
2018-06-03 23:24:17 +00:00
Vedant Kumar 77f4d4d8aa [Debugify] Skip dbg.value placement for EH pads, musttail
Placing meta-instructions into EH pads breaks certain IR invariants, as
does placing instructions after a musttail call.

llvm-svn: 333856
2018-06-03 22:50:22 +00:00
Craig Topper b41c6b854b [X86] Explicitly make the arguments to __slwpcb intrinsic 'void'.
This is the correct way to say it takes no arguments in C.

llvm-svn: 333855
2018-06-03 22:05:19 +00:00
Chris Bieneman 00d8c1abf0 Re-land: [MachO] Fixing ub in MachO BinaryFormat
This re-lands r333797 with a fix for big endian systems.

Original commit message:

This isn't encountered anywhere inside LLVM, so I wrote a test case to expose the issue and verify that it is fixed.

The basic problem is that the macho_load_command union contains all load comamnd structs. Load command structs in 32-bit macho files can be 32-bit aligned instead of 64-bit aligned.

There are some strange circumstances in which this can be exposed in a 64-bit macho if the load commands are invalid or if a 32-bit aligned load command is used. In the past we've worked around this type of problem with changes like r264232.

llvm-svn: 333854
2018-06-03 20:33:42 +00:00
Craig Topper 6fb26f93ef [X86] Replace __builtin_ia32_vbroadcastf128_pd256 and __builtin_ia32_vbroadcastf128_ps256 with an unaligned load intrinsics and a __builtin_shufflevector call.
llvm-svn: 333853
2018-06-03 19:42:59 +00:00
Lang Hames d6155ff002 [ORC] Add a constructor to create an IRMaterializationUnit from a module and
pre-existing SymbolFlags and SymbolToDefinition maps.

This constructor is useful when delegating work from an existing
IRMaterialiaztionUnit to a new one, as it avoids the cost of re-computing these
maps.

llvm-svn: 333852
2018-06-03 19:22:48 +00:00
Craig Topper f886b44693 [X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 builtin helper functions. NFC
llvm-svn: 333851
2018-06-03 19:02:57 +00:00
Craig Topper 8508c1db98 Revert r333848 "[X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 builtin helper functions. NFC"
Looks like I missed some changes to make this work.

llvm-svn: 333850
2018-06-03 18:41:22 +00:00
Simon Pilgrim 7c4446ce0c [X86][TBM] Use realistic BEXTR control bits
Avoid constant values that are guaranteed to give zero

Found while investigating BEXTR optimizations for PR34042.

llvm-svn: 333849
2018-06-03 18:15:06 +00:00
Craig Topper d4a610f6f7 [X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 builtin helper functions. NFC
llvm-svn: 333848
2018-06-03 18:08:37 +00:00
Craig Topper 21f56f5b9c [X86] When emitting masked loads/stores don't check for all ones mask.
This seems like a premature optimization. It's unlikely a user would pass something the frontend can tell is all ones to the masked load/store intrinsics.

We do this optimization for emitting select for masking because we have builtin calls in header files that pass an all ones mask in. Though at this point we may not longer have any builtins that emit some IR and a select. We may only have the select builtins so maybe we can remove that optimization too.

llvm-svn: 333847
2018-06-03 18:08:36 +00:00
Craig Topper 10229af755 [X86] Mark the pointer arguments to expandload builtins as const consistently.
Some of them had it and some didn't. This should make them consistent.

llvm-svn: 333846
2018-06-03 18:08:34 +00:00
Sanjay Patel 3bd957b7ae [InstCombine] improve sub with bool folds
There's a patchwork of existing transforms trying to handle
these cases, but as seen in the changed test, we weren't
catching them all.

llvm-svn: 333845
2018-06-03 16:35:26 +00:00
Alexander Polyakov cc92f5038e [lldb, lldm-mi] Fix hanging of -exec-run command.
Summary: -exec-run command hanged in case of invalid or dummy target.

Reviewers: aprantl, stella.stamenova

Reviewed By: aprantl

Subscribers: ki.stfu, llvm-commits, lldb-commits

Differential Revision: https://reviews.llvm.org/D47678

llvm-svn: 333844
2018-06-03 15:15:23 +00:00
Simon Pilgrim 1f60e2b41b [X86][AVX512] Cleanup intrinsics tests
Ensure we test on 32-bit and 64-bit targets, and strip -mcpu usage.

Part of ongoing work to ensure we test all intrinsic style tests on 32 and 64 bit targets where possible.

llvm-svn: 333843
2018-06-03 14:56:04 +00:00
Simon Pilgrim 7d717fed0b [X86][AVX512BW] Regenerate arithmetic tests using update_llc_test_checks.py script
Require manual stripping of existing CHECKs as update_llc_test_checks doesn't remove them if they're outside the function

llvm-svn: 333842
2018-06-03 14:31:30 +00:00
Simon Pilgrim e370ade180 [X86][BMI1] Test i32 intrinsics on 32/64 bits + branch off i64 tests
Further refactoring will wait until D47452 has landed.

Part of ongoing work to ensure we test all intrinsic style tests on 32 and 64 bit targets where possible.

llvm-svn: 333841
2018-06-03 14:11:34 +00:00
Simon Pilgrim 8dc43621ec [X86][BMI] Remove CTTZ tests - this is fully covered in clz.ll
llvm-svn: 333840
2018-06-03 13:55:17 +00:00
Simon Pilgrim d4ef869e28 [X86][TBM] Branch off i32 intrinsics and test on 32/64 bits
Part of ongoing work to ensure we test all intrinsic style tests on 32 and 64 bit targets where possible.

llvm-svn: 333839
2018-06-03 13:38:52 +00:00
Amaury Sechet 99909e9308 Remove SETCCE use from Lanai's backend
Summary: This creates a small perf regression, but after talking with Jacques Pienaar, he was good with it to get things moving toward removng SETCCE.

Reviewers: jpienaar, bryant

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47626

llvm-svn: 333838
2018-06-03 12:56:24 +00:00
Alexander Polyakov 2c5a424150 Test commit. Fix typo in comment.
llvm-svn: 333837
2018-06-03 12:41:00 +00:00
Fangrui Song 75ae73f346 clang-interpreter: Add missing LLVM component Object
llvm-svn: 333836
2018-06-03 08:12:15 +00:00
Lang Hames 353499fc95 [ORC] Use JITEvaluatedSymbol for IndirectStubsManager findStub and findPointer.
Existing implementations of these methods do not require lazy materialization,
and switching to JITEvaluatedSymbol allows us to remove error checking on the
client side.

llvm-svn: 333835
2018-06-03 02:18:03 +00:00
Simon Pilgrim 2b55e751ce [X86][SSE] Cleanup AVX1 intrinsics tests
Ensure we cover 32/64-bit targets for SSE/AVX/AVX512 cases as necessary, strip -mcpu usage.

llvm-svn: 333834
2018-06-02 21:35:48 +00:00
Simon Pilgrim 58ff2ecc4b [X86][SSE] Cleanup SSE1 intrinsics tests
Ensure we cover 32/64-bit targets for SSE/AVX/AVX512 cases as necessary

llvm-svn: 333833
2018-06-02 20:25:56 +00:00
Simon Pilgrim 8790844848 [X86][SSE] Cleanup SSE2 intrinsics tests
Ensure we cover 32/64-bit targets for SSE/AVX/AVX512 cases as necessary

llvm-svn: 333832
2018-06-02 19:43:14 +00:00
Simon Pilgrim 8c5b33a085 [X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
Ensure we cover 32/64-bit targets for SSE/AVX/AVX512 cases as necessary

llvm-svn: 333831
2018-06-02 18:41:46 +00:00
Simon Pilgrim 1c0fa05397 [X86][SSE4] Tweak rL333828 sse41/sse42 cleanup to recover SKX/EVEX2VEX testing
Just testing for avx512f was missing the tests for EVEX TO VEX Compression encoding etc.

llvm-svn: 333830
2018-06-02 18:01:09 +00:00