Huihui Zhang
b90cb57b63
[InstCombine] Simplify icmp ult/uge (shl %x, C2), C1 iff C1 is power of two -> icmp eq/ne (and %x, (lshr -C1, C2)), 0.
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Simplify 'shl' inequality test into 'and' equality test.
This pattern happens in the middle-end while simplifying bitfield access,
Exposed in https://reviews.llvm.org/D63505
https://rise4fun.com/Alive/6uz
Reviewers: lebedev.ri, efriedma
Reviewed By: lebedev.ri
Subscribers: spatel, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63675
llvm-svn: 364348
2019-06-25 20:44:52 +00:00
Huihui Zhang
4626613ffe
[InstCombine] Fold icmp eq/ne (and %x, C), 0 iff (-C) is power of two -> %x u</u>= (-C) earlier.
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Summary:
To generate simplified IR, make sure fold
(X & ~C) ==/!= 0 --> X u</u>= C+1
is scheduled before fold
((X << Y) & C) == 0 -> (X & (C >> Y)) == 0.
https://rise4fun.com/Alive/7ZN
Reviewers: lebedev.ri, efriedma, spatel, craig.topper
Reviewed By: lebedev.ri
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63505
llvm-svn: 364255
2019-06-25 00:09:10 +00:00
Huihui Zhang
94b4316096
[InstCombine] Regenerate test pr17827. NFCI.
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Prep work for upcoming patch D63505.
llvm-svn: 364224
2019-06-24 19:49:42 +00:00
Eric Christopher
cee313d288
Revert "Temporarily Revert "Add basic loop fusion pass.""
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The reversion apparently deleted the test/Transforms directory.
Will be re-reverting again.
llvm-svn: 358552
2019-04-17 04:52:47 +00:00
Eric Christopher
a863435128
Temporarily Revert "Add basic loop fusion pass."
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As it's causing some bot failures (and per request from kbarton).
This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda.
llvm-svn: 358546
2019-04-17 02:12:23 +00:00
Craig Topper
65dd32afbc
[InstCombine] Teach the code that pulls logical operators through constant shifts to handle vector splats too.
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llvm-svn: 310185
2017-08-05 20:00:42 +00:00
Sanjay Patel
3e1ae72fcf
[InstCombine] allow shl demanded bits folds with splat constants
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More fixes are needed to enable the helper SimplifyShrShlDemandedBits().
llvm-svn: 300898
2017-04-20 21:33:02 +00:00
Sanjay Patel
5f8451afad
[InstCombine] use m_APInt to allow ashr folds for vectors with splat constants
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llvm-svn: 292064
2017-01-15 16:38:19 +00:00
Sanjay Patel
58109abe91
[InstCombine] use m_APInt to allow icmp ult X, C folds for splat constant vectors
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llvm-svn: 281107
2016-09-09 21:59:37 +00:00
Sanjay Patel
9b40f98357
[InstCombine] use m_APInt to allow icmp (and (sh X, Y), C2), C1 folds for splat constant vectors
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llvm-svn: 280873
2016-09-07 22:33:03 +00:00
Sanjay Patel
d391b0d69e
[InstCombine] add tests for missing vector icmp folds
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llvm-svn: 278704
2016-08-15 18:26:56 +00:00
Sanjay Patel
66a3457a4c
[InstCombine] add test for missing vector icmp fold
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llvm-svn: 278630
2016-08-14 20:39:42 +00:00
Sanjay Patel
52958dc111
auto-generate checks
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llvm-svn: 278135
2016-08-09 16:59:54 +00:00
Kay Tiong Khoo
5389f74655
Conservative fix for PR17827 - don't optimize a shift + and + compare sequence where the shift is logical unless the comparison is unsigned
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llvm-svn: 196129
2013-12-02 18:43:59 +00:00