Commit Graph

421184 Commits

Author SHA1 Message Date
Michael Liao f9486f2139 [LoongArch] Fix shared build. NFC. 2022-04-15 00:21:28 -04:00
Fangrui Song 98c22f68e6 [PGO][test] Fix memop_size_opt.ll 2022-04-14 21:16:04 -07:00
Fangrui Song d324d6b5dc [PGO][test] Remove duplicate --pgo-instr-memop tests 2022-04-14 21:13:43 -07:00
wanglei 407b613d73 [LoongArch] Add support for selecting constant materializations.
Integer materializing can generate LU12I_W, ORI, LU32I_D, LU52I_D and
ADDI_W instructions.

According to the sign-extended behavior of these instructions
(except ORI), the generated instruction sequence can be improved.

For example, load -1 into general register:
The ADDI_W instruction performs the operation that the [31:0] bit data
in the general register `rj` plus the 12-bit immediate `simm12` sign
extension 32-bit data; the resultant [31:0] bit is sign extension, then
written into the general register `rd`.

Normal sequence:

```
lu12i.w $a0, -1
ori $a0, $a0, 2048
```

Improved with sign-extended instruction:

```
addi.w $a0, $zero,  -1
```

Reviewed By: SixWeining, MaskRay

Differential Revision: https://reviews.llvm.org/D123290
2022-04-15 12:04:35 +08:00
Thomas Raoux 59058c441a [mlir][vector] Add operations used for Vector distribution
Add vector op warp_execute_on_lane_0 that will be used to do incremental
vector distribution in order to target warp level vector programming for
architectures with GPU-like SIMT programming model.
The idea behing the op is discussed further on discourse:
https://discourse.llvm.org/t/vector-vector-distribution-large-vector-to-small-vector/1983/23

Differential Revision: https://reviews.llvm.org/D123703
2022-04-15 03:47:52 +00:00
Fangrui Song b5d884a38c [PGO][test] Change opt -foo tests to -passes= and remove duplicates 2022-04-14 20:35:35 -07:00
Jacques Pienaar 35bd41916b [mlir] Add assert to fail with more info (NFC)
This would have assert before during tensor type construction with
opaque error, assert and fail earlier now.
2022-04-14 19:54:12 -07:00
jacquesguan 1aa4f0bb6c [RISCV][VP] Add RVV codegen for vp.trunc.
Differential Revision: https://reviews.llvm.org/D123579
2022-04-15 02:29:53 +00:00
Michael Williamson f4cc757560 Add missing word in llc docs 2022-04-14 22:29:03 -04:00
Amir Ayupov 2a9386726b [BOLT][NFC] Use LLVM_REVISION instead of BOLT_VERSION_STRING
Remove duplicate version string identification

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D123549
2022-04-14 19:16:35 -07:00
jacquesguan 3d79c52f31 [mlir][LLVMIR] Add more vector predication intrinsic ops.
This revision adds vector predication select, merge and load/store intrinsic ops.

Differential Revision: https://reviews.llvm.org/D123477
2022-04-15 02:13:42 +00:00
Fangrui Song 0cefd53d6e [gcov][test] Change some legacy PM tests to new PM and remove others 2022-04-14 19:12:14 -07:00
Matt Arsenault a1303b23c9 clang/AMDGPU: Define macro for -munsafe-fp-atomics
The HIP headers want to use this to swap the implementation of the
function, rather than relying on backend expansion of the generic
atomic instruction.

Fixes: SWDEV-332998
2022-04-14 22:04:59 -04:00
Matt Arsenault 6d45558c1a Mips/GlobalISel: Add stub post-legalizer combiner
This enables no combines, just adds the boilerplate for the new pass.
2022-04-14 22:04:59 -04:00
Xiaodong Liu 2d9b7fdaa3 [utils] Use git to checkout code instead of svn in building docker image
Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D123795
2022-04-15 01:41:14 +00:00
Mehdi Amini ffdba713f5 Fix MLIR website generation 2022-04-15 01:28:30 +00:00
Matt Arsenault f163106f39 llvm-reduce: Handle cloning MachineFrameInfo and stack objects
This didn't work at all before, and would assert on any frame
index. Also copy the other fields, which I believe should cover
everything. There are a few that are untested since MIR serialization
is apparently still missing them (isStatepointSpillSlot,
ObjectSSPLayout, and ObjectSExt/ObjectZExt).
2022-04-14 21:25:06 -04:00
Peter Klausler 2503f28648 [flang] Accept TYPE(intrinsic type) in declarations only for non-extension type
To avoid clashing with names of user derived types, the redundant
syntax TYPE(intrinsic type spec) must be interpreted as a monomorphic
derived type when "intrinsic type spec" is a single word.  This
affects TYPE(BYTE) and TYPE(DOUBLECOMPLEX), but not TYPE(DOUBLE COMPLEX)
in free form source.

Differential Revision: https://reviews.llvm.org/D123724
2022-04-14 18:19:37 -07:00
Dhruva Chakrabarti 7086a1db80 [libomptarget] [amdgpu] Hostcall offset check should consider implicit args
Fixed hostcall offset check to compare against kernarg segment size
and implicit arguments. Improved the corresponding debug print.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D123827
2022-04-15 00:53:47 +00:00
Matt Arsenault e33b07f859 llvm-reduce: Inform MRI of used phys reg masks
I'm not sure how to directly observe this invisible cache for a test.
2022-04-14 20:52:05 -04:00
Matt Arsenault 3217ca0863 llvm-reduce: Copy register allocation hints to clone 2022-04-14 20:52:05 -04:00
Matt Arsenault df29ec2f54 AMDGPU: Select i8/i16 global and flat atomic load/store
As far as I know these should be atomic anyway, as long as the address
is aligned. Unaligned atomics hit an ugly error in AtomicExpand.
2022-04-14 20:52:05 -04:00
Peter Klausler 7c71ce97e7 [flang] Defer NAMELIST group item name resolution
Items in NAMELIST groups might be host-associated implicitly-typed
variables, but name resolution can't know that when the NAMELIST
appears in a specification part and the host's execution part has
not yet been analyzed.  So defer NAMELIST group item name resolution
to the end of the execution part.  This is safe because nothing
else in name resolution depends on whether a variable is in a
NAMELIST group or not.

Differential Revision: https://reviews.llvm.org/D123723
2022-04-14 17:50:03 -07:00
Matt Arsenault c528fbf882 AMDGPU: Fix assert if v_mov_b32_dpp is last instruction in the block
This can happen if the use instruction is a phi.

Fixes issue 49961
2022-04-14 20:21:22 -04:00
Matt Arsenault b4ace5da45 llvm-reduce: Fix asserting on undef virtual registers
This was only populating the virtual register map for def operands
that appeared in the function, but that may not exist if there are
only undef uses.
2022-04-14 20:21:22 -04:00
Matt Arsenault a0f9e4ed2a llvm-reduce: Fix handling of generic virtual registers
Try to preserve register banks, types and names. Fixes the lowest
hanging fruit in issue 54894.
2022-04-14 20:21:22 -04:00
Matt Arsenault 9196f5dab7 MachineCSE: Report this requires SSA 2022-04-14 20:21:21 -04:00
Matt Arsenault 6f3f19a36b llvm-reduce: Fix some copy-pasted comment errors 2022-04-14 20:21:21 -04:00
Matt Arsenault 4975c3a949 MachineFunction: Remove unused field 2022-04-14 20:21:18 -04:00
Jonas Devlieghere 1255e97348
Remove folder introduced by incorrect patch level 2022-04-14 16:59:56 -07:00
Peter Klausler 625dedc3fe [flang] Allow modification of construct entities
Construct entities from ASSOCIATE, SELECT TYPE, and SELECT RANK
are modifiable if the are associated with modifiable variables
without vector subscripts.  Update WhyNotModifiable() to accept
construct entities that are appropriate.

A need for more general error reporting from one overload of
WhyNotModifiable() caused its result type to change to
std::optional<parser::Message> instead of ::MessageFixedText,
and this change had some consequences that rippled through
call sites.

Some test results that didn't allow for modifiable construct
entities needed to be updated.

Differential Revision: https://reviews.llvm.org/D123722
2022-04-14 16:58:08 -07:00
Jonas Devlieghere af91446aa2
[lldb] Show the DBGError if dsymForUUID can't find a dSYM
Show the user the DBGError (if available) when dsymForUUID fails.

rdar://90949180

Differential revision: https://reviews.llvm.org/D123743
2022-04-14 16:54:00 -07:00
Thomas Raoux 894a591cf6 [mlir][nvgpu] Move mma.sync and ldmatrix in nvgpu dialect
Move gpu operation mma.sync and ldmatrix in nvgpu as they are specific
to nvidia target.

Differential Revision: https://reviews.llvm.org/D123824
2022-04-14 23:44:52 +00:00
Bill Wendling 8c77a75fb6 [randstruct] Add test for "-frandomize-layout-seed-file" flag
This test makes sure that the "-frandomize-layout-seed" and
"-frandomize-layout-seed-file" flags generate the same layout for the
record.

Reviewed By: aaron.ballman, MaskRay

Differential Revision: https://reviews.llvm.org/D123636
2022-04-14 16:35:41 -07:00
Jonas Devlieghere 03049c5125
Revert "[lldb] Pin the shared cache when iterating over its images"
This reverts commit af969141fa because it
didn't have the intended performance benefit to offset the increase in
our (virtual) memory usage.
2022-04-14 16:23:56 -07:00
Peter Klausler 142cbd500b [flang] Fix TYPE/CLASS IS (T(...)) in SELECT TYPE
TYPE IS and CLASS IS guards in SELECT TYPE constructs are
allowed to specify the same type as the type of the selector
but f18's implementation of that predicate required strict
equality of the derived type representations.  We need to
allow for assumed values of LEN type parameters to match
explicit and deferred type parameter values in the selector
and require equality for KIND type parameters.  Implement
DerivedTypeSpec::Match() to perform this more relaxed type
comparison, and use it in check-select-type.cpp.

Differential Revision: https://reviews.llvm.org/D123721
2022-04-14 16:20:37 -07:00
Bill Wendling 27dead3e3a Revert "[randstruct] Add test for "-frandomize-layout-seed-file" flag"
There's a test failure.

This reverts commit 31ea4798ad.
2022-04-14 16:07:00 -07:00
Mehdi Amini 72e2b4e7a7 Apply clang-tidy fixes for modernize-use-default-member-init in PDLLServer.cpp (NFC) 2022-04-14 22:59:14 +00:00
Mehdi Amini db6796dfa8 Apply clang-tidy fixes for modernize-use-default-member-init in SparseTensorUtils.cpp (NFC) 2022-04-14 22:59:14 +00:00
Peter Klausler 95199af4ae [flang] Local generics must not shadow host-associated generics
It is possible for generic interfaces of equivalent (but not necessarily
identical -- operator(.eq.) is equivalent to operator(==)) names to
be declared in a host scope and a nested scope, and the nested declaration
should function as an extension of the host's.

Differential Revision: https://reviews.llvm.org/D123719
2022-04-14 15:43:59 -07:00
Peter Klausler 8065e48218 [flang] Inner INTRINSIC must not shadow host generic
A generic interface (however spelled) can have the same name as
an intrinsic procedure in the same scope.  When an explicit INTRINSIC
attribute statement appears in a nested scope, semantics was
unconditionally declaring a new symbol that hid the generic entirely.
Catch this case and create instead a host association symbol for
the generic that can then be decorated with the INTRINSIC attribute.

Differential Revision: https://reviews.llvm.org/D123718
2022-04-14 15:42:44 -07:00
Bill Wendling 31ea4798ad [randstruct] Add test for "-frandomize-layout-seed-file" flag
This test makes sure that the "-frandomize-layout-seed" and
"-frandomize-layout-seed-file" flags generate the same layout for the
record.

Reviewed By: aaron.ballman, MaskRay

Differential Revision: https://reviews.llvm.org/D123636
2022-04-14 15:41:25 -07:00
Peter Klausler a68612a964 [flang][runtime] Preserve effect of positioning in record in non-advancing output
When formatted non-advancing output ends in a control edit descriptor
like nX or Tn or TRn that effectively extends the record, fill any
gap with explicit blanks at the completion of the WRITE.

Differential Revision: https://reviews.llvm.org/D123716
2022-04-14 15:33:15 -07:00
Peter Klausler 724709e09d [flang] Make F0.1 output editing of zero edge case consistent
The statement
  PRINT '(2F0.1)', 0.0, 0.5
should emit consistent ".0 .5" output, not "0.0 .5".

Differential Revision: https://reviews.llvm.org/D123715
2022-04-14 15:31:47 -07:00
Fangrui Song f20968e006 [Driver] Remove unneeded -f[no-]pascal-strings translation. NFC
They used to translate to -m[no-]pascal-strings.
This is unneeded after 28c96319c8 or some point in
2009 when -m[no-]pascal-strings became aliases for -f[no-]pascal-strings.
2022-04-14 15:20:58 -07:00
Bixia Zheng cb6f8d77a2 [mlir][sparse][taco] Use the SparseCompiler from python/tools.
Copy the implementation of SparseCompiler from python/tools to taco/tools until we have a common place to install it. Modify TACO to use this SparseCompiler for compilation and jitting.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D123696
2022-04-14 15:17:18 -07:00
Peter Klausler de026aeb8e [flang] Raise FP exceptions from runtime conversion to binary
Formatted READs of REAL should convert the exception flags from
the decimal-to-binary conversion library into real runtime FP
exceptions so that they at least show up in the termination message
of a STOP statement.

Differential Revision: https://reviews.llvm.org/D123714
2022-04-14 14:49:36 -07:00
Igor Chebykin eb156cb25e [NVPTX][tests] Do not run the test CodeGen/Generic/2010-11-04-BigByval.ll
NVPTX does not support the testcase llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
There are NVPTX specific testcases for byval args in the llvm/test/CodeGen/NVPTX
The test is marked as UNSUPPORTED for NVPTX due to unacceptable run time when using XFAIL

Differential Revision: https://reviews.llvm.org/D122939
2022-04-14 14:22:12 -07:00
Andrew Browne cddcf2170a [DFSan] Avoid replacing uses of functions in comparisions.
This can cause crashes by accidentally optimizing out checks for
extern_weak_func != nullptr, when replaced with a known-not-null wrapper.

This solution isn't perfect (only avoids replacement on specific patterns)
but should address common cases.

Internal reference: b/185245029

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D123701
2022-04-14 14:14:52 -07:00
Eli Friedman 6cf0b1b3da Comment out assertions about initializer size added in D123649.
They're causing failures in LLVM test-suite.  Added some regression
tests that explain the issue.
2022-04-14 13:58:17 -07:00