Commit Graph

64463 Commits

Author SHA1 Message Date
Reid Kleckner cd4a25d66e Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

llvm-svn: 192227
2013-10-08 20:15:11 +00:00
Reed Kotler 339c741046 Add fabsf to the list of inlined functions; otherwise
Mips16 will try and create a stub for it and this will
result in a link error because that function does not exist in libc.

llvm-svn: 192223
2013-10-08 19:55:01 +00:00
Manman Ren be5576f5f6 Add DbgVariable::resolve per Eric's suggestion.
llvm-svn: 192218
2013-10-08 19:07:44 +00:00
Manman Ren bda410f413 Debug Info: rename getOriginalTypeSize to getBaseTypeSize.
llvm-svn: 192216
2013-10-08 18:46:58 +00:00
Manman Ren 93b3090a91 Debug Info: take advantage of the existing CU::resolve.
llvm-svn: 192215
2013-10-08 18:42:58 +00:00
Akira Hatanaka ee909cc27f [mips] Simplify and optimize code.
No intended functionality change.

llvm-svn: 192213
2013-10-08 18:13:24 +00:00
Reed Kotler 97309af4f4 Let rotr and bswap be handled by expansion for Mips16 since we don't
have native instructions for this.

llvm-svn: 192207
2013-10-08 17:32:33 +00:00
Eric Christopher 016be42362 Grammar.
llvm-svn: 192199
2013-10-08 16:47:11 +00:00
Rafael Espindola 9ab9fe91fb Fix build on Solaris 11.
Patch by Vladimir Voskresensky. The erros were:

Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...

and

usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’

llvm-svn: 192185
2013-10-08 16:12:58 +00:00
Rafael Espindola a17151ad5a Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

llvm-svn: 192181
2013-10-08 13:08:17 +00:00
NAKAMURA Takumi c22f85331c SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
llvm-svn: 192179
2013-10-08 10:29:09 +00:00
NAKAMURA Takumi 2949f670d5 Prune trailing linefeeds.
llvm-svn: 192178
2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju 2ea4c2880c [Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
2013-10-08 07:15:22 +00:00
Craig Topper a984729f8a Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.
llvm-svn: 192175
2013-10-08 06:30:39 +00:00
Craig Topper 72c8cd7bc3 Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
llvm-svn: 192171
2013-10-08 05:53:50 +00:00
Venkatraman Govindaraju 8223c553cf [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
llvm-svn: 192160
2013-10-08 02:50:29 +00:00
David Majnemer f07777c80b Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.

llvm-svn: 192137
2013-10-07 21:57:07 +00:00
Arnold Schwaighofer 0caddfc731 LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

llvm-svn: 192133
2013-10-07 21:05:43 +00:00
Reed Kotler 445d0adc24 Add Mips16 patterns for sign extend byte and sign extend halfword.
llvm-svn: 192130
2013-10-07 20:46:19 +00:00
Manman Ren 5a78755336 Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402

llvm-svn: 192126
2013-10-07 19:47:53 +00:00
Akira Hatanaka 4c0a71223a [mips] Coding style clean up.
llvm-svn: 192125
2013-10-07 19:33:02 +00:00
Akira Hatanaka 3c0d6afeec [mips] Disable tail merging when long branch pass is enabled.
llvm-svn: 192124
2013-10-07 19:13:53 +00:00
Benjamin Kramer 7b5e159450 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

llvm-svn: 192123
2013-10-07 19:11:35 +00:00
Akira Hatanaka a8a05be7d6 [mips] Define method MipsSubtarget::enableLongBranchPass.
llvm-svn: 192122
2013-10-07 19:06:57 +00:00
Alexey Samsonov a1944e6d26 Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
llvm-svn: 192121
2013-10-07 19:03:24 +00:00
Akira Hatanaka 16048332f1 [mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.

llvm-svn: 192119
2013-10-07 18:49:46 +00:00
Richard Mitton 0aafb58aca Formally added an explicit enum for DWARF TLS support. No functionality change.
llvm-svn: 192118
2013-10-07 18:39:18 +00:00
Matt Arsenault fbcbce439d Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

llvm-svn: 192117
2013-10-07 18:06:48 +00:00
Amara Emerson 5035ee0212 [ARM] Improve build attributes emission.
llvm-svn: 192111
2013-10-07 16:55:23 +00:00
Chad Rosier b6ceeb9126 [AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.

llvm-svn: 192107
2013-10-07 16:36:15 +00:00
NAKAMURA Takumi c59b1cae49 Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero.
llvm-svn: 192103
2013-10-07 15:33:30 +00:00
Rafael Espindola 7ef22b84c8 Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

llvm-svn: 192101
2013-10-07 13:54:50 +00:00
Rafael Espindola e90fd9c5e0 Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.

llvm-svn: 192099
2013-10-07 13:39:22 +00:00
Rafael Espindola 41d630f448 Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.

llvm-svn: 192098
2013-10-07 13:34:05 +00:00
Tim Northover f86d1f0b77 ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

llvm-svn: 192097
2013-10-07 11:10:47 +00:00
David Majnemer 17a44966be Windows: Be more explicit with Win32 APIs
This addresses several issues in a similar vein:
 - Use the Unicode APIs when possible, running nm on clang shows that we
   only use Unicode APIs except for FormatMessage, CreateSemaphore, and
   GetModuleHandle.  AFAICT, the latter two are coming from MinGW and
   not LLVM itself.
 - Make getMainExecutable more resilient.  It previously considered
   return values of zero from ::GetModuleFileNameA to be acceptable.

llvm-svn: 192096
2013-10-07 09:52:36 +00:00
Craig Topper 07ad1b23bb Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
llvm-svn: 192090
2013-10-07 07:19:47 +00:00
Craig Topper 68d2546ec6 Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere.
llvm-svn: 192089
2013-10-07 06:10:45 +00:00
Craig Topper a0e0735e6a Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.

llvm-svn: 192088
2013-10-07 05:42:48 +00:00
Craig Topper 2658d89728 Add disassembler support for long encodings for INC/DEC in 32-bit mode.
llvm-svn: 192086
2013-10-07 04:28:06 +00:00
David Majnemer 61eae2e30c Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.

llvm-svn: 192079
2013-10-07 01:00:07 +00:00
Craig Topper a7afa71494 Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.
llvm-svn: 192078
2013-10-06 22:38:19 +00:00
David Majnemer f636cf422e Revert "Windows: Add support for unicode command lines"
This is causing MinGW bots to fail.
This reverts commit r192069.

llvm-svn: 192070
2013-10-06 20:44:34 +00:00
David Majnemer 80bea0c315 Windows: Add support for unicode command lines
Summary:
The MSVCRT deliberately sends main() code-page specific characters.
This isn't too useful to LLVM as we end up converting the arguments to
UTF-16 and subsequently attempt to use the result as, for example, a
file name.  Instead, we need to have the ability to access the Unicode
command line and transform it to UTF-8.

This has the distinct advantage over using the MSVC-specific wmain()
function as our entry point because:
 - It doesn't work on cygwin.
 - It only work on MinGW with caveats and only then on certain versions.
 - We get to keep our entry point as main(). :)

N.B.  This patch includes fixes to other parts of lib/Support/Windows
s.t. we would be able to take advantage of getting the Unicode paths.
E.G.  clang spawning clang -cc1 would want to give it Unicode arguments.

Reviewers: aaron.ballman, Bigcheese, rnk, ruiu

Reviewed By: rnk

CC: llvm-commits, ygao

Differential Revision: http://llvm-reviews.chandlerc.com/D1834

llvm-svn: 192069
2013-10-06 20:25:49 +00:00
Rafael Espindola 78527050c2 Add support for aliases with linkonce_odr.
This will be used to extend constructor aliases in clang.

llvm-svn: 192066
2013-10-06 15:10:43 +00:00
Benjamin Kramer 858a3880d6 X86: Don't fold spills into SSE operations if the stack is unaligned.
Regalloc can emit unaligned spills nowadays, but we can't fold the
spills into SSE ops if we can't guarantee alignment. PR12250.

llvm-svn: 192064
2013-10-06 13:48:22 +00:00
Elena Demikhovsky 2e408aefe0 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.

llvm-svn: 192063
2013-10-06 13:11:09 +00:00
Venkatraman Govindaraju f482d3d338 [Sparc] Do not emit nop after fcmp* instruction with V9.
llvm-svn: 192056
2013-10-06 07:06:44 +00:00
Elena Demikhovsky 462a2d235b AVX-512: fixed shuffle lowering
in case of BLEND and added VSHUFPS patterns.

llvm-svn: 192055
2013-10-06 06:11:18 +00:00
Venkatraman Govindaraju 572d5057e3 [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.

llvm-svn: 192054
2013-10-06 03:36:18 +00:00