Commit Graph

264640 Commits

Author SHA1 Message Date
Vedant Kumar f7e804157e [ubsan] Fix a faulty memory accessibility check
The dynamic type check needs to inspect vtables, but could crash if it
encounters a vtable pointer to inaccessible memory. In the first attempt
to fix the issue (r304437), we performed a memory accessibility check on
the wrong range of memory. This should *really* fix the problem.

Patch by Max Moroz!

Differential Revision: https://reviews.llvm.org/D34215

llvm-svn: 305489
2017-06-15 18:23:16 +00:00
Benjamin Kramer 00a970a84b Fold variable into assert.
Silences an unused variable warning in Release builds.

llvm-svn: 305488
2017-06-15 17:58:24 +00:00
Craig Topper 6eec9e21a5 [InstCombine] Handle (iszero(A & K1) | iszero(A & K2)) -> (A & (K1 | K2)) != (K1 | K2) when the one of the Ands is commuted relative to the other
Currently we expect A to be on the same side in both Ands but nothing guarantees that.

While there also switch to using matchers for some of the code.

Differential Revision: https://reviews.llvm.org/D34230

llvm-svn: 305487
2017-06-15 17:55:20 +00:00
Peter Collingbourne 7e85b26549 Silence warning with assertions disabled.
llvm-svn: 305485
2017-06-15 17:41:32 +00:00
Arnold Schwaighofer ae9312c487 ISel: Fix FastISel of swifterror values
The code assumed that we process instructions in basic block order.  FastISel
processes instructions in reverse basic block order. We need to pre-assign
virtual registers before selecting otherwise we get def-use relationships wrong.

This only affects code with swifterror registers.

rdar://32659327

llvm-svn: 305484
2017-06-15 17:34:42 +00:00
Craig Topper 6ec5a63073 [BasicAA] Add test case that goes with r305481.
Forgot to 'git add' the file.

llvm-svn: 305483
2017-06-15 17:27:56 +00:00
Peter Collingbourne dbd2fed6a1 Apply summary-based dead stripping to regular LTO modules with summaries.
If a regular LTO module has a summary index, then instead of linking
it into the combined regular LTO module right away, add it to the
combined summary index and associate it with a special module that
represents the combined regular LTO module.

Any such modules are linked during LTO::run(), at which time we use
the results of summary-based dead stripping to control whether to
link prevailing symbols.

Differential Revision: https://reviews.llvm.org/D33922

llvm-svn: 305482
2017-06-15 17:26:13 +00:00
Craig Topper 587525468d [BasicAA] Don't call isKnownNonEqual if we might be have gone through a PHINode.
This is a fix for the test case in PR32314.

Basic Alias Analysis can ask if two nodes are known non-equal after looking through a phi node to find a GEP. isAddOfNonZero saw an add of a constant from the same phi and said that its output couldn't be equal. But Basic Alias Analysis was really asking about the value from the previous loop iteration.

This patch at least makes that case not happen anymore, I'm not sure if there were still other ways this can fail. As was discussed in the bug, it looks like fixing BasicAA would be difficult so this patch seemed like a possible workaround

Differential Revision: https://reviews.llvm.org/D33136

llvm-svn: 305481
2017-06-15 17:16:56 +00:00
Dominic Chen f94c108395 [analyzer]: Improve test handling with multiple constraint managers
Summary: Modify the test infrastructure to properly handle tests that require z3, and merge together the output of all tests on success. This is required for D28954.

Reviewers: dcoughlin, zaks.anna, NoQ, xazax.hun

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33308

llvm-svn: 305480
2017-06-15 17:05:07 +00:00
Hiroshi Inoue 7a08bb1458 [PowerPC] fix potential verification errors on CFENCE8
This patch fixes a potential verification error (64-bit register operands for cmpw) with -verify-machineinstrs.

Differential Revision: https://reviews.llvm.org/D34208

llvm-svn: 305479
2017-06-15 16:51:28 +00:00
Simon Dardis 24ca9da2de [mips] Fix documentation of member variable. NFCI.
llvm-svn: 305478
2017-06-15 16:28:28 +00:00
Nirav Dave 9d79cade42 [DAG] As StoreMerge now generates only legal nodes remove unecessary guard when run post-legalization NFCI.
llvm-svn: 305477
2017-06-15 16:27:49 +00:00
Simon Pilgrim 07cfc80186 Remove trailing whitespace. NFCI.
llvm-svn: 305476
2017-06-15 16:20:27 +00:00
Teresa Johnson d72f51c113 [Doc] Document prof metadata in LangRef
Summary:
Points to existing documentation for branch_weights and
function_entry_count, and adds an example for VP value profile metadata.

Reviewers: davidxl, reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34218

llvm-svn: 305475
2017-06-15 15:57:12 +00:00
Sanjay Patel 4749669583 [InstCombine] auto-generate complete checks; NFC
llvm-svn: 305474
2017-06-15 15:13:19 +00:00
Nirav Dave be2674a598 [DAG] Defer Pre/Post IndexStore merge to after mergestore. NFCI.
In preparation for doing storemerge post-legalization, reorder
visitSTORE passes to move pre/post-index combining after store
merge. Reordered passes other than store merge are unaffected.

llvm-svn: 305473
2017-06-15 15:05:48 +00:00
Simon Pilgrim 4d432b2c6b [X86][AVX2] Fix issue in lowerV8I16GeneralSingleInputVectorShuffle that was assuming v8i16 vectors
We can use this with v16i16/v32i16 as well.

Found during fuzz testing.

llvm-svn: 305472
2017-06-15 14:52:30 +00:00
Nirav Dave 85e92223b4 [AArch64] Add indexed check to splitStores. NFC.
Add explicit check for unhandled cases in preparation for delaying
splitStores to post-legalization.

llvm-svn: 305471
2017-06-15 14:47:44 +00:00
Simon Pilgrim b98cb3808c Revert r305465: [X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift left+right instructions).
This is causing windows buildbot failures

llvm-svn: 305470
2017-06-15 14:39:34 +00:00
Marshall Clow 3ebdbb5c80 Add missing include to __bsd_locale_fallbacks.h. Fixes https://bugs.llvm.org/show_bug.cgi?id=33370
llvm-svn: 305469
2017-06-15 14:31:11 +00:00
Nirav Dave 9464c72850 [DAG] Allow truncated and extend memory operations in Store Merge. NFCI.
As all store merges checks are based on the memory operation
performed, allow use of truncated stores and extended loads as valid
input candidates for merging.

llvm-svn: 305468
2017-06-15 14:04:07 +00:00
Nirav Dave 6a41822ba7 [DAG] Make MergeStores generate legalized stores. NFCI.
Realized merged stores as truncstores if store will be realized as
such by legalization.

llvm-svn: 305467
2017-06-15 13:34:54 +00:00
Nirav Dave 9a4998980d [DAG] Use correct size for truncated store merge of load. NFCI.
Avoid non-legal memory ops by checking correct size when merging
stores of loads into a extload-truncstore pair.

llvm-svn: 305466
2017-06-15 13:28:06 +00:00
Ayman Musa 56912cda71 [X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift left+right instructions).
AVX512 compare instructions return v*i1 types.
In cases where the number of elements in the returned value are less than 8, clang adds zeroes to get a mask of v8i1 type.
Later on it's replaced with CONCAT_VECTORS, which then is lowered to many DAG nodes including insert/extract element and shift right/left nodes.
The fact that AVX512 compare instructions put the result in a k register and zeroes all its upper bits allows us to remove the extra nodes simply by copying the result to the required register class.

When lowering, identify these cases and transform them into an INSERT_SUBVECTOR node (marked legal), then catch this pattern in instructions selection phase and transform it into one avx512 cmp instruction.

Differential Revision: https://reviews.llvm.org/D33188

llvm-svn: 305465
2017-06-15 13:02:37 +00:00
Siddharth Bhat c705003275 [Docs] Add a catch-all file to document workflow & tricks.
- Write about `bugpoint` and `git-svn` for now.

Differential Revision: https://reviews.llvm.org/D34147

llvm-svn: 305464
2017-06-15 12:43:12 +00:00
Max Kazantsev dc80366d52 [ScalarEvolution] Apply Depth limit to getMulExpr
This is a fix for PR33292 that shows a case of extremely long compilation
of a single .c file with clang, with most time spent within SCEV.

We have a mechanism of limiting recursion depth for getAddExpr to avoid
long analysis in SCEV. However, there are calls from getAddExpr to getMulExpr
and back that do not propagate the info about depth. As result of this, a chain

  getAddExpr -> ... .> getAddExpr -> getMulExpr -> getAddExpr -> ... -> getAddExpr

can be extremely long, with every segment of getAddExpr's being up to max depth long.
This leads either to long compilation or crash by stack overflow. We face this situation while
analyzing big SCEVs in the test of PR33292.

This patch applies the same limit on max expression depth for getAddExpr and getMulExpr.

Differential Revision: https://reviews.llvm.org/D33984

llvm-svn: 305463
2017-06-15 11:48:21 +00:00
Pavel Labath 3adc40876e Add llvm::Error assignment operator to Status class
This enables writing "status = std::move(some_llvm_error)".

llvm-svn: 305462
2017-06-15 11:23:26 +00:00
Pavel Labath 054243f75a [swig] Improve the native module import logic
The simple module import logic was not sufficient for our distribution
model of lldb, which is without the _lldb.pyd file (normally that would
be a symlink to the shared library, but symlinks are not really a thing
on windows).

With the older swigs it worked (loading of the python scripting
machinery from within lldb) because the normal swig import logic
contained a last-ditch import of a global module _lldb (which is defined
when you run python from lldb). Add back the last-ditch import to our
custom import logic as well.

llvm-svn: 305461
2017-06-15 11:23:22 +00:00
Vassil Vassilev a91cbdc60f Revert "Load lazily the template specialization in multi-module setups."
This broke our libcxx modules builds.

llvm-svn: 305460
2017-06-15 11:05:32 +00:00
Diana Picus 02e11010b2 [ARM] GlobalISel: Add support for i32 modulo
Add support for modulo for targets that have hardware division and for
those that don't. When hardware division is not available, we have to
choose the correct libcall to use. This is generally straightforward,
except for AEABI.

The AEABI variant is trickier than the other libcalls because it
returns { quotient, remainder }, instead of just one value like the
other libcalls that we've seen so far. Therefore, we need to use custom
lowering for it. However, we don't want to have too much special code,
so we refactor the target-independent code in the legalizer by adding a
helper for replacing an instruction with a libcall. This helper is used
by the legalizer itself when dealing with simple calls, and also by the
custom ARM legalization for the more complicated AEABI divmod calls.

llvm-svn: 305459
2017-06-15 10:53:31 +00:00
Diana Picus 8fd1601d32 [ARM] GlobalISel: Lower only homogeneous struct args
Lowering mixed struct args, params and returns used G_INSERT, which is a
bit more convoluted to support through the entire pipeline. Since they
don't occur that often in practice, it's probably wiser to leave them
out until later.

Meanwhile, we can lower homogeneous structs using G_MERGE_VALUES, which
has good support in the legalizer. These occur e.g. as the return of
__aeabi_idivmod, so it's nice to be able to support them.

llvm-svn: 305458
2017-06-15 09:42:02 +00:00
Florian Hahn 0a26d2c298 [AArch64] Enable FeatureFuseAES for the generic processor model.
Summary:
Scheduling AESE/AESMC and AESD/AESIMC instruction pairs back-to-back
gives a double digit speedup on benchmarks using those instructions on
Cortex-A processors. In GCC, this optimization is part of the generic
processor model as well.

This change should not have a major performance impact on processors
that do not optimize AES instruction pairs, although I only had access
to Cortex-A processors for benchmarking.


Reviewers: rengolin, kristof.beyls, javed.absar, evandro, silviu.baranga, MatzeB, mcrosier, joelkevinjones, joel_k_jones, bmakam, t.p.northover

Reviewed By: evandro

Subscribers: sbaranga, aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D33836

llvm-svn: 305457
2017-06-15 09:31:23 +00:00
Daniel Jasper d078254049 Revert "Define _GNU_SOURCE for rtems c++"
This reverts commit r305399.

This breaks a build in libcxx:
libcxx/src/system_error.cpp:90:16: error: assigning to 'int' from incompatible type 'char *'
    if ((ret = ::strerror_r(ev, buffer, strerror_buff_size)) != 0) {
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Which makes sense according to:
https://linux.die.net/man/3/strerror_r

Not entirely sure how this needs to be fixed.

llvm-svn: 305456
2017-06-15 09:17:12 +00:00
Zoran Jovanovic d9299293ad [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
ADDIU instruction is transformed into 16-bit instruction ADDIUSP
ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP
Differential Revision: https://reviews.llvm.org/D33887

llvm-svn: 305455
2017-06-15 09:14:33 +00:00
Krasimir Georgiev a1de3c91e5 [clangd] Add priority to completion item sort text
Summary:
This patch adds the priority of a completion item to the sort text of the
returned LSP result.

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D34137

llvm-svn: 305454
2017-06-15 09:11:57 +00:00
Marshall Clow 9a102b0924 Renamed some of the newly added tests. No functional change
llvm-svn: 305453
2017-06-15 05:44:49 +00:00
Petr Hosek 40f2866a67 [ELF] Mark symbols referenced from linker script as live
This is necessary to ensure that sections containing symbols referenced
from linker scripts (e.g. in data commands) don't get GC'd.

Differential Revision: https://reviews.llvm.org/D34195

llvm-svn: 305452
2017-06-15 05:34:31 +00:00
Eric Fiselier b4f962cdcc attempt to fix GCC ToT build failures
llvm-svn: 305451
2017-06-15 03:50:02 +00:00
Eric Fiselier 1571faea62 Correct documentation about the AfterClass clang-format option
llvm-svn: 305450
2017-06-15 03:38:08 +00:00
Zachary Turner 6b3517ce1b [formatv] Add the ability to specify a fill character when aligning.
Previously if you used fmt_align(7, Center) you would get the
output '   7   '.  It may be desirable for the user to specify
the fill character though, for example producing '---7---'.  This
patch adds that.

llvm-svn: 305449
2017-06-15 03:06:38 +00:00
Eric Fiselier 968eea2c11 Fix another test with modules enabled
llvm-svn: 305448
2017-06-15 03:03:45 +00:00
Eric Fiselier 40eaecc35e remove incorrectly committed assertion
llvm-svn: 305447
2017-06-15 03:02:43 +00:00
Eric Fiselier 1d2274d9a6 Add hack to get --param=enable_modules=true working with a __config_site header
llvm-svn: 305446
2017-06-15 02:54:15 +00:00
Eric Fiselier c6cce07882 Fix test when modules are enabled
llvm-svn: 305445
2017-06-15 02:54:12 +00:00
Leslie Zhai 49ba795d15 [ELF] Initial migration of AVR target
Reviewers: ruiu, rafael, grimar, atanasyan, psmith, dylanmckay

Reviewed By: ruiu, rafael, grimar, dylanmckay

Differential Revision: https://reviews.llvm.org/D32991

llvm-svn: 305444
2017-06-15 02:27:50 +00:00
Eric Fiselier 6af1b7d95c Move external instantiation for __vector_base_common to vector.cpp
Previously the explicit instantiation for this was in locale.cpp,
but that didn't make much sense. This patch creates a new vector.cpp
source file to contain the explicit instantiation.

llvm-svn: 305442
2017-06-15 01:53:12 +00:00
Jason Molenda 244b6bb6cb Change how LocateDSYMInVincinityOfExecutable strips off path
components to not depend on "." characters in the fileanme
(e.g. "Foundation.framework") but instead to just use path
separators.  The names of the files themselves may have dots
in them ("com.apple.sbd") which would break the old scheme.

Also add a test case for this (macosx/find-dsym/bundle-with-dot-in-filename)
as well as a test case for r304520 (macosx/find-dsym/deep-bundle)
which needed a similar setup to test correctly on a single machine.
(both of these are really testing remote debug session situations
where the binary can't be found on the system where lldb is running,
complicating the test case a bit.)

<rdar://problem/31825940> 

llvm-svn: 305441
2017-06-15 01:42:48 +00:00
Richard Trieu d9201d0a02 [ODRHash] Hash TemplateArgument::Pack and TemplateTypeParmType
llvm-svn: 305440
2017-06-15 01:35:06 +00:00
Craig Topper 210a787f29 [Basic] Use a static_assert instead of using the old array of size -1 trick.
llvm-svn: 305439
2017-06-15 01:27:58 +00:00
Craig Topper 6ea89f2497 [InstCombine] Add a test case to show a case where don't handle a partially commuted IR. NFC
llvm-svn: 305438
2017-06-15 01:01:01 +00:00