maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
23,329 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

23329 Commits

Author SHA1 Message Date
Chris Lattner f7b6e7212f rename these nodes 
llvm-svn: 26848
 2006-03-19 01:13:28 +00:00
Chris Lattner f4e1a53647 Rename ConstantVec -> BUILD_VECTOR and VConstant -> VBUILD_VECTOR. Allow*BUILD_VECTOR to take variable inputs. 
llvm-svn: 26847
 2006-03-19 00:52:58 +00:00
Chris Lattner 122b3accb6 Rename ConstantVec -> BUILD_VECTOR and VConstant -> VBUILD_VECTOR. Allow 
*BUILD_VECTOR to take variable inputs.

llvm-svn: 26846
 2006-03-19 00:52:25 +00:00
Chris Lattner c16b05e67d implement vector.ll:test_undef 
llvm-svn: 26845
 2006-03-19 00:20:20 +00:00
Chris Lattner a982c7ee87 Add three new testcases 
llvm-svn: 26844
 2006-03-19 00:20:03 +00:00
Chris Lattner 93640543a9 Fix the remaining bugs in the vector expansion rework I commited yesterday. 
This fixes CodeGen/Generic/vector.ll

llvm-svn: 26843
 2006-03-19 00:07:49 +00:00
Chris Lattner 544dab3a35 update testcases for x86 fastcc changes. 
llvm-svn: 26842
 2006-03-18 23:48:54 +00:00
Evan Cheng c28282bd87 - Fixed a bogus if condition. 
- Added more debugging info.
- Allow reuse of IV of negative stride. e.g. -4 stride == 2 * iv of -2 stride.

llvm-svn: 26841
 2006-03-18 08:03:12 +00:00
Chris Lattner 32206f54c6 Change the structure of lowering vector stuff. Note: This breaks some 
things.

llvm-svn: 26840
 2006-03-18 01:44:44 +00:00
Chris Lattner a956760359 Update comments. 
llvm-svn: 26839
 2006-03-18 01:43:28 +00:00
Evan Cheng 9bf978dc20 Use the generic vector register classes VR64 / VR128 rather than V4F32, 
V8I16, etc.

llvm-svn: 26838
 2006-03-18 01:23:20 +00:00
Evan Cheng f09f0ebd48 Sort StrideOrder so we can process the smallest strides first. This allows 
for more IV reuses.

llvm-svn: 26837
 2006-03-18 00:44:49 +00:00
Chris Lattner f878f6aa54 Fix miscodegen of V_SET0 in PPC. 
llvm-svn: 26836
 2006-03-18 00:40:36 +00:00
Nate Begeman 21f87d0e4c Fix subfic to match subc by default instead of sub so that it is correctly 
cost-modeled as producing a flag.  This fixes the test I just added for neg

llvm-svn: 26835
 2006-03-17 22:41:37 +00:00
Nate Begeman 41767dd142 Add a missing testcase 
llvm-svn: 26834
 2006-03-17 22:39:45 +00:00
Evan Cheng b09a56f3a4 Darwin should use _setjmp/_longjmp instead of setjmp/longjmp. 
llvm-svn: 26833
 2006-03-17 20:31:41 +00:00
Chris Lattner da2b6ee1d6 new testcase 
llvm-svn: 26832
 2006-03-17 20:04:40 +00:00
Evan Cheng 4f674921d6 Move some pattern fragments to the right files. 
llvm-svn: 26831
 2006-03-17 19:55:52 +00:00
Chris Lattner 98931bc381 add a couple enum values 
llvm-svn: 26830
 2006-03-17 19:53:59 +00:00
Chris Lattner 783ea16fe4 add a couple of enum values 
llvm-svn: 26829
 2006-03-17 19:53:41 +00:00
Evan Cheng 4520698820 Allow users of iv / stride to be rewritten with expression that is a multiply 
of a smaller stride even if they have a common loop invariant expression part.

llvm-svn: 26828
 2006-03-17 19:52:23 +00:00
Evan Cheng e28ad7eaf1 Add a lsr common loop invariant hoisting test case 
llvm-svn: 26827
 2006-03-17 19:45:54 +00:00
Chris Lattner 8aa2b66653 new testcase that broke the new f.e. 
llvm-svn: 26826
 2006-03-17 18:01:17 +00:00
Reid Spencer d1453ef454 Use the <tt> tag instead of <pre> tag to get code/file/warning lists to 
wrap but also still be in a fixed-width font.

llvm-svn: 26825
 2006-03-17 17:43:01 +00:00
Chris Lattner 388fc4d9fb Disable x86 fastcc from passing args in registers 
llvm-svn: 26824
 2006-03-17 17:27:47 +00:00
Reid Spencer dca24a1f02 Fix a typo. 
llvm-svn: 26823
 2006-03-17 08:04:25 +00:00
Reid Spencer 779c10818c Fix use of LEVEL. 
llvm-svn: 26822
 2006-03-17 07:39:44 +00:00
Reid Spencer ee4b4f55ee Two fixes: 
1. Allow building of Intrinsics.gen to work for srcdir != objdir
2. Add a rule for installation of Intrinsics.gen.

llvm-svn: 26819
 2006-03-17 06:27:06 +00:00
Chris Lattner 43798850f9 Parameterize the number of integer arguments to pass in registers 
llvm-svn: 26818
 2006-03-17 05:10:20 +00:00
Evan Cheng bfc2e97383 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. 
llvm-svn: 26817
 2006-03-17 02:36:22 +00:00
Evan Cheng aca7915b70 Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. 
ADD32ri8.

llvm-svn: 26816
 2006-03-17 02:25:01 +00:00
Evan Cheng 27750f3287 - Nuke 16-bit SBB instructions. We'll never use them. 
- Nuke a bogus comment.

llvm-svn: 26815
 2006-03-17 02:24:04 +00:00
Nate Begeman bb01d4f272 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Chris Lattner 8bf1c59e7f remove dead variable 
llvm-svn: 26813
 2006-03-16 23:52:08 +00:00
Chris Lattner 56ee4ea22f add an assert to get a slightly better msg about this problem 
llvm-svn: 26812
 2006-03-16 23:16:17 +00:00
Chris Lattner 7ececaad83 Fix a problem fully scalarizing values. 
llvm-svn: 26811
 2006-03-16 23:05:19 +00:00
Evan Cheng c11fcceec5 A new entry. 
llvm-svn: 26810
 2006-03-16 22:44:22 +00:00
Nate Begeman fb0e36fa56 Notes on how to kill the eeevil brtwoway, and make ppc branch selector 
more target independant, generate better code, and be less conservative.

llvm-svn: 26809
 2006-03-16 22:37:48 +00:00
Chris Lattner 1e6dfa4c1f Strangely, calls clobber call-clobbered vector regs. Whodathoughtit? 
llvm-svn: 26808
 2006-03-16 22:35:59 +00:00
Chris Lattner 325bb46315 add a note 
llvm-svn: 26807
 2006-03-16 22:25:55 +00:00
Chris Lattner 91400bd413 teach the ppc backend how to spill/reload vector regs 
llvm-svn: 26806
 2006-03-16 22:24:02 +00:00
Chris Lattner 6e90062416 add callee saved vector regs 
llvm-svn: 26805
 2006-03-16 22:07:06 +00:00
Evan Cheng f75555feb9 Bug fix: condition inverted. 
llvm-svn: 26804
 2006-03-16 22:02:48 +00:00
Evan Cheng 3df447d354 For each loop, keep track of all the IV expressions inserted indexed by 
stride. For a set of uses of the IV of a stride which is a multiple
of another stride, do not insert a new IV expression. Rather, reuse the
previous IV and rewrite the uses as uses of IV expression multiplied by
the factor.

e.g.
x = 0 ...; x ++
y = 0 ...; y += 4
then use of y can be rewritten as use of 4*x for x86.

llvm-svn: 26803
 2006-03-16 21:53:05 +00:00
Evan Cheng 20931a798e Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.

llvm-svn: 26802
 2006-03-16 21:47:42 +00:00
Chris Lattner 0b27047a6c in functions that use a lot of callee saved regs, this can be more than 
5 instructions away.

llvm-svn: 26801
 2006-03-16 21:31:45 +00:00
Chris Lattner fd9f3e8ed3 Add support for copying registers. still needed: spilling and reloading them 
llvm-svn: 26800
 2006-03-16 20:03:58 +00:00
Chris Lattner 8471b15706 Add support for CopyFromReg from vector values. Note: this doesn't support 
illegal vector types yet!

llvm-svn: 26799
 2006-03-16 19:57:50 +00:00
Chris Lattner 49409cb925 Teach CreateRegForValue how to handle vector types. 
llvm-svn: 26798
 2006-03-16 19:51:18 +00:00
Chris Lattner ad74844bfa set TransformToType correctly for vector types. 
llvm-svn: 26797
 2006-03-16 19:50:01 +00:00