6677bb4e50
[AVX-512] Teach LowerFormalArguments to use the extended register class when available. Fix the avx512vl stack folding tests to clobber more registers or otherwise they use xmm16 after this change.
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llvm-svn: 287971
2016-11-26 07:20:57 +00:00
39265bb1ce
[AVX-512] Add VLX versions of VDIVPD/PS and VMULPD/PS to load folding tables.
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llvm-svn: 287970
2016-11-26 07:20:53 +00:00
e30cb00dc0
[AVX-512] Add subvector insert and extract to load/store folding tables.
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llvm-svn: 283689
2016-10-09 03:54:13 +00:00
50a468e03f
[AVX-512] Add avx512dq to the fp stack folding test.
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llvm-svn: 283688
2016-10-09 03:54:09 +00:00
abe80cc04d
[AVX-512] Promote AND/OR/XOR to v2i64/v4i64/v8i64 even when we have AVX512F/AVX512VL.
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Previously we weren't creating masked logical operations if bitcasts appeared between the logic operation and the select. The IR optimizers can move bitcasts across logic operations and create these cases. To minimize the number of cases we need to handle, this change promotes all logic ops to an i64 vector type just like when only SSE or AVX is available.
Unfortunately, this also has the consequence of making it difficult to select unmasked VPANDD/VPORD/VPXORD in all the cases it was previously used. This is the cause of most of the test change. This shouldn't result in any functional change though.
llvm-svn: 279929
2016-08-28 06:06:28 +00:00
4891c724aa
[AVX-512] Add load folding for EVEX vcmpps/pd/ss/sd.
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llvm-svn: 279912
2016-08-27 05:22:08 +00:00
2c51c74d52
[AVX-512] Add 512-bit logical operations to load folding tables. Add avx512f stack folding test and move some tests from the avx512vl test.
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llvm-svn: 277961
2016-08-07 17:14:09 +00:00
938e7ab9e1
[AVX-512] Add EVEX encoded floating point MAX/MIN instructions to the load folding tables.
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llvm-svn: 277960
2016-08-07 17:14:05 +00:00
2c1f6706de
[AVX-512] Add andnps/andnpd to the avx512vl stack folding test.
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llvm-svn: 277948
2016-08-07 05:39:48 +00:00
749a111f1e
[AVX-512] Teach X86InstrInfo::getLargestLegalSuperClass to inflate to FR32X/FR64X if AVX512 is supported and VR128X/VR256X if VLX is supported.
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Had to update a stack folding test to clobber the other 16 registers since this now made them get used instead of spilling.
llvm-svn: 277321
2016-08-01 05:31:50 +00:00
9161e4ec22
[AVX512] Replace scalar fp arithmetic intrinsics with native IR in an AVX512 test. The intrinsics aren't lowered to AVX512 instructions.
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The intrinsics really should be removed and autoupgraded.
llvm-svn: 277320
2016-08-01 04:29:16 +00:00
00d34ed64f
[AVX-512] Don't let ExeDependencyFix pass convert VPANDD/Q to VPANDPS/PD unless DQI instructions are supported. Same for ANDN, OR, and XOR.
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Thanks to Igor Breger for pointing out my mistake.
llvm-svn: 277292
2016-07-31 17:15:07 +00:00
f4151bea72
[AVX512] Add initial support for the Execution Domain fixing pass to change some EVEX instructions.
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llvm-svn: 276393
2016-07-22 05:00:52 +00:00
0b90756b0a
[AVX512] Add load folding for some AVX512VL logic and arithmetic instructions.
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llvm-svn: 276391
2016-07-22 05:00:39 +00:00
ab13b33ded
[AVX512] Update X86InstrInfo::foldMemoryOperandCustom to handle the EVEX encoded instructions too.
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llvm-svn: 276390
2016-07-22 05:00:35 +00:00
a3c55f5915
[AVX512] Add EVEX versions of scalar ADD/SUB/MUL/DIV to load folding tables.
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llvm-svn: 275775
2016-07-18 06:49:32 +00:00
Craig Topper