Commit Graph

356922 Commits

Author SHA1 Message Date
Adam Balogh 53298b8c8d [Analyzer] Remove warning caused by commit `rG98db1f990fc2` 2020-06-09 15:40:42 +02:00
James Henderson 3b7ec64d59 [DebugInfo] Fix printing of unrecognised standard opcodes
The verbose printing of unrecognised standard opcodes was broken in
multiple ways (additional blank lines, a closing parenthesis without
opening parenthesis and so on). This patch fixes it, and makes the
output more consistent with other opcodes.
2020-06-09 14:32:20 +01:00
James Henderson e3547ade68 [DebugInfo] Improve new line printing in debug line verbose output
The new line printing for debug line verbose output was inconsistent.
For new rows in the matrix, a blank line followed, whilst the
DW_LNS_copy opcode actually resulted in two blank lines. There was also
potential inconsistency in the blank lines at the end of the table. This
patch mostly resolves these issues - no blank lines appear in the output
except for a single line after the prologue and at table end to separate
it from any subsquent table, plus some instances after error messages.

Also add a unit test for verbose output to test the fine details of new
line placement and other aspects of verbose output.

Reviewed by: dblaikie

Differential Revision: https://reviews.llvm.org/D81102
2020-06-09 14:27:16 +01:00
James Henderson dbd26fe0b6 [DebugInfo] Print non-verbose output at some point as verbose output
Verbose and non-verbose parsing of .debug_line produced their output at
different points in the program. The most obvious impact of this was
that error messages were produced at different times, but it also
potentially reduced what clients could do by customising the stream or
warning/error handlers.

This change makes the two variants consistent by printing non-verbose
output inline, the same as verbose output.

Testing of the error messages has been modified to check the messages
always appear in the same location to illustrate the behaviour.

Reviewed by: JDevlieghere, dblaikie, MaskRay, labath

Differential Revision: https://reviews.llvm.org/D80989
2020-06-09 14:24:53 +01:00
Simon Pilgrim a375463ad0 Fix Wdocumentation warning. NFC.
The raw unsigned Opc value has been replaced with the ShuffleVectorPseudo MatchInfo wrapper struct.
2020-06-09 13:53:39 +01:00
James Henderson 6378167409 [DebugInfo] Remove unnecessary flushes and add additional testing
The flushes previously existed to help ensure consistent error message
output when stdout and stderr were passed to the same location. This is
no longer necessary as errs() is now tied to outs().

Reviewed by: dblaikie, MaskRay, JDevlieghere, labath

Differential Revision: https://reviews.llvm.org/D80803
2020-06-09 13:50:58 +01:00
Alexey Bataev cb9191c042 [OPENMP]Improve code readability, NFC.
Reuse existing function instead of code duplication and use better type.
2020-06-09 08:50:36 -04:00
Adam Balogh e22ace8ba2 [Analyzer] Fix buildbot failure caused by commit `rG813734dad7e8b526c39806d1a88820b1f0706fb1` 2020-06-09 14:50:27 +02:00
Kristof Beyls 7e6f891df8 Fix race condition in llvm/test/MC/AArch64/mov-expr* tests
... that were introduced in
https://reviews.llvm.org/rG0e1accd0f726eef2c47be9f37dd0a06cb50d207e
2020-06-09 13:25:09 +01:00
serge-sans-paille 5b08bd0eb4 Fix MemCpyOptimizer return status
Differential Revision: https://reviews.llvm.org/D81229
2020-06-09 14:24:33 +02:00
serge-sans-paille ef1a7f2f01 Update pass status for GCOVProfiling
Take fork/exec instrumentation into account.

Differential Revision: https://reviews.llvm.org/D81227
2020-06-09 14:23:30 +02:00
Kazushi (Jam) Marukawa b641c9f729 [VE] Support rest of load/store instructions in MC layer
Summary:
Add DLD/DLDU/DLDL/PFCH/TS1AM/TS2AM/TS3AM/ATMAM/CAS instructions newly.
Add regression tests for them to asmparser, mccodeemitter, and disassembler.
In order to add those instructions, change asmparser to support UImm0to2 and
UImm1 operands, add new decode functions to disassembler, and add new print
functions to instprinter.

Differential Revision: https://reviews.llvm.org/D81454
2020-06-09 14:21:00 +02:00
Kirill Bobyrev 348364bffd
[clangd] Don't produce snippets when completion location is followed by parenthesis
Summary:
Prevent a second pair of parenthesis from being added when there already is one
right after cursor.

Related issue and more context: https://github.com/clangd/clangd/issues/387

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81380
2020-06-09 13:59:29 +02:00
James Henderson 1ce831912c [Support] Add stream tie function and use it for errs()
errs() is now tied to outs() so that if something prints to errs(),
outs() will be flushed before the printing occurs. This avoids
interleaving output between the two and is consistent with standard cout
and cerr behaviour.

Reviewed by: labath, JDevlieghere, MaskRay

Differential Revision: https://reviews.llvm.org/D81156
2020-06-09 12:51:02 +01:00
Jan Kratochvil 4515d35f5c [lldb] Fix DW_TAG_GNU_call_site-DW_AT_low_pc as produced by GCC
D80519 <https://reviews.llvm.org/D80519>
added support for `DW_TAG_GNU_call_site` but
Bug 45886 <https://bugs.llvm.org/show_bug.cgi?id=45886>
found one case did not work.

There is:

  0x000000b1:     DW_TAG_GNU_call_site
                    DW_AT_low_pc  (0x000000000040111e)
                    DW_AT_abstract_origin (0x000000cc "a")
  ...
  0x000000cc:   DW_TAG_subprogram
                  DW_AT_name      ("a")
                  DW_AT_prototyped        (true)
                  DW_AT_low_pc    (0x0000000000401109)
                  ^^^^^^^^^^^^ - here it did overwrite the 'low_pc' variable containing value 0x40111e we wanted
                  DW_AT_high_pc   (0x0000000000401114)
                  DW_AT_frame_base        (DW_OP_call_frame_cfa)
                  DW_AT_GNU_all_call_sites        (true)

DW_TAG_GNU_call_site attributes order as produced by GCC:
0x000000b1:     DW_TAG_GNU_call_site
                  DW_AT_low_pc  (0x000000000040111e)
                  DW_AT_abstract_origin (0x000000cc "a")

clang produces the attributes in opposite order:
0x00000064:     DW_TAG_GNU_call_site
                  DW_AT_abstract_origin (0x0000002a "a")
                  DW_AT_low_pc  (0x0000000000401146)

Differential Revision: https://reviews.llvm.org/D81334
2020-06-09 13:41:41 +02:00
Jan Kratochvil fd31e60b8d [nfc] [lldb] Reduce GetAttributes's depth parameter usage
Clean the code up a bit for D81334.

Differential Revision: https://reviews.llvm.org/D81423
2020-06-09 13:41:06 +02:00
Kadir Cetinkaya 0cd4d47cfe
[clang][StaticAnalyzer] Fix unused variable warning for debug builds 2020-06-09 13:35:41 +02:00
David Green c755157de9 [ARM] Add some MVE vecreduce tests. NFC 2020-06-09 12:07:19 +01:00
Simon Pilgrim 11baa6ff09 [X86][SSE] Add PTEST test cases for PR45378 2020-06-09 11:54:51 +01:00
Simon Pilgrim 70d77b5f8b Magic.h - reduce includes to forward declarations. NFC. 2020-06-09 11:54:51 +01:00
Xing GUO e4344e1466 [DWARFYAML][debug_ranges] Emit an error message for invalid offset.
This patch helps make yaml2obj emit an error message when we try to assign an invalid offset to the entry of the 'debug_ranges' section.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D81357
2020-06-09 18:53:38 +08:00
Sam McCall 658af94350 [clangd] Parse std::make_unique, and emit template diagnostics at expansion.
Summary:
Parsing std::make_unique is an exception to the usual non-parsing of function
bodies in the preamble. (A hook is added to PreambleCallbacks to allow this).
This allows us to diagnose make_unique<Foo>(wrong arg list), and opens the door
to providing signature help (by detecting where the arg list is forwarded to).
This function is trivial (checked libc++ and libstdc++) and doesn't result in
any extra templates being instantiated, so this should be cheap.

This uncovered a second issue (already visible with class templates)...

Errors produced by template instantiation have primary locations within the
template, with instantiation stack reported as notes.
For templates defined in headers, these end up reported at the #include
directive, which isn't terribly helpful as the header itself is probably fine.
This patch reports them at the instantiation site (the first location in the
instantiation stack that's in the main file). This in turn required a bit of
refactoring in Diagnostics so we can delay relocating the diagnostic until all
notes are available.

https://github.com/clangd/clangd/issues/412

Reviewers: hokein, aaron.ballman

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81351
2020-06-09 12:47:27 +02:00
Guillaume Chatelet 800e100588 Revert "[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess"
This reverts commit f21c52667e.
2020-06-09 10:43:59 +00:00
Simon Wallis 4dba59689d [ARM] prologue instructions emitted for naked function with >64 byte argument
Summary:

The naked function attribute is meant to suppress all function
prologue/epilogue instructions.

On ARM, some are still emitted if an argument greater than 64 bytes in size
(the threshold for using the byval attribute in IR) is passed partially
in registers.

Perform the check for Attribute::Naked and early exit in
SelectionDAGISel::LowerArguments().

Checking in ARMFrameLowering::determineCalleeSaves() is too late.

A test case is included.

Reviewers: llvm-commits, olista01, danielkiss

Reviewed By: danielkiss

Subscribers: kristof.beyls, hiraditya, danielkiss

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80715

Change-Id: Icedecf2a4ad31bc3c35ab0df7489a9d346e1f7cc
2020-06-09 11:33:03 +01:00
Guillaume Chatelet 3b6196c9b3 [Alignment][NFC] TargetLowering::allowsMisalignedMemoryAccesses
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMisalignedMemoryAccesses` without marking it override.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81374
2020-06-09 10:17:42 +00:00
Guillaume Chatelet f21c52667e [Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMemoryAccess` without marking it override.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81379
2020-06-09 10:11:07 +00:00
Adam Balogh 5419a31215 [Analyzer] Allow creation of stack frame for functions without definition
Retrieving the parameter location of functions was disabled because it
may causes crashes due to the fact that functions may have multiple
declarations and without definition it is difficult to ensure that
always the same declration is used. Now parameters are stored in
`ParamRegions` which are independent of the declaration of the function,
therefore the same parameters always have the same regions,
independently of the function declaration used actually. This allows us
to remove the limitation described above.

Differential Revision: https://reviews.llvm.org/D80286
2020-06-09 12:08:57 +02:00
Adam Balogh 98db1f990f [Analyzer] [NFC] Parameter Regions
Currently, parameters of functions without their definition present cannot
be represented as regions because it would be difficult to ensure that the
same declaration is used in every case. To overcome this, we split
`VarRegion` to two subclasses: `NonParamVarRegion` and `ParamVarRegion`.
The latter does not store the `Decl` of the parameter variable. Instead it
stores the index of the parameter which enables retrieving the actual
`Decl` every time using the function declaration of the stack frame. To
achieve this we also removed storing of `Decl` from `DeclRegion` and made
`getDecl()` pure virtual. The individual `Decl`s are stored in the
appropriate subclasses, such as `FieldRegion`, `ObjCIvarRegion` and the
newly introduced `NonParamVarRegion`.

Differential Revision: https://reviews.llvm.org/D80522
2020-06-09 12:08:56 +02:00
Adam Balogh 813734dad7 [Analyzer] Add `getReturnValueUnderConstruction()` to `CallEvent`
Checkers should be able to get the return value under construction for a
`CallEvenet`. This patch adds a function to achieve this which retrieves
the return value from the construction context of the call.

Differential Revision: https://reviews.llvm.org/D80366
2020-06-09 12:08:56 +02:00
Pavel Labath 17798c60bc [lldb] Fix -Wmissing-field-initializers in StackFrameList
The code is correct without these default values, but it is freaking the
compiler out.
2020-06-09 11:58:08 +02:00
Abbas Sabra 29353e69d2 [analyzer] LoopWidening: fix crash by avoiding aliased references invalidation
Summary: LoopWidening is invalidating references coming from type
aliases which lead to a crash.

Patch by Abbas Sabra!

Differential Revision: https://reviews.llvm.org/D80669
2020-06-09 12:55:54 +03:00
Jonathan Coe 7117066bd6 [clang-format] Brace breaking for C# lambdas
Reviewers: krasimir, MyDeveloperDay

Reviewed By: krasimir

Subscribers: cfe-commits

Tags: #clang-format, #clang

Differential Revision: https://reviews.llvm.org/D81394
2020-06-09 10:20:01 +01:00
Florian Hahn 3323a628ec [Matrix] Add __builtin_matrix_transpose to Clang.
This patch add __builtin_matrix_transpose to Clang, as described in
clang/docs/MatrixTypes.rst.

Reviewers: rjmccall, jfb, rsmith, Bigcheese

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D72778
2020-06-09 10:14:37 +01:00
Cullen Rhodes 91855483f3 [AArch64][AsmParser] Fix debug output in a few instructions
Summary:
In the parsing of BTIHint, PSBHint and Prefetch the identifier token
should be lexed after creating the operand, otherwise the StringRef is
moved before being copied and the debug output is incorrect.

Prefetch example:

    $ echo "prfm   pldl1keep, [x2]" | ./bin/llvm-mc \
        -triple aarch64-none-linux-gnu -show-encoding -debug

    Before:

      Matching formal operand class MCK_Prefetch against actual operand at
      index 1 (<prfop ,>): match success using generic matcher

    After:

      Matching formal operand class MCK_Prefetch against actual operand at
      index 1 (<prfop pldl1keep>): match success using generic matcher

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D80620
2020-06-09 09:02:59 +00:00
James Henderson 5777570d24 [DebugInfo] Check for errors when reading data for extended opcode
Previously, if an extended opcode was truncated, it would manifest as an
"unexpected line op length error" which wasn't quite accurate. This
change checks for errors any time data is read whilst parsing an
extended opcode, and reports any errors detected.

Reviewed by: MaskRay, labath, aprantl

Differential Revision: https://reviews.llvm.org/D80797
2020-06-09 09:56:37 +01:00
Guillaume Chatelet e26ed6bdae Fix unused variable warning 2020-06-09 08:56:05 +00:00
Cullen Rhodes b82be5db71 [AArch64][SVE] Implement structured load intrinsics
Summary:
This patch adds initial support for the following instrinsics:

    * llvm.aarch64.sve.ld2
    * llvm.aarch64.sve.ld3
    * llvm.aarch64.sve.ld4

For loading two, three and four vectors worth of data. Basic codegen is
implemented with reg+reg and reg+imm addressing modes being addressed
in a later patch.

The types returned by these intrinsics have a number of elements that is a
multiple of the elements in a 128-bit vector for a given type and N, where N is
the number of vectors being loaded, i.e. 2, 3 or 4. Thus, for 32-bit elements
the types are:

    LD2 : <vscale x 8 x i32>
    LD3 : <vscale x 12 x i32>
    LD4 : <vscale x 16 x i32>

This is implemented with target-specific intrinsics for each variant that take
the same operands as the IR intrinsic but return N values, where the type of
each value is a full vector, i.e. <vscale x 4 x i32> in the above example.
These values are then concatenated using the standard concat_vector intrinsic
to maintain type legality with the IR.

These intrinsics are intended for use in the Arm C Language
Extension (ACLE).

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D75751
2020-06-09 08:51:58 +00:00
Kazushi (Jam) Marukawa e9eafb7be9 [VE] Support Transfer Control Instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
transfer control instructions.  Add FENCEI/FENCEM/FENCEC/SVOB instructions
also.  Add new instruction format to represent FENCE* instructions too.

Differential Revision: https://reviews.llvm.org/D81440
2020-06-09 10:41:42 +02:00
hsmahesha 40a632a335 [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size
Summary:
Make use of both the - (1) clustered bytes and (2) cluster length, to decide on
the max number of mem ops that can be clustered. On an average, when loads
are dword or smaller, consider `5` as max threshold, otherwise `4`. This heuristic
is purely based on different experimentation conducted, and there is no analytical
logic here.

Reviewers: foad, rampitec, arsenm, vpykhtin

Reviewed By: foad, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, Anastasia, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81085
2020-06-09 14:09:14 +05:30
Kazushi (Jam) Marukawa 0d989cb6ab [VE] Support lowering to NND instruction
Summary:
Support NND instruction of Aurora VE.  Add hasAndNot function also
for optimization.

Differential Revision: https://reviews.llvm.org/D81383
2020-06-09 10:18:14 +02:00
Simon Wallis 0645c4d34f [AVR][test] Remove test for naked function containing a return.
Summary:
Remove an old test for an explicit return in a naked function from test/CodeGen/AVR/return.ll

clang no longer allows a C return in a naked function.

This test is causing failure of the patch https://reviews.llvm.org/D80715

Reviewers: llvm-commits, dylanmckay

Reviewed By: dylanmckay

Subscribers: Jim

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81099

Change-Id: Id218027e520247ae480b92e7801a660fbe0cf29b
2020-06-09 09:06:47 +01:00
Guillaume Chatelet 49dd8e7991 [Alignment] Fix deprecation message 2020-06-09 08:05:13 +00:00
Sameer Sahasrabuddhe d8f651d3e8 [AMDGPU] Enable structurizer workarounds by default
Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D81211
2020-06-09 13:14:15 +05:30
Kang Zhang 1b6602275d [MachineVerifier] Add TiedOpsRewritten flag to fix verify two-address error
Summary:
Currently, MachineVerifier will attempt to verify that tied operands
satisfy register constraints as soon as the function is no longer in
SSA form. However, PHIElimination will take the function out of SSA
form while TwoAddressInstructionPass will actually rewrite tied operands
to match the constraints. PHIElimination runs first in the pipeline.
Therefore, whenever the MachineVerifier is run after PHIElimination,
it will encounter verification errors on any tied operands.

This patch adds a function property called TiedOpsRewritten that will be
set by TwoAddressInstructionPass and will control when the verifier checks
tied operands.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D80538
2020-06-09 07:39:42 +00:00
Kristof Beyls 09d098506b [AArch64] Fix branch, terminator, etc properties for BRA* instructions.
Tests relying on some of these fixes will be added for this in follow-on
patches that introduce new features that require these properties to be
correct.

Differential Revision: https://reviews.llvm.org/D81399
2020-06-09 08:19:41 +01:00
David Sherwood cc8872400c [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments
In two instances of CreateStackTemporary we are sometimes promoting
alignments beyond the stack alignment. I have introduced a new function
called getReducedAlign that will return the alignment for the broken
down parts of illegal vector types. For example, on NEON a <32 x i8>
type is made up of two <16 x i8> types - in this case the sensible
alignment is 16 bytes, not 32.

In the legalization code wherever we create stack temporaries I have
started using the reduced alignments instead for illegal vector types.

I added a test to

  CodeGen/AArch64/build-one-lane.ll

that tries to insert an element into an illegal fixed vector type
that involves creating a temporary stack object.

Differential Revision: https://reviews.llvm.org/D80370
2020-06-09 08:10:17 +01:00
Sam Parker 37289615c0 [NFCI][CostModel] Unify getCmpSelInstrCost
Add cases for icmp, fcmp and select into the switch statement of the
generic getUserCost implementation with getInstructionThroughput then
calling into it. The BasicTTI and backend implementations have be set
to return a default value (1) when a cost other than throughput is
being queried.

Differential Revision: https://reviews.llvm.org/D80550
2020-06-09 07:41:22 +01:00
David Sherwood 30dfbf03a2 [CodeGen,AArch64] Fix up warnings in splitStores
The code for trying to split up stores is designed for NEON vectors,
where we support arbitrary alignments. It's an optimisation designed
to improve performance by using smaller, aligned stores. However,
we currently only support 16 byte alignments for SVE vectors anyway
so we may as well bail out early.

This change fixes up remaining warnings in a couple of tests:

  CodeGen/AArch64/sve-callbyref-notailcall.ll
  CodeGen/AArch64/sve-calling-convention-byref.ll

Differential Revision: https://reviews.llvm.org/D80720
2020-06-09 07:39:38 +01:00
Stanislav Mekhanoshin 295d1fe733 [AMDGPU] Custom lowering of i64 umulo/smulo
Differential Revision: https://reviews.llvm.org/D81430
2020-06-08 23:14:19 -07:00
Craig Topper bc2b70982b [X86] Autogenerate complete checks and add encoding information. NFC
I think we're using an inefficient CMP encoding for absolute
symbols that would fit in an 8-bit value. This is a pattern
priority issue in isel.
2020-06-08 22:27:20 -07:00