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2273 Commits

Author SHA1 Message Date
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Jeff Cohen 57a004abfe Fix VC++ warning. 
llvm-svn: 25957
 2006-02-04 03:27:39 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Chris Lattner 65ad53feb3 Initial early support for non-register operands, like immediates 
llvm-svn: 25952
 2006-02-04 02:16:44 +00:00
Chris Lattner c93403a7fb Handle another case exposed on X86. 
llvm-svn: 25949
 2006-02-03 23:50:46 +00:00
Chris Lattner 71d20c4e18 Fix a nasty problem on two-address machines in the following situation: 
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
 2006-02-03 23:28:46 +00:00
Chris Lattner 507a3a7bd1 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable 
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
 2006-02-03 23:13:58 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits. 
llvm-svn: 25945
 2006-02-03 22:24:05 +00:00
Chris Lattner f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
llvm-svn: 25941
 2006-02-03 20:13:59 +00:00
Chris Lattner 6091407783 remove dead fn 
llvm-svn: 25935
 2006-02-03 06:51:34 +00:00
Nate Begeman 22e251abf1 Add common code for reassociating ops in the dag combiner 
llvm-svn: 25934
 2006-02-03 06:46:56 +00:00
Jeff Cohen 3276ff7ac6 Fix VC++ compilation error caused by using a std::map iterator variable to receive 
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
 2006-02-03 03:48:54 +00:00
Chris Lattner e18ef0d4a6 Remove move copies and dead stuff by not clobbering the result reg of a noop copy. 
llvm-svn: 25926
 2006-02-03 03:16:14 +00:00
Chris Lattner 774d4a190b Simplify some code 
llvm-svn: 25924
 2006-02-03 03:06:49 +00:00
Chris Lattner 1ef239afb4 Add code that checks for noop copies, which triggers when either: 
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
 2006-02-03 02:02:59 +00:00
Evan Cheng 02b5b9cdd6 Added case HANDLENODE to getOperationName(). 
llvm-svn: 25920
 2006-02-03 01:33:01 +00:00
Chris Lattner b7f24de4c8 Physregs may hold multiple stack slot values at the same time. Keep track 
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
 2006-02-03 00:36:31 +00:00
Chris Lattner f3aef1b004 Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
 2006-02-02 23:29:36 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner 49beaf40fc Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
 2006-02-02 07:17:31 +00:00
Chris Lattner 49ce35542f add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
 2006-02-02 06:36:13 +00:00
Chris Lattner 0bd74558ae make -debug output less newliney 
llvm-svn: 25895
 2006-02-02 00:38:08 +00:00
Chris Lattner 7f5880b1c7 Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
 2006-02-02 00:25:23 +00:00
Chris Lattner aa23fa9f43 Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886
 2006-02-01 22:41:11 +00:00
Nate Begeman 01bd9d9911 *** empty log message *** 
llvm-svn: 25879
 2006-02-01 19:05:15 +00:00
Chris Lattner 1558fc64f9 Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
 2006-02-01 18:59:47 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner 3a5ed55187 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
llvm-svn: 25865
 2006-02-01 01:28:23 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Evan Cheng 2443ab932d Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.

llvm-svn: 25852
 2006-01-31 18:14:25 +00:00
Chris Lattner e9721b2984 Only insert an AND when converting from BR_COND to BRCC if needed. 
llvm-svn: 25832
 2006-01-31 05:04:52 +00:00
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner 57ecb561c6 Print the most trivial inline asms. 
llvm-svn: 25822
 2006-01-30 23:00:08 +00:00
Chris Lattner f263a23735 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
 2006-01-30 22:43:50 +00:00
Chris Lattner d6f5ae4455 don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.

llvm-svn: 25804
 2006-01-30 04:22:28 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner 3b40e64aa3 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, 
to permit recursion

llvm-svn: 25799
 2006-01-30 03:49:37 +00:00
Chris Lattner 4d1ea71a31 Fix RET of promoted values on targets that custom expand RET to a target node. 
llvm-svn: 25794
 2006-01-29 21:02:23 +00:00
Chris Lattner 2c748afd6c cleanups to the ValueTypeActions interface 
llvm-svn: 25785
 2006-01-29 08:42:06 +00:00
Chris Lattner ccb4476c87 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands 
instead.

llvm-svn: 25780
 2006-01-29 07:58:15 +00:00
Chris Lattner 2f292789dc Allow custom expansion of ConstantVec nodes. PPC will use this in the future. 
llvm-svn: 25774
 2006-01-29 06:34:16 +00:00
Chris Lattner 758b0ac54b Legalize ConstantFP into TargetConstantFP when the target allows. Implement 
custom expansion of ConstantFP nodes.

llvm-svn: 25772
 2006-01-29 06:26:56 +00:00
Chris Lattner 678da98835 eliminate uses of SelectionDAG::getBR2Way_CC 
llvm-svn: 25767
 2006-01-29 06:00:45 +00:00
Chris Lattner d02b05473c Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it 
faster.  This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).

It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change.  Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.

This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.

llvm-svn: 25746
 2006-01-28 10:58:55 +00:00
Chris Lattner 580b12ad34 add another method variant 
llvm-svn: 25744
 2006-01-28 10:09:25 +00:00
Chris Lattner f34156e8cb add some methods for updating nodes 
llvm-svn: 25742
 2006-01-28 09:32:45 +00:00
Chris Lattner eb63751499 minor tweaks 
llvm-svn: 25740
 2006-01-28 08:31:04 +00:00
Chris Lattner 689bdcc9cf move a bunch of code, no other change. 
llvm-svn: 25739
 2006-01-28 08:25:58 +00:00
Chris Lattner fcfda5a174 remove a couple more now-extraneous legalizeop's 
llvm-svn: 25738
 2006-01-28 08:22:56 +00:00
Chris Lattner 364b89a784 fix a bug 
llvm-svn: 25737
 2006-01-28 07:42:08 +00:00
Chris Lattner 9dcce6da8e Several major changes: 
1. Pull out the expand cases for BSWAP and CT* into a separate function,
   reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
   iterative.  It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.

llvm-svn: 25736
 2006-01-28 07:39:30 +00:00
Chris Lattner fd4a7f76a9 Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already 
relegalizes the stuff it returns.

Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.

Fix some obscure potential bugs and simplify code.

llvm-svn: 25732
 2006-01-28 05:07:51 +00:00
Chris Lattner 10f677508f Instead of making callers of ExpandLibCall legalize the result, make 
ExpandLibCall do it itself.

llvm-svn: 25731
 2006-01-28 04:28:26 +00:00
Chris Lattner a593acfe66 Eliminate the need to do another iteration of the legalizer after inserting 
a libcall.

llvm-svn: 25730
 2006-01-28 04:23:12 +00:00
Chris Lattner 98ed05c81d remove method I just added 
llvm-svn: 25728
 2006-01-28 03:43:09 +00:00
Chris Lattner 43b867dd3b add a new callback 
llvm-svn: 25727
 2006-01-28 03:37:03 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Nate Begeman af397cec0b Add a missing case to the dag combiner. 
llvm-svn: 25723
 2006-01-28 01:06:30 +00:00
Chris Lattner fb16a62fba Remove the ISD::CALL and ISD::TAILCALL nodes 
llvm-svn: 25721
 2006-01-28 00:18:58 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Jim Laskey 0cda006a69 Using bit size of integers instead of ambiguous "long" et all. 
llvm-svn: 25694
 2006-01-27 20:31:25 +00:00
Jim Laskey 4a84e97421 Sorry - really folowing convention. 
llvm-svn: 25691
 2006-01-27 18:32:41 +00:00
Jim Laskey 116bb15473 Following convention. 
llvm-svn: 25689
 2006-01-27 18:28:31 +00:00
Andrew Lenharth fc3eca9023 fix build 
llvm-svn: 25687
 2006-01-27 18:16:17 +00:00
Chris Lattner ecd7e61a1f Fix build error that is apparently only a warning with some compilers. 
llvm-svn: 25686
 2006-01-27 17:31:30 +00:00
Jim Laskey 2b6efa9d41 Forgot the version number. 
llvm-svn: 25685
 2006-01-27 15:46:54 +00:00
Jim Laskey f98fc8441c Improve visibility/correctness of operand indices in "llvm.db" objects. 
Handle 64 in DIEs.

llvm-svn: 25684
 2006-01-27 15:20:54 +00:00
Chris Lattner 061d9e2cf0 Stub out a method 
llvm-svn: 25676
 2006-01-27 02:10:10 +00:00
Chris Lattner 4df279cfda Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an 
ISD::INLINEASM node.

llvm-svn: 25668
 2006-01-26 23:28:04 +00:00
Chris Lattner 476e67be14 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)

llvm-svn: 25664
 2006-01-26 22:24:51 +00:00
Jim Laskey 0689dfad23 Use global information to fill out Dwarf compile units. 
llvm-svn: 25662
 2006-01-26 21:22:49 +00:00
Jim Laskey 0bbdc55333 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
 2006-01-26 20:21:46 +00:00
Evan Cheng c4c339c3d0 Clean up some code; improve efficiency; and fixed a potential bug involving 
chain successors.

llvm-svn: 25630
 2006-01-26 00:30:29 +00:00
Reid Spencer 5edde66863 Don't break the optimized build (by incorrect placement of #endif) 
llvm-svn: 25613
 2006-01-25 21:49:13 +00:00
Evan Cheng 1880f8db02 No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
 2006-01-25 18:54:24 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Jeff Cohen c3cafb8a67 Make it even more portable. 
llvm-svn: 25605
 2006-01-25 17:18:50 +00:00
Jeff Cohen fb20616aa6 Fix VC++ compilation error. 
llvm-svn: 25604
 2006-01-25 17:17:49 +00:00
Evan Cheng ab49556cf4 Bottom up register usage reducing list scheduler. 
llvm-svn: 25601
 2006-01-25 09:14:32 +00:00
Evan Cheng fbc88a624a Keep track of bottom / top element of a set of flagged nodes. 
llvm-svn: 25600
 2006-01-25 09:13:41 +00:00
Evan Cheng a6eff8a432 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
 2006-01-25 09:12:57 +00:00
Jeff Cohen a292744ecc Portably cast a pointer to an integer. 
llvm-svn: 25594
 2006-01-25 02:40:10 +00:00
Andrew Lenharth 1dbc389ad2 fix build on 64 bit hosts 
llvm-svn: 25591
 2006-01-24 21:26:43 +00:00
Chris Lattner f9a1e3aadc Fix an infinite loop I caused by making sure to legalize the flag operand 
of CALLSEQ_* nodes

llvm-svn: 25582
 2006-01-24 05:48:21 +00:00
Jeff Cohen 12f8441c03 Fix VC++ compilation error. 
llvm-svn: 25577
 2006-01-24 04:43:17 +00:00
Jeff Cohen b56a80061a Remove unused variables. 
llvm-svn: 25576
 2006-01-24 04:42:53 +00:00
Chris Lattner 00fcdfef0d rename method 
llvm-svn: 25572
 2006-01-24 04:16:34 +00:00
Jim Laskey 3e65f28ffe Crude Dwarf global variable debugging. 
llvm-svn: 25569
 2006-01-24 00:49:18 +00:00
Chris Lattner e3a79268a2 Print file-scope inline asm blocks at the start of the output file. 
llvm-svn: 25565
 2006-01-23 23:47:53 +00:00
Andrew Lenharth 683352382e another couple selects 
llvm-svn: 25551
 2006-01-23 21:51:14 +00:00
Andrew Lenharth c28563874c another selectto 
llvm-svn: 25548
 2006-01-23 20:59:12 +00:00
Jim Laskey b8566fa10a Typo. 
llvm-svn: 25545
 2006-01-23 13:34:04 +00:00
Evan Cheng 31272347d4 Skeleton of the list schedule. 
llvm-svn: 25544
 2006-01-23 08:26:10 +00:00
Evan Cheng 421cfe8006 Minor clean up. 
llvm-svn: 25543
 2006-01-23 08:25:34 +00:00
Chris Lattner 763dfd7723 Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making 
sure that the result of expanding a BIT_CONVERT node is itself legalized.

llvm-svn: 25538
 2006-01-23 07:30:46 +00:00
Evan Cheng 87063b9986 Remove a couple of unnecessary #include's 
llvm-svn: 25535
 2006-01-23 07:21:01 +00:00
Evan Cheng c1e1d9724d Factor out more instruction scheduler code to the base class. 
llvm-svn: 25532
 2006-01-23 07:01:07 +00:00
Chris Lattner deda32a786 Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on 
PPC.

llvm-svn: 25522
 2006-01-23 05:22:07 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner e23928c67f Fix a bug in a recent refactor that caused a bunch of programs to miscompile 
or the compiler to crash.

llvm-svn: 25503
 2006-01-21 19:12:11 +00:00
Chris Lattner 44cab00045 Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll 
llvm-svn: 25496
 2006-01-21 04:27:00 +00:00
Evan Cheng 739a6a456e Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.

llvm-svn: 25493
 2006-01-21 02:32:06 +00:00
Jim Laskey 3d8f3a55b7 Simplify search for abbreviations. 
llvm-svn: 25491
 2006-01-21 01:13:18 +00:00
Jim Laskey 45900baadb Correct some simple errors. 
llvm-svn: 25490
 2006-01-21 00:59:54 +00:00
Jim Laskey b17434dc1d Right size integer values before emitting. 
llvm-svn: 25489
 2006-01-20 21:02:36 +00:00
Jim Laskey 7a3e9aa282 Reworked how Dwarf debug info entries and abbreviations are handled. Added 
pubnames and debuy str sections.

llvm-svn: 25487
 2006-01-20 20:34:06 +00:00
Chris Lattner 15afe462a8 remove some unintentionally committed code 
llvm-svn: 25483
 2006-01-20 18:40:10 +00:00
Chris Lattner 222ceabbee If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep 
code, so that the LowerReturn code doesn't have to handle it.

llvm-svn: 25482
 2006-01-20 18:38:32 +00:00
Evan Cheng 13e8c9d6de Another typo 
llvm-svn: 25440
 2006-01-19 04:54:52 +00:00
Andrew Lenharth 7599b6e4af was ignoring the legalized chain in this case, fixed SPASS on alpha 
llvm-svn: 25428
 2006-01-18 23:19:08 +00:00
Nate Begeman 569c439567 Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp 
Now all constant folding in the code generator is in one place.

llvm-svn: 25426
 2006-01-18 22:35:16 +00:00
Chris Lattner e2ee190821 Temporary work around for a libcall insertion bug: If a target doesn't 
support FSIN/FCOS nodes, do not lower sin/cos to them.

llvm-svn: 25425
 2006-01-18 21:50:14 +00:00
Chris Lattner 5fee908be5 Fix a backwards conditional that caused an inf loop in some cases. This 
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll

llvm-svn: 25419
 2006-01-18 19:13:41 +00:00
Jim Laskey 194a5268cb Added minimum Dwarf aranges. Cleaned up some section headers. Line number 
support now works in gdb.

llvm-svn: 25417
 2006-01-18 16:54:26 +00:00
Jim Laskey cc9dfecf81 Add frame work for additional dwarf sections. Comments will improve as code 
is added.

llvm-svn: 25410
 2006-01-17 20:41:40 +00:00
Robert Bocchino 03e95af9f7 Support for the insertelement operation. 
llvm-svn: 25405
 2006-01-17 20:06:42 +00:00
Evan Cheng 6f86a7db07 Bug fix: missing LegalizeOp() on newly created nodes. 
llvm-svn: 25401
 2006-01-17 19:47:13 +00:00
Jim Laskey b9966029fe Adding basic support for Dwarf line number debug information. 
I promise to keep future commits smaller.

llvm-svn: 25396
 2006-01-17 17:31:53 +00:00
Reid Spencer b4f9a6f110 For PR411: 
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.

llvm-svn: 25366
 2006-01-16 21:12:35 +00:00
Nate Begeman 1e1eb5ee6c Constant fold ctpop/ctlz/cttz, and a couple other small cleanups 
llvm-svn: 25357
 2006-01-16 08:07:10 +00:00
Nate Begeman 2642a35f4c Expand case for 64b Legalize, even though no one should end up using this 
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).

llvm-svn: 25356
 2006-01-16 07:59:13 +00:00
Nate Begeman 7d831fa5b9 Add BSWAP stuff to intrinsic lowering for CBE & friends. 
llvm-svn: 25355
 2006-01-16 07:57:00 +00:00
Chris Lattner fcdb420baf Disable two transformations that contribute to bus errors on SparcV8. 
llvm-svn: 25339
 2006-01-15 18:58:59 +00:00
Chris Lattner 59b82f9848 Allow the target to specify 'expand' if they just require the amount to 
be subtracted from the stack pointer.

llvm-svn: 25331
 2006-01-15 08:54:32 +00:00
Chris Lattner 2d59142613 Fix custom lowering of dynamic_stackalloc 
llvm-svn: 25329
 2006-01-15 08:43:08 +00:00
Chris Lattner 9597b33d58 add a missing node name 
llvm-svn: 25327
 2006-01-15 08:39:35 +00:00
Chris Lattner 02011c9a4f Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last) 
llvm-svn: 25325
 2006-01-14 22:41:46 +00:00
Nate Begeman 542c3c17a9 Remove some duplicated code 
llvm-svn: 25313
 2006-01-14 03:18:27 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner ed9b3e1c0a If a target specified a stack pointer with setStackPointerRegisterToSaveRestore, 
lower STACKSAVE/STACKRESTORE into a copy from/to that register.

llvm-svn: 25276
 2006-01-13 17:48:44 +00:00
Chris Lattner b32664583b Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow 
targets to custom expand them as they desire.

llvm-svn: 25273
 2006-01-13 02:50:02 +00:00
Chris Lattner a5110e854d add stacksave/stackrestore nodes 
llvm-svn: 25270
 2006-01-13 02:39:42 +00:00
Chris Lattner 6c9c250dcd Add "support" for stacksave/stackrestore to the dag isel 
llvm-svn: 25268
 2006-01-13 02:24:42 +00:00
Chris Lattner 3b2b0aff0c Add "support" for the llvm.stacksave/stackrestore intrinsics, this is 
used by the C backend.

llvm-svn: 25267
 2006-01-13 02:22:08 +00:00
Chris Lattner 3470b5dee6 Add a simple missing fold to produce this: 
subfic r3, r2, 33

instead of this:

        subfic r2, r2, 32
        addi r3, r2, 1

llvm-svn: 25255
 2006-01-12 20:22:43 +00:00
Chris Lattner 3760e901cf If using __main, emit global ctor/dtor list like any other global 
llvm-svn: 25251
 2006-01-12 19:17:23 +00:00
Chris Lattner b1ee616de9 Don't create rotate instructions in unsupported types, because we don't have 
promote/expand code yet.  This fixes the 177.mesa failure on PPC.

llvm-svn: 25250
 2006-01-12 18:57:33 +00:00
Evan Cheng 7f4ec8274f Allow custom lowering of DYNAMIC_STACKALLOC. 
llvm-svn: 25224
 2006-01-11 22:14:47 +00:00
Evan Cheng 982493300e ignore register #0 
llvm-svn: 25223
 2006-01-11 22:13:48 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner fb5f46541c silence a warning 
llvm-svn: 25184
 2006-01-10 19:43:26 +00:00
Robert Bocchino 2c966e7617 Added selection DAG support for the extractelement operation. 
llvm-svn: 25179
 2006-01-10 19:04:57 +00:00
Chris Lattner b05fce676f Minor cleanup, no functionality change for current targets 
llvm-svn: 25173
 2006-01-10 05:41:59 +00:00
Chris Lattner 90ba544826 Fix an exponential function in libcall insertion to not be exponential. :) 
llvm-svn: 25165
 2006-01-09 23:21:49 +00:00
Evan Cheng 870e4f8e38 * Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS, 
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.

llvm-svn: 25157
 2006-01-09 18:31:59 +00:00
Evan Cheng 53a1f57fc5 New getNode() variants. 
llvm-svn: 25156
 2006-01-09 18:29:18 +00:00
Chris Lattner fae8afb77f Unbreak the build :( 
llvm-svn: 25124
 2006-01-06 05:47:48 +00:00
Evan Cheng 85c973cda9 Revert the previous check-in. Leave shl x, 1 along for target to deal with. 
llvm-svn: 25121
 2006-01-06 01:56:02 +00:00
Evan Cheng b03f9b32d2 fold (shl x, 1) -> (add x, x) 
llvm-svn: 25120
 2006-01-06 01:06:31 +00:00
Evan Cheng f35b1c837f Support for custom lowering of ISD::RET. 
llvm-svn: 25116
 2006-01-06 00:41:43 +00:00