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8 Commits

Author SHA1 Message Date
Matt Arsenault 5d47d4ac7e R600: Mostly remove remaining AMDIL intrinsics. 
Delete all unused ones, and add new AMDGPU named intrinsics for
the ones that are. Handle the old AMDIL names for comptability (although
remove their GCCBuiltin names) and add tests since there weren't any
for these before.

llvm-svn: 210827
 2014-06-12 21:15:44 +00:00
Matt Arsenault 364a6747aa R600/SI: Use v_cvt_f32_ubyte* instructions 
This eliminates extra extract instructions when loading an i8 vector to
a float vector.

llvm-svn: 210666
 2014-06-11 17:50:44 +00:00
Matt Arsenault eb260206c3 R600: Add intrinsics for mad24 
llvm-svn: 209456
 2014-05-22 18:00:15 +00:00
Matt Arsenault 62b1737081 R600: Add mul24 intrinsics 
llvm-svn: 208604
 2014-05-12 17:49:57 +00:00
Matt Arsenault 4c53717787 R600: Add BFE, BFI, and BFM intrinsics to help with writing tests. 
llvm-svn: 205236
 2014-03-31 18:21:18 +00:00
Tom Stellard ce540330df R600: Add support for GROUP_BARRIER instruction 
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185161
 2013-06-28 15:46:59 +00:00
Christian Konig 3625055b8c R600/SI: remove shader type intrinsic 
Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 176622
 2013-03-07 09:03:46 +00:00
Tom Stellard 75aadc2813 Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
 2012-12-11 21:25:42 +00:00