Commit Graph

343070 Commits

Author SHA1 Message Date
Sjoerd Meijer e5043cd3c2 [AArch64] Fix small typos in the target description. NFC.
Patch by Tamas Petz.

Differential Revision: https://reviews.llvm.org/D74603
2020-02-17 10:13:47 +00:00
Simon Tatham 377b0e2b06 [TableGen] Don't elide bitconverts in PatFrag fragments.
Summary:
In the DAG pattern backend, `SimplifyTree` simplifies a pattern by
removing bitconverts between two identical types. But that function is
also run on the fragments list in instances of `PatFrags`, in which
the types haven't been specified yet. So the input and output of the
bitconvert always evaluate to the empty set of types, which makes them
compare equal. So the test always passes, and bitconverts are
unconditionally removed from the PatFrag RHS.

Fixed by spotting the empty type set and using it to inhibit the
optimization.

Reviewers: nhaehnle, hfinkel

Reviewed By: nhaehnle

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74627
2020-02-17 09:30:45 +00:00
Jan Kratochvil 516ba158b6 [lldb] [nfc] Simplify user_id_t -> size_t
As discussed in https://reviews.llvm.org/D73206#1871895> simplifying
usage of `user_id_t`.

There is even written:
  // The compile unit ID is the index of the DWARF unit.
  DWARFUnit *dwarf_cu = info->GetUnitAtIndex(comp_unit->GetID());

Differential Revision: https://reviews.llvm.org/D74670
2020-02-17 10:24:19 +01:00
Sourabh Singh Tomar 3e1090922a [NFCI][DebugInfo]: Corrected a Typo. 2020-02-17 14:50:32 +05:30
Sjoerd Meijer a02056c960 [X86] New test to check rev16 patterns, prep step for D74032. NFC. 2020-02-17 09:13:21 +00:00
Sylvestre Ledru 7ae1347fb2 clang analyzer: Fix the webpage rendering 2020-02-17 10:03:20 +01:00
Raphael Isemann cfb29e4a54 [lldb] Fix some tests failing with gmodules after change to stdlib.h
Commit 82b47b2978 changes the way the stdlib.h
header is structured which seems to cause strange lookup failures in the modules
build. This updates a few failing tests so that they pass with the new
behavior of stdlib.h.

See the discussion in https://reviews.llvm.org/rG82b47b2978405f802a33b00d046e6f18ef6a47be
2020-02-17 09:39:09 +01:00
Kang Zhang f4e920720d [NFC][PowerPC] Update the test case scalar-equal.ll
Modify the command option to add --enable-no-nans-fp-math
2020-02-17 08:34:56 +00:00
Fangrui Song dd8a2013dc [MC] Delete two unused MCCodePadder functions missed by D71106 2020-02-16 22:37:33 -08:00
QingShan Zhang 113df90388 [PowerPC] Add the missing InstrAliasing for 64-bit rotate instructions
We have the InstAlias rules for 32-bit rotate but missing the 64-bit one.
Rotate left immediate rotlwi ra,rs,n rlwinm ra,rs,n,0,31
Rotate left rotlw ra,rs,rb rlwnm ra,rs,rb,0,31

Differential Revision: https://reviews.llvm.org/D72676
2020-02-17 05:42:49 +00:00
Kang Zhang 1ae05a3c66 [NFC][PowerPC] Add a new test case scalar-equal.ll 2020-02-17 05:27:36 +00:00
Michael Liao 487fcc8d3d Fix `-Wpedantic` warning. NFC. 2020-02-17 00:18:01 -05:00
River Riddle 7a551600d1 [mlir] Address post commit feedback of D73590 for SymbolsAndSymbolTables.md 2020-02-16 21:07:20 -08:00
Craig Topper dd0b18e1ec [X86] Disable load folding for X86ISD::ADD with 128 as an immediate.
It can be turned into a sub with -128 instead as long as the
carry flag isn't used.
2020-02-16 20:52:51 -08:00
Fangrui Song c7fa409bca [CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h after D70172 2020-02-16 20:33:07 -08:00
Craig Topper 464729cf7c [X86] Remove unnecessary check for null SDValue. NFC 2020-02-16 20:25:24 -08:00
Matt Arsenault 295bbea3ed AMDGPU/GlobalISel: Fix non-power-of-2 G_SITOFP/G_UITOFP
This wouldn't work for s33-s63 sources.
2020-02-16 22:48:57 -05:00
Matt Arsenault 24c156194b AMDGPU/GlobalISel: Add some missing tests for non-power-of-2 cases 2020-02-16 22:48:42 -05:00
Matt Arsenault 044d40ed46 AMDGPU/GlobalISel: Move lambdas to normal function
These aren't using any local state
2020-02-16 22:48:32 -05:00
Yaxun (Sam) Liu 1b978ddba0 [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese
This patch removes the explicit call graph for CUDA/HIP/OpenMP deferred
diagnostics generated during parsing since it is error prone due to
incomplete information about function declarations during parsing. In stead,
this patch does a post-parsing AST traverse and emits deferred diagnostics
based on the use graph implicitly generated during the traverse.

Differential Revision: https://reviews.llvm.org/D70172
2020-02-16 22:44:33 -05:00
Nico Weber e8e078c8bf [gn build] use -Xclang form for fdebug-comp-dir for now
The driver version of the flag seems to confuse goma.
2020-02-16 21:30:27 -05:00
Zheng Chen 04377a81ae [Powerpc] set instruction count as lsr first priority of lsr.
On Powerpc, set instruction count as lsr first priority of lsr by default.
Add an option ppc-lsr-no-insns-cost to return back to default lsr cost model.

Reviewed By: steven.zhang, jsji

Differential Revision: https://reviews.llvm.org/D72683
2020-02-16 21:04:55 -05:00
Yaxun (Sam) Liu fb44b9db95 [OpenCL][CUDA][HIP][SYCL] Add norecurse
norecurse function attr indicates the function is not called recursively
directly or indirectly.

Add norecurse to OpenCL functions, SYCL functions in device compilation
and CUDA/HIP kernels.

Although there is LLVM pass adding norecurse to functions, it only works
for whole-program compilation. Also FE adding norecurse can make that
pass run faster since functions with norecurse do not need to be checked
again.

Differential Revision: https://reviews.llvm.org/D73651
2020-02-16 20:41:00 -05:00
Craig Topper 20c5968e09 [X86] Increase latency of port5 masked compares and kshift/kadd/kunpck instructions in SKX scheduler model
Uops.info shows these as 4 cycle latency.
2020-02-16 16:59:37 -08:00
Craig Topper c636f694c0 [X86] Add more avx512 instrutions to llvm-mca resource tests 2020-02-16 16:59:36 -08:00
Pierre Habouzit 3adcc78a80 [objc_direct] Small updates to help with adoption.
Add fixits for messaging self in MRR or using super, as the intent is
clear, and it turns out people do that a lot more than expected.

Allow for objc_direct_members on main interfaces, it's extremely useful
for internal only classes, and proves to be quite annoying for adoption.

Add some better warnings around properties direct/non-direct clashes (it
was done for methods but properties were a miss).

Add some errors when direct properties are marked @dynamic.

Radar-Id: rdar://problem/58355212
Signed-off-by: Pierre Habouzit <phabouzit@apple.com>
Differential Revision: https://reviews.llvm.org/D73755
2020-02-16 16:32:41 -08:00
Fangrui Song a35b7288b1 [IR] Change maybeSetDSOLocal to isImplicitDSOLocal
This allows some simplification.
2020-02-16 13:14:15 -08:00
Florian Hahn 43874c365f [SCCP] Re-generate check lines using --function-signature. (NFC) 2020-02-16 20:34:54 +01:00
Craig Topper 272d35aef5 [X86] Separate floating point handling out of EmitCmp and emitFlagsForSetcc.
Both of those functions only have a single caller starting
at LowerSETCC. Just handle floating point directly in LowerSETCC.

This removes the need to pass Chain and IsSignaling all the way
down.
2020-02-16 10:51:05 -08:00
Craig Topper d26f11108b [X86] Split X86ISD::CMP into an integer and FP opcode. 2020-02-16 10:10:19 -08:00
Mark de Wever af20211944 [Sema] Fix pointer-to-int-cast for MSVC build bot
Revision 9658d895c8 breaks the clang-x64-windows-msvc build bot [1].
This should fix the unit test using the same method as used in 9658d895c8.

Note I don't have access to a Windows system so the patch is based on the
errors generated by the bot.

[1] http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/14358

Differential Revision: https://reviews.llvm.org/D74694
2020-02-16 19:09:59 +01:00
marshall 8424789eec Update last-mod date for libcxx status page 2020-02-16 18:55:50 +01:00
marshall 1a07084f6d Updated with list of papers and issues adopted in Prague 2020-02-16 18:54:28 +01:00
LLVM GN Syncbot c7c42b4a93 [gn build] Port ee2c0f76d7 2020-02-16 17:32:06 +00:00
Eric Astor ee2c0f76d7 [ms] [llvm-ml] Add a draft MASM parser
Summary:
Many directives are unavailable, and support for others may be limited.

This first draft has preliminary support for:
    - conditional directives (including errors),
    - data allocation (unsigned types up to 8 bytes, and ALIGN),
    - equates/variables (numeric and text),
    - and procedure directives (without parameters),
as well as COMMENT, ECHO, INCLUDE, INCLUDELIB, PUBLIC, and EXTERN. Text variables (aka text macros) are expanded in-place wherever the identifier occurs.

We deliberately ignore all ml.exe processor directives.

Prominent features not yet supported:
    - structs
    - macros (both procedures and functions)
    - procedures (with specified parameters)
    - substitution & expansion operators

Conditional directives are complicated by the fact that "ifdef rax" is a valid way to check if a file is being assembled for a 64-bit x86 processor; we add support for "ifdef <register>" in general, which requires adding a tryParseRegister method to all MCTargetAsmParsers. (Some targets require backtracking in the non-register case.)

Reviewers: rnk, thakis

Reviewed By: thakis

Subscribers: kerbowa, merge_guards_bot, wuzish, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, mgorny, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72680
2020-02-16 12:30:46 -05:00
Nikita Popov 5f7b92b1b4 [IRBuilder] Prefer InsertPointGuard over full copy; NFC
Don't copy the IRBuilder when an InsertPointGuard would also do.
2020-02-16 18:02:29 +01:00
Nikita Popov 7c362b25d7 [IRBuilder] Fix unnecessary IRBuilder copies; NFC
Fix a few cases where an IRBuilder is passed to a helper function
by value, while a by reference pass was intended.
2020-02-16 17:57:18 +01:00
Simon Pilgrim b85df2e185 [X86] combineX86ShuffleChain - add support for combining 512-bit shuffles to PALIGNR 2020-02-16 16:13:26 +00:00
Simon Pilgrim c9c1c2b335 [X86] combineX86ShuffleChain - add support for combining 512-bit shuffles to bit shifts 2020-02-16 16:13:25 +00:00
Nikita Popov af480e8c63 Revert "[IRBuilder] Virtualize IRBuilder"
This reverts commit 0765d3824d.
This reverts commit 1b04866a3d.

Relevant looking crashes observed on:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win
2020-02-16 17:01:10 +01:00
Sanjay Patel 62dd44d76d [VectorCombine] fix cost calc for extract-cmp
getOperationCost() is not the cost we wanted; that's not the
throughput value that the rest of the calculation uses.

We may want to switch everything in this code to use the
getInstructionThroughput() wrapper to avoid these kinds of
problems, but I'll look at that as a follow-up because that
can create other logical diffs via using optional parameters
(we'd need to speculatively create the vector instruction to
make a fair(er) comparison).
2020-02-16 10:40:28 -05:00
Sanjay Patel e48b536be6 [x86] form broadcast of scalar memop even with >1 use
The unseen logic diff occurs because MayFoldLoad() is defined like this:

static bool MayFoldLoad(SDValue Op) {
  return Op.hasOneUse() && ISD::isNormalLoad(Op.getNode());
}

The test diffs here all seem ok to me on screen/paper, but it's hard to know
if that will lead to universally better perf for all targets. For example,
if a target implements broadcast from mem as multiple uops, we would have to
weigh the potential reduction of instructions and register pressure vs.
possible increase in number of uops. I don't know if we can make a truly
informed decision on this at compile-time.

The motivating case that I'm looking at in PR42024:
https://bugs.llvm.org/show_bug.cgi?id=42024
...resembles the diff in extract-concat.ll, but we're not going to change the
larger example there without at least 1 other fix.

Differential Revision: https://reviews.llvm.org/D74088
2020-02-16 10:32:56 -05:00
Nikita Popov 893c630fbe [InstCombine] Create new log2 intrinsic; NFCI
Rather than mixing creation of new instructions and in-place
modification here, create a new log2 intrinsic. This should be
NFC apart from worklist order changes.
2020-02-16 15:52:09 +01:00
Nikita Popov 6cdc36afb2 [InstCombine] Add multiuse tests for cttz transform; NFC
These show incorrect duplication of instructions.
2020-02-16 15:52:09 +01:00
Mark de Wever 9658d895c8 [Sema] Adds the pointer-to-int-cast diagnostic
Converting a pointer to an integer whose result cannot represented in the
integer type is undefined behavior is C and prohibited in C++. C++ already
has a diagnostic when casting. This adds a diagnostic for C.

Since this diagnostic uses the range of the conversion it also modifies
int-to-pointer-cast diagnostic to use a range.

Fixes PR8718: No warning on casting between pointer and non-pointer-sized int

Differential Revision: https://reviews.llvm.org/D72231
2020-02-16 15:38:25 +01:00
Nikita Popov 1b04866a3d [IRBuilder] Try to fix warnings
Try to fix -Wnon-virtual-dtor warnings that cause build failure
on clang-pcc64le-rhel.
2020-02-16 15:32:11 +01:00
Nikita Popov 0765d3824d [IRBuilder] Virtualize IRBuilder
Related llvm-dev thread:
http://lists.llvm.org/pipermail/llvm-dev/2020-February/138951.html

This patch moves the IRBuilder from templating over the constant
folder and inserter towards making both of these virtual.
There are a couple of motivations for this:

1. It's not possible to share code between use-sites that use
different IRBuilder folders/inserters (short of templating the code
and moving it into headers).
2. Methods currently defined on IRBuilderBase (which is not templated)
do not use the custom inserter, resulting in subtle bugs (e.g.
incorrect InstCombine worklist management). It would be possible to
move those into the templated IRBuilder, but...
3. The vast majority of the IRBuilder implementation has to live
in the header, because it depends on the template arguments.
4. We have many unnecessary dependencies on IRBuilder.h,
because it is not easy to forward-declare. (Significant parts of
the backend depend on it via TargetLowering.h, for example.)

This patch addresses the issue by making the following changes:

* IRBuilderDefaultInserter::InsertHelper becomes virtual.
  IRBuilderBase accepts a reference to it.
* IRBuilderFolder is introduced as a virtual base class. It is
 implemented by ConstantFolder (default), NoFolder and TargetFolder.
  IRBuilderBase has a reference to this as well.
* All the logic is moved from IRBuilder to IRBuilderBase. This means
  that methods can in the future replace their IRBuilder<> & uses
  (or other specific IRBuilder types) with IRBuilderBase & and thus
  be usable with different IRBuilders.
* The IRBuilder class is now a thin wrapper around IRBuilderBase.
  Essentially it only stores the folder and inserter and takes care
  of constructing the base builder.

What this patch doesn't do, but should be simple followups after this change:

* Fixing use of the inserter for creation methods originally defined
  on IRBuilderBase.
* Replacing IRBuilder<> uses in arguments with IRBuilderBase, where useful.
* Moving code from the IRBuilder header to the source file.

From the user perspective, these changes should be mostly transparent:
The only thing that consumers using a custom inserted may need to do is
inherit from IRBuilderDefaultInserter publicly and mark their InsertHelper
as public.

Differential Revision: https://reviews.llvm.org/D73835
2020-02-16 13:48:55 +01:00
Georgii Rymar 22ebf08006 [llvm-readobj] - Refactor the code that dumps relocations.
The current code has following issues:
1) It has a duplicated logic part.
2) This logic relies on unwrapOrError calls, but if we want to convert
   them to warnings, we will need to change all of them what is hard to do
   because of the duplication.

In this patch I've created a new method that returns Expected<> what allows
now to catch all errors in a single place and remove the code duplication.

Note: this change is itself a refactor NFC. It does not change the current logic
anyhow. It prepares the code for the follow-up(s).

Differential revision: https://reviews.llvm.org/D74545
2020-02-16 14:39:24 +03:00
riverriddle@google.com 857b655d7a [mlir] Allow adding extra class declarations to interfaces.
Summary: This matches the similar feature on operation definitions.

Reviewers: jpienaar, antiagainst

Reviewed By: jpienaar, antiagainst

Subscribers: mehdi_amini, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74438
2020-02-15 23:54:42 -08:00
River Riddle 9b07512fd3 [mlir][Parser][NFC] Remove several usages of getEncodedSourceLocation
Summary: getEncodedSourceLocation can be very costly to compute, especially if the input line becomes very long. This revision inlines some of the verification of a few `getChecked` methods to avoid the materialization of an encoded source location.

Differential Revision: https://reviews.llvm.org/D74587
2020-02-15 23:52:23 -08:00