Commit Graph

29442 Commits

Author SHA1 Message Date
David Goodwin 22c2fba978 Use common code for both ARM and Thumb-2 instruction and register info.
llvm-svn: 75067
2009-07-08 23:10:31 +00:00
Chris Lattner 3c043404e0 * manually concatenate two string literals
* remove some dead code: darwin doesn't support dllimport linkage.

llvm-svn: 75066
2009-07-08 23:09:14 +00:00
Evan Cheng 5edd90cbbc - Add some NEON ld / st instruction static encoding.
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.

llvm-svn: 75065
2009-07-08 22:51:32 +00:00
Devang Patel daf15df944 Fix thinko.
llvm-svn: 75061
2009-07-08 22:25:56 +00:00
Jeffrey Yasskin d8d725de4f Fix the AssertingVH unittests.
llvm-svn: 75060
2009-07-08 22:09:00 +00:00
Jeffrey Yasskin 70415d97a8 Add an option to allocate JITed global data separately from code. By
default, this option is not enabled to support clients who rely on
this behavior.

Fixes http://llvm.org/PR4483

A patch to allocate additional memory for globals after we run out is
forthcoming.

Patch by Reid Kleckner!

llvm-svn: 75059
2009-07-08 21:59:57 +00:00
Devang Patel f04d63a398 Drop "constant" from
!0 = constant metadata !{...}

llvm-svn: 75057
2009-07-08 21:57:07 +00:00
David Greene 9dadbbd755 Allow users of GraphWriter to display graphs asynchronously. This
provides a way to quickly dump a bunch of graph information to dot files
and display them.  It's a timesaver when working on large systems.

llvm-svn: 75056
2009-07-08 21:53:41 +00:00
David Greene cdde1bb0a6 Add an ExecuteNoWait interface to support asynchronous process spawning.
llvm-svn: 75055
2009-07-08 21:46:40 +00:00
Devang Patel 983c6b1b8f Update SLotTracker to handle MDNode slots.
Simplify MDNode printing.

llvm-svn: 75053
2009-07-08 21:44:25 +00:00
Duncan Sands 7dcc37b942 Nowadays vectors are only split if they have an even
number of elements.  Make some simplifications based
on this (in particular SplitVecRes_SETCC).  Tighten
up some checking while there.

llvm-svn: 75050
2009-07-08 21:34:03 +00:00
Evan Cheng e3a53c448b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
llvm-svn: 75048
2009-07-08 21:03:57 +00:00
Bill Wendling 0c9f367d62 Recommit r74952 with a bug fix:
DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
       pushl   %ebp
Llabel1:
       movl    %esp, %ebp
Llabel2:
       pushl   %esi
Llabel3:
       subl    $20, %esp
       call    "L1$pb"
"L1$pb":
       popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

There is some ugliness where we generate code like this:


LBB22_0:	## entry
	pushl	%ebp
Llabel280:
	movl	%esp, %ebp
Llabel281:
Llabel284:
	pushl	%ebp  <----------
	pushl	%ebx
	pushl	%edi
	pushl	%esi
Llabel282:
	subl	$328, %esp

Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.

llvm-svn: 75047
2009-07-08 21:02:53 +00:00
Bill Wendling 9242ff34c6 Use interators instead of counters for loops.
llvm-svn: 75046
2009-07-08 20:57:27 +00:00
Torok Edwin f8d479c1ce Missed an exit during the conversion.
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.

llvm-svn: 75045
2009-07-08 20:55:50 +00:00
Torok Edwin fb8d6d5b58 Implement changes from Chris's feedback.
Finish converting lib/Target.

llvm-svn: 75043
2009-07-08 20:53:28 +00:00
Owen Anderson a771459bb1 Push LLVMContext _back_ through IRBuilder.
llvm-svn: 75040
2009-07-08 20:50:47 +00:00
Bob Wilson 1d298fd75b Implement NEON vst1 instruction.
llvm-svn: 75037
2009-07-08 20:32:02 +00:00
David Goodwin 03ab0bbb24 Generalize opcode selection in ARMBaseRegisterInfo.
llvm-svn: 75036
2009-07-08 20:28:28 +00:00
Xerxes Ranby b009980f0b Fix cmake build.
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt

llvm-svn: 75035
2009-07-08 20:13:41 +00:00
Devang Patel d2541158da Support MDNode forward reference.
llvm-svn: 75031
2009-07-08 19:23:54 +00:00
Dan Gohman dc19104267 Make the code that updates ScalarEvolution's internal state in response
to a loop deletion more thorough. Don't prune the def-use tree search at
instructions that don't have SCEVs computed, because an instruction with
a user that has a computed SCEV may itself lack a computed SCEV.  Also,
remove loop-related values from the ValuesAtScopes and
ConstantEvolutionLoopExitValues maps as well.

This fixes a regression in 483.xalancbmk.

llvm-svn: 75030
2009-07-08 19:23:34 +00:00
Dan Gohman 7bb3173ff7 Tell ScalarEvolution to forget a loop before starting to delete it.
This way ScalarEvolution can examine the loop to determine what state
it needs to update, if it chooses.

llvm-svn: 75029
2009-07-08 19:14:29 +00:00
Torok Edwin fa04002254 Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.

llvm-svn: 75027
2009-07-08 19:04:27 +00:00
Owen Anderson b17f32945f Switch GlobalVariable ctors to a sane API, where *either* a context or a module is required.
llvm-svn: 75025
2009-07-08 19:03:57 +00:00
David Goodwin 9ca33e8a9f Push methods into base class in preparation for sharing.
llvm-svn: 75020
2009-07-08 18:31:39 +00:00
Bob Wilson f731a2df6b Implement NEON vld1 instructions.
llvm-svn: 75019
2009-07-08 18:11:30 +00:00
Torok Edwin 6dd2730024 Start converting to new error handling API.
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)

llvm-svn: 75018
2009-07-08 18:01:40 +00:00
David Goodwin eebf58805c Start breaking out common base functionality for register info.
llvm-svn: 75016
2009-07-08 17:28:55 +00:00
David Goodwin af7451b674 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
llvm-svn: 75010
2009-07-08 16:09:28 +00:00
Duncan Sands 3f1e2409cc Remove trailing whitespace. Reorder some methods
and cases alphabetically.  No functionality change.

llvm-svn: 75001
2009-07-08 11:36:39 +00:00
Sanjiv Gupta 16019aaa4f Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
llvm-svn: 74992
2009-07-08 05:40:05 +00:00
Nick Lewycky a21d3daadc Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
2009-07-08 03:04:38 +00:00
Evan Cheng 14965760a7 Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
llvm-svn: 74988
2009-07-08 01:46:35 +00:00
Owen Anderson 5948fdf68b Push LLVMContext through GlobalVariables and IRBuilder.
llvm-svn: 74985
2009-07-08 01:26:06 +00:00
Chris Lattner d41531a2c0 remove two methods that no longer exist.
llvm-svn: 74982
2009-07-08 01:07:39 +00:00
Chris Lattner e4807c5767 more getting windows to build.
llvm-svn: 74981
2009-07-08 00:52:12 +00:00
Chris Lattner 4ac607332d dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
VSETCC must define all bits, which is different than it was documented
to before.  Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the 
documentation.  We now get nice code for vec_compare.ll

llvm-svn: 74978
2009-07-08 00:31:33 +00:00
Chris Lattner e3241b5719 hopefully fix the build on windows.
llvm-svn: 74977
2009-07-08 00:29:32 +00:00
Evan Cheng b61e3a83ee Add a todo.
llvm-svn: 74976
2009-07-08 00:05:05 +00:00
Evan Cheng f0080b734a Also statically set bit 25 for BR_JT instructions.
llvm-svn: 74974
2009-07-07 23:45:10 +00:00
Owen Anderson 155dccd87c LLVMContext-ification.
llvm-svn: 74973
2009-07-07 23:43:39 +00:00
Evan Cheng 2cff076cfe Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
llvm-svn: 74972
2009-07-07 23:40:25 +00:00
Bill Wendling 69bf0a1e2a --- Reverse-merging (from foreign repository) r74952 into '.':
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86RegisterInfo.h

Temporarily revert. This was causing an infinite loop in the linker on Leopard.

llvm-svn: 74970
2009-07-07 23:37:49 +00:00
Chris Lattner f3989abdbf SelectionDAG::SignBitIsZero doesn't work right for vectors,
for now, conservatively return false.

llvm-svn: 74969
2009-07-07 23:28:46 +00:00
Dale Johannesen 9e5b64b7b7 Commit the file I actually changed as part of last
patch, instead of one I didn't.

llvm-svn: 74968
2009-07-07 23:28:22 +00:00
Dale Johannesen 4e33115e5e Operand of asm("call") (the callee function) is represented
as "X" constraint and "P" modifier on x86.  Make this work.
(Change may not be sufficient to fix it for non-Darwin, but
I'm pretty sure it won't break anything.)
gcc.apple/asm-block-32.c
gcc.apple/asm-block-33.c

llvm-svn: 74967
2009-07-07 23:26:33 +00:00
Chris Lattner fc74e8241a add support for legalizing an icmp where the result is illegal (4xi1) but
the input is legal (4 x i32)

llvm-svn: 74964
2009-07-07 23:03:54 +00:00
Chris Lattner f48f3be185 random code cleanups.
llvm-svn: 74962
2009-07-07 22:49:15 +00:00
Chris Lattner 30220d8f98 implement support for spliting and scalarizing vector setcc's. This
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.

llvm-svn: 74961
2009-07-07 22:47:46 +00:00