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3 Commits

Author SHA1 Message Date
Matt Arsenault a6867fd441 AMDGPU: Combine fp16/fp64 subtarget features 
The same control register controls both, and are set to
the same defaults. Keep the old names around as aliases.

llvm-svn: 292837
 2017-01-23 22:31:03 +00:00
Matt Arsenault e7d8ed32f9 AMDGPU: Swap order of operands in fadd/fsub combine 
FMA is canonicalized to constant in the middle operand. Do
the same so fmad matches and avoid an extra combine step.

llvm-svn: 290313
 2016-12-22 04:03:40 +00:00
Matt Arsenault 770ec8680a AMDGPU: Form more FMAs if fusion is allowed 
Extend the existing fadd/fsub->fmad combines to produce
FMA if allowed.

llvm-svn: 290311
 2016-12-22 03:55:35 +00:00