Commit Graph

449 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 30c811246f Remove X86-dependent stuff from SSEDomainFix.
This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

llvm-svn: 140659
2011-09-27 23:50:46 +00:00
Bruno Cardoso Lopes 62d79875d3 Enable SSEDomainFix pass for AVX mode.
llvm-svn: 139816
2011-09-15 18:27:32 +00:00
Benjamin Kramer 7859d2e148 Use internal storage for command line option.
llvm-svn: 139079
2011-09-03 03:45:06 +00:00
Evan Cheng 2bb4035707 Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.

llvm-svn: 138450
2011-08-24 18:08:43 +00:00
Bruno Cardoso Lopes 2a3ffb5d97 Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
2011-08-23 01:14:17 +00:00
Evan Cheng b25310095f More refactoring.
llvm-svn: 135939
2011-07-25 19:33:48 +00:00
Evan Cheng efd9b4240f - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580
2011-07-20 07:51:56 +00:00
Evan Cheng 2129f59637 Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.

llvm-svn: 135468
2011-07-19 06:37:02 +00:00
Evan Cheng 1705ab00ab Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
llvm-svn: 135219
2011-07-14 23:50:31 +00:00
Evan Cheng c5e6d2f519 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884
2011-07-11 03:57:24 +00:00
Evan Cheng 60fc0fca5c Restore old behavior. Always auto-detect features unless cpu or features are specified.
llvm-svn: 134757
2011-07-08 22:30:25 +00:00
Evan Cheng 4d1ca96bfc Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".

llvm-svn: 134678
2011-07-08 01:53:10 +00:00
Evan Cheng 13bcc6c1c7 Add Mode64Bit feature and sink it down to MC layer.
llvm-svn: 134641
2011-07-07 21:06:52 +00:00
Evan Cheng fe6e405e8c Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
2011-06-30 01:53:36 +00:00
Evan Cheng 8b2a2a1158 Rename TargetOptions::StackAlignment to StackAlignmentOverride.
llvm-svn: 133739
2011-06-23 18:15:47 +00:00
Evan Cheng 3a0c5e52ff Remove TargetOptions.h dependency from X86Subtarget.
llvm-svn: 133726
2011-06-23 17:54:54 +00:00
Rafael Espindola c5dac4df2e Add a getExprForPersonalitySymbol method to MCAsmInfo. Use it when
converting the symbol passed to .cfi_personality into bytes is the file.

llvm-svn: 130400
2011-04-28 16:09:09 +00:00
Daniel Dunbar 2b9b0e3748 ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()
predicates.

llvm-svn: 129816
2011-04-19 21:14:45 +00:00
Duncan Sands c76ae9c8e0 Add datalayout information for the IEEE quad precision fp128 type.
llvm-svn: 126780
2011-03-01 20:56:50 +00:00
NAKAMURA Takumi 4c14a5cc2c Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.
No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way.

llvm-svn: 125747
2011-02-17 12:24:17 +00:00
NAKAMURA Takumi 0544fe7287 Fix whitespace.
llvm-svn: 125746
2011-02-17 12:23:50 +00:00
Evan Cheng d22a4a1fd6 Patches to build EFI with Clang/LLVM. By Carl Norum.
llvm-svn: 124639
2011-02-01 01:14:13 +00:00
Rafael Espindola b3eca9bb71 Add support for the --noexecstack option.
llvm-svn: 124077
2011-01-23 17:55:27 +00:00
Anton Korobeynikov 2f93128109 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
Anton Korobeynikov 14ee344944 Move getInitialFrameState() to TargetFrameInfo
llvm-svn: 119754
2010-11-18 23:25:52 +00:00
Anton Korobeynikov f7183edb59 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
Cameron Esfahani d57f9ecd4a Recommit 116056, now with the missing file...
llvm-svn: 116083
2010-10-08 19:24:18 +00:00
Anton Korobeynikov d77a443631 va_args support for Win64.
Patch by Cameron!

llvm-svn: 115480
2010-10-03 22:52:07 +00:00
Rafael Espindola 66e08d43d2 Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do
so and also change X86 for consistency.

Investigating if this can be improved a bit.

llvm-svn: 115469
2010-10-03 18:59:45 +00:00
Anton Korobeynikov db9820ecaa Use rip-rel addressing on win64 by default. For this we just
defaults to small pic code model.

llvm-svn: 111741
2010-08-21 17:21:11 +00:00
Matt Fleming f751d856f0 Hookup ELF support for X86.
llvm-svn: 111173
2010-08-16 18:36:14 +00:00
Benjamin Kramer 61c8e6dc16 Print an error message when someone tries -integrated-as on an unsupported target.
- The COFF backend doesn't support MingW/Cygwin at the moment, it'll report an
  error, but it's still much better than random assertions from the MachO backend.
- We want to make ELF the default eventually, it's what the majority of targets use.

llvm-svn: 110197
2010-08-04 13:16:30 +00:00
Michael J. Spencer 6b4925e223 Add relax all support to the COFF object streamer.
llvm-svn: 109947
2010-07-31 06:22:29 +00:00
Michael J. Spencer f8270bdb2d Make MC use Windows COFF on Windows and add tests.
llvm-svn: 109494
2010-07-27 06:46:15 +00:00
Jakob Stoklund Olesen c30b4ddc58 Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
pass that inserted it.

It is no longer necessary to limit the live ranges of FP registers to a single
basic block.

llvm-svn: 108536
2010-07-16 17:41:44 +00:00
Jakob Stoklund Olesen 0e5fb020a0 Allow x87 FP registers to be alive globally in a function.
FP_REG_KILL instructions are still inserted, but can be disabled by passing
-live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly.

CFG edges are partioned into bundles where the x87 stack must be allocated
identically. Code is insertad at the end of each basic block that shuffles the
live FP registers to match the outgoing bundles expectations.

This fix is in preparation for some upcoming register allocator improvements
that may extend the live range of registers beyond a basic block, similar to
LICM. It also provides a nice runtime speedup if you are building with
-mfpmath=387.

llvm-svn: 108529
2010-07-16 16:38:12 +00:00
Dan Gohman d7b5ce3312 Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.

llvm-svn: 108039
2010-07-10 09:00:22 +00:00
Dan Gohman 3439629239 Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.

llvm-svn: 107691
2010-07-06 20:24:04 +00:00
Dan Gohman f4f04107ef Revert r107655.
llvm-svn: 107668
2010-07-06 15:49:48 +00:00
Dan Gohman 12205645a6 Fix a bunch of custom-inserter functions to handle the case where
the pseudo instruction is not at the end of the block.

llvm-svn: 107655
2010-07-06 15:18:19 +00:00
Matt Fleming 638cdb2db1 Currently, createMachOStreamer() is invoked directly in llvm-mc which
isn't ideal if we want to be able to use another object file format.

Add a createObjectStreamer() factory method so that the correct object
file streamer can be instantiated for a given target triple.

llvm-svn: 104318
2010-05-21 12:54:43 +00:00
Dan Gohman bb919dfb6b Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.

llvm-svn: 103481
2010-05-11 17:31:57 +00:00
Eric Christopher 4e7e4e6b60 Revert 102941, we're going to do this via attr and can just
hack the code to turn it off when debugging.

llvm-svn: 103083
2010-05-05 07:35:59 +00:00
Eric Christopher 937a5b75f9 Add an option, defaulting to off, to disable the sse domain crossing opts.
llvm-svn: 102941
2010-05-03 19:54:02 +00:00
Evan Cheng 873310f635 Trim include.
llvm-svn: 101978
2010-04-21 01:39:06 +00:00
Jim Grosbach 4dac890600 Fix PR6696 and PR6663
When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.

For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.

llvm-svn: 100559
2010-04-06 20:26:37 +00:00
Jakob Stoklund Olesen 6f6ebb663c Enable -sse-domain-fix by default. Now with tests!
llvm-svn: 99954
2010-03-30 22:47:00 +00:00
Jakob Stoklund Olesen cf35648ebe Revert "Enable -sse-domain-fix by default. What could possibly go wrong?"
Not running 'make check-all' before committing is a bad idea.

llvm-svn: 99933
2010-03-30 21:36:32 +00:00
Jakob Stoklund Olesen a654df84e6 Enable -sse-domain-fix by default. What could possibly go wrong?
llvm-svn: 99931
2010-03-30 21:09:31 +00:00
Jakob Stoklund Olesen 49e121d5e4 Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register
in a different domain than where it was defined. Some instructions have
equvivalents for different domains, like por/orps/orpd.

The SSEDomainFix pass tries to minimize the number of domain crossings by
changing between equvivalent opcodes where possible.

This is a work in progress, in particular the pass doesn't do anything yet. SSE
instructions are tagged with their execution domain in TableGen using the last
two bits of TSFlags. Note that not all instructions are tagged correctly. Life
just isn't that simple.

The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline
issue handled by NEONMoveFixPass. This pass may become target independent to
handle both.

llvm-svn: 99524
2010-03-25 17:25:00 +00:00
Jakob Stoklund Olesen a86ccbfe88 Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings."
This reverts commit 99345. It was breaking buildbots.

llvm-svn: 99352
2010-03-23 23:48:51 +00:00
Jakob Stoklund Olesen 31da45b7af Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
This is work in progress. So far, SSE execution domain tables are added to
X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix.

llvm-svn: 99345
2010-03-23 23:14:44 +00:00
Daniel Dunbar fed917e078 TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.
llvm-svn: 99097
2010-03-20 22:36:22 +00:00
Daniel Dunbar 40eb7f0991 MC/X86: Add stub AsmBackend.
llvm-svn: 96763
2010-02-21 21:54:14 +00:00
Anton Korobeynikov ae4ccc10da Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
Anton Korobeynikov ce77ce3072 Drop winmcasminfo and use normal AT&T COFF for all windows targets.
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.

llvm-svn: 96165
2010-02-14 15:19:54 +00:00
Chris Lattner 509154e0f9 rip out the 'heinous' x86 MCCodeEmitter implementation.
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

llvm-svn: 96059
2010-02-13 00:49:29 +00:00
Evan Cheng ea5c6be766 Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.

llvm-svn: 95493
2010-02-06 09:07:11 +00:00
Chris Lattner f914be06d2 stub out a new X86 encoder, which can be tried with
-enable-new-x86-encoder until its stable.

llvm-svn: 95256
2010-02-03 21:24:49 +00:00
Chris Lattner 2f750f3b5a rename createX86MCCodeEmitter to more accurately reflect what it creates.
llvm-svn: 95254
2010-02-03 21:14:33 +00:00
Chris Lattner 6a6137832d remove dead code.
llvm-svn: 95144
2010-02-02 22:03:00 +00:00
Chris Lattner 0cd6c2a047 eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for
the JIT path.  Next up, remove the template cruft.

llvm-svn: 95131
2010-02-02 21:31:47 +00:00
Jim Grosbach 04770f2aa1 For aligned load/store instructions, it's only required to know whether a
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.

llvm-svn: 93885
2010-01-19 18:31:11 +00:00
Bill Wendling 220c29465e Even more explanation.
llvm-svn: 93841
2010-01-19 02:44:01 +00:00
Bill Wendling c592725fbb - Add getLSDAEncoding to the PowerPC backend.
- Greatly improve the comments to the getLSDAEncoding method.

llvm-svn: 93796
2010-01-18 22:36:35 +00:00
Bill Wendling 748ceca695 Add FIXME comment.
llvm-svn: 93755
2010-01-18 19:47:53 +00:00
Bill Wendling a73e471c62 - Add a comment to the callback indicating that it's *extremely* not a good
idea, but unfortunately necessary.
- Default to using 4-bytes for the LSDA pointer encoding to agree with the
  encoded value in the CIE.

llvm-svn: 93753
2010-01-18 19:36:27 +00:00
Bill Wendling bf5cfa1a41 Retrying r91337:
The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,
but we need it to actually be 4-bytes in the FDE for some platforms. Allow
individual platforms to decide for themselves.

llvm-svn: 93616
2010-01-16 01:40:55 +00:00
Sean Callanan 5c8f4cd396 Fixed library dependencies between the X86 disassembler and
X86 codegen that were causing circular symbol dependencies.

llvm-svn: 91871
2009-12-22 01:11:26 +00:00
Eric Christopher a91c0f48e6 Fix setting and default setting of code model for jit. Do this
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.

llvm-svn: 91824
2009-12-21 08:15:29 +00:00
Sean Callanan 04cc307edd Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749
2009-12-19 02:59:52 +00:00
Jim Grosbach 2c3a6c6589 Factor the stack alignment calculations out into a target independent pass.
No functionality change.

llvm-svn: 90336
2009-12-02 19:30:24 +00:00
Jeffrey Yasskin 10d3604a9e Make X86-64 in the Large model always emit 64-bit calls.
The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.

To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.

To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.

Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.

This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.

Thanks to echristo for lots of testing!

llvm-svn: 88984
2009-11-16 22:41:33 +00:00
Daniel Dunbar ad36e8aceb Pass StringRef by value.
llvm-svn: 86251
2009-11-06 10:58:06 +00:00
Daniel Dunbar 981a71c302 llvm-mc/X86: Implement single instruction encoding interface for MC.
- Note, this is a gigantic hack, with the sole purpose of unblocking further
   work on the assembler (its also possible to test the mathcer more completely
   now).

 - Despite being a hack, its actually good enough to work over all of 403.gcc
   (although some encodings are probably incorrect). This is a testament to the 
   beauty of X86's MachineInstr, no doubt! ;)

llvm-svn: 80234
2009-08-27 08:12:55 +00:00
Chris Lattner 054574666a rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.
llvm-svn: 79773
2009-08-22 21:03:30 +00:00
Chris Lattner 7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Chris Lattner 9a6cf91261 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Chris Lattner 2c30970b22 pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711
2009-08-11 20:42:37 +00:00
Chris Lattner cd450bbbe5 remove a random reference to subtarget. Even without this, we
still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103
2009-08-04 21:12:08 +00:00
Anton Korobeynikov 71386e08fe Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
llvm-svn: 77962
2009-08-03 08:12:53 +00:00
Daniel Dunbar c3719c36e6 Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927
2009-08-02 23:37:13 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
2009-08-02 22:11:08 +00:00
Chris Lattner 5e693ed07b Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.

llvm-svn: 77294
2009-07-28 03:13:23 +00:00
Daniel Dunbar 5680b4f285 Add new helpers for registering targets.
- Less boilerplate == good.

llvm-svn: 77052
2009-07-25 06:49:55 +00:00
Daniel Dunbar 67038c1333 Put Target definitions inside Target specific header, and llvm namespace.
llvm-svn: 76344
2009-07-18 23:03:22 +00:00
Daniel Dunbar c151c51ea0 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886
2009-07-16 01:55:13 +00:00
Daniel Dunbar d97db682a3 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar c901392ba4 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
Daniel Dunbar 5302288c90 Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.

llvm-svn: 75843
2009-07-15 22:01:32 +00:00
Daniel Dunbar e833810a5e Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820
2009-07-15 20:24:03 +00:00
Stuart Hastings 338191cd67 Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
2009-07-15 17:27:11 +00:00
Daniel Dunbar eb8c83b4c3 Replace large swaths of copy-n-paste code with obvious helper function...
- Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782
2009-07-15 12:49:15 +00:00
Daniel Dunbar 863e587d27 Kill off old (TargetMachine level, not Target level) match quality functions.
llvm-svn: 75780
2009-07-15 12:26:05 +00:00
Daniel Dunbar 6db8134e80 Provide TargetMachine implementations with reference to Target they were created
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778
2009-07-15 12:11:05 +00:00
Daniel Dunbar b22f50e4c4 Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
2009-07-15 09:22:31 +00:00
David Greene a31f96cf2b Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Chris Lattner ba4d73310a make PIC vs DynamicNoPIC be explicit in PICStyles.
llvm-svn: 75275
2009-07-10 20:58:47 +00:00
Chris Lattner 3945dd0c44 isPICStyleRIPRel() and friends are never true in -static mode.
Simplify code based on this.

llvm-svn: 75099
2009-07-09 04:24:46 +00:00
Chris Lattner 117608b129 .o file writing shouldn't mess around with pic/relo models like the JIT does.
llvm-svn: 75096
2009-07-09 03:40:30 +00:00
Chris Lattner 0b0c5cc376 move a hack out of the asm-printer specific path to the main target selection path.
llvm-svn: 75095
2009-07-09 03:37:30 +00:00
Chris Lattner 7e3abf1ab0 many more cleanups, for example if in the "none" pic-style,
make sure we're set to static codegen.  Simplify the decision
tree of target->picstyle/picmode settings.

llvm-svn: 75094
2009-07-09 03:32:31 +00:00
Chris Lattner 1c5bf9d26d When in -static mode, force the PIC style to none. Doing this requires fixing
code which conflated RIPRel PIC with x86-64.  Fix these to just check for X86-64
directly.

llvm-svn: 75092
2009-07-09 03:15:51 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Daniel Dunbar 75c12e1569 Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
2009-07-01 01:48:54 +00:00
Chris Lattner cce1589e4e simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.
llvm-svn: 74377
2009-06-27 05:24:12 +00:00
Chris Lattner fea81da433 Reimplement rip-relative addressing in the X86-64 backend. The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.

llvm-svn: 74372
2009-06-27 04:16:01 +00:00
Bob Wilson 5a495fea07 Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.

llvm-svn: 74026
2009-06-23 23:59:40 +00:00
Douglas Gregor 1b731d5dbe Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.

llvm-svn: 73543
2009-06-16 20:12:29 +00:00
Bruno Cardoso Lopes 1656366e4d Support for ELF Visibility
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes

llvm-svn: 73201
2009-06-11 19:16:03 +00:00
Bruno Cardoso Lopes 7531e92333 x86_64 now uses the correct ELF e_machine type
llvm-svn: 72986
2009-06-06 04:29:16 +00:00
Evan Cheng ad6f3ff2c0 For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
I view this as a temporary workaround until the assembler / linker changes.

llvm-svn: 72806
2009-06-03 21:13:54 +00:00
Bruno Cardoso Lopes 9fd794bebf Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
llvm-svn: 72697
2009-06-01 19:57:37 +00:00
Bruno Cardoso Lopes a194c3a69e First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Bill Wendling 026e5d7667 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling 084669a1c9 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling 56f2987a87 r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling d0ae15946c Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng 5e5a63cf8f CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Bill Wendling c5437ea429 Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
2009-02-24 08:30:20 +00:00
Dan Gohman 78fe44ed52 Make a comment a doxygen comment.
llvm-svn: 63988
2009-02-07 00:42:54 +00:00
Duncan Sands 595a4423dc Fix build with gcc-4.4: it doesn't like PICStyle
being both a namespace and a variable name.

llvm-svn: 60208
2008-11-28 09:29:37 +00:00
Dan Gohman 88ba5f0b96 Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190
2008-11-12 22:55:05 +00:00
Dan Gohman 191453174d Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.

In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.

llvm-svn: 58144
2008-10-25 17:46:52 +00:00
Dan Gohman 2fe6bee5b6 Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.

llvm-svn: 57748
2008-10-18 02:06:02 +00:00
Dan Gohman 9c4b7d5c4f Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
2008-10-14 20:25:08 +00:00
Dan Gohman 007a6bb9b9 Factor out the code for determining when symblic addresses
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676
2008-09-26 19:15:30 +00:00
Anton Korobeynikov 87001fd6fd Reapply 56585:56589 with proper fix for some gcc versions
llvm-svn: 56621
2008-09-25 21:00:33 +00:00
Evan Cheng 84301390ae Temporarily backing out 56585:56589 to unbreak the build.
llvm-svn: 56607
2008-09-25 07:38:08 +00:00
Anton Korobeynikov 77aa975bdd Use crazy template-based inheritance instead of virtual one.
llvm-svn: 56585
2008-09-24 22:21:39 +00:00
Owen Anderson 9371964f47 Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Anton Korobeynikov c5faeb82b5 Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)
llvm-svn: 54886
2008-08-17 13:53:59 +00:00
Dale Johannesen 30e5dbb407 Make x86-64 JIT changes Darwin-specific.
llvm-svn: 54700
2008-08-12 21:02:08 +00:00
Dale Johannesen dafdbf77b3 Some fixes for x86-64 JIT. Make it use small code
model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.

llvm-svn: 54656
2008-08-11 23:46:25 +00:00
Anton Korobeynikov 9a6ed374f8 Split X86TargetAsmInfo into 4 subtarget-specific classes
llvm-svn: 53299
2008-07-09 13:20:48 +00:00
Dan Gohman 1f2b2a4abe Remove unnecessary #includes.
llvm-svn: 52613
2008-06-22 19:21:26 +00:00
Evan Cheng 97b020e61e X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
llvm-svn: 51455
2008-05-22 23:55:24 +00:00
Dan Gohman d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Anton Korobeynikov c1534dca56 Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
llvm-svn: 50167
2008-04-23 18:23:30 +00:00
Anton Korobeynikov 2659011b70 Add X86 Maximal Stack Alignment Calculator Pass before RA
llvm-svn: 50166
2008-04-23 18:23:05 +00:00
Anton Korobeynikov a347663762 Provide a JIT selector on win64
llvm-svn: 48704
2008-03-23 13:43:47 +00:00
Anton Korobeynikov 7574ead985 Hack out the PIC mode on Win64 targets. This needs to be investigated later.
llvm-svn: 48703
2008-03-23 13:41:18 +00:00
Dan Gohman 24570836b2 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Evan Cheng 95a7be473c Added option -align-loops=<true/false> to disable loop aligner pass.
llvm-svn: 47736
2008-02-28 23:29:57 +00:00
Evan Cheng c799065cc3 Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Anton Korobeynikov 40d67c59d5 Remove bunch of gcc 4.3-related warnings from Target
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
Evan Cheng 00300ddff1 Minor fix to enable x86-64 pic jit (still fails for other reasons).
llvm-svn: 45734
2008-01-08 02:07:10 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng 345a00ba05 Preliminary PIC JIT support for X86 (32-bit) / Darwin.
llvm-svn: 45313
2007-12-22 09:40:20 +00:00
Evan Cheng db33a0211b Oops.
llvm-svn: 45312
2007-12-22 09:14:34 +00:00
Evan Cheng ac134551c6 Allow JIT with non-static relocation model.
llvm-svn: 45304
2007-12-22 01:12:14 +00:00
Dale Johannesen d1822ea7d1 Move lengthy conditional down 1 level per review comment.
llvm-svn: 40878
2007-08-06 21:48:35 +00:00
Dale Johannesen b0c7585f2d Make x86 long double alignment 32 for everything but
Darwin (which makes size within a struct==96)

llvm-svn: 40796
2007-08-03 22:46:15 +00:00
Dale Johannesen c5283ecd6f long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)

llvm-svn: 40792
2007-08-03 20:20:50 +00:00
Evan Cheng 9d5df0a5f6 Added -print-emitted-asm to print out JIT generated asm to cerr.
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
Chris Lattner 517290ae52 The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.

llvm-svn: 38463
2007-07-09 17:25:29 +00:00
Evan Cheng d00d344519 80 col. violation.
llvm-svn: 34520
2007-02-23 03:03:16 +00:00
Chris Lattner 945e437c65 Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.

llvm-svn: 34266
2007-02-14 05:52:17 +00:00
Bill Wendling 2aa9a42f24 Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).

llvm-svn: 34034
2007-02-08 01:39:44 +00:00
Evan Cheng ca5fb6e4fc Double and long preferred alignment is 8 byte.
llvm-svn: 33446
2007-01-22 23:09:50 +00:00
Chris Lattner 50ee0e40e5 Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can.  Patch by Scott Michel!

llvm-svn: 33409
2007-01-20 22:35:55 +00:00
Evan Cheng 97057f37a5 - Target PIC style is no longer affected by relocation model.
- In x86-64 mode, symbols with external linkage (not just symbols which are
  defined externally) requires GOT indirect reference.
- Stylistic code clean up.

llvm-svn: 33345
2007-01-18 22:27:12 +00:00
Bill Wendling 38ee6519b7 Revert patch.
llvm-svn: 33298
2007-01-17 09:06:13 +00:00
Bill Wendling 05e5a5ee6c Create the specified TargetObjInfo and use it.
llvm-svn: 33291
2007-01-17 03:51:37 +00:00
Anton Korobeynikov a0554d90e8 * PIC codegen for X86/Linux has been implemented
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
2007-01-12 19:20:47 +00:00
Anton Korobeynikov 4efbbc963f Really big cleanup.
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
2007-01-03 11:43:14 +00:00
Anton Korobeynikov 430e68a1b9 Refactored JIT codegen for mingw32. Now we're using standart relocation
type for distinguish JIT & non-JIT instead of "dirty" hacks :)

llvm-svn: 32745
2006-12-22 22:29:05 +00:00
Anton Korobeynikov 93acb49182 Fixed dllimported symbols support during JIT'ing. JIT on mingw32
platform should be more or less workable. At least, sim is running fine
under lli :)

llvm-svn: 32711
2006-12-20 01:03:20 +00:00
Chris Lattner 68f62b58f7 The x86-64 target machine should be used for amd64-* target triples.
llvm-svn: 32678
2006-12-19 19:40:09 +00:00
Evan Cheng dd60ca029c - Switch X86-64 JIT to large code size model.
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238
2006-12-05 19:50:18 +00:00
Evan Cheng 0c2a74a487 Non-darwin gcc should default to static relocation to match gcc.
llvm-svn: 32184
2006-12-04 18:07:10 +00:00
Bill Wendling c8e81b8d48 Removed even more std::cerr and #include <iostream> things.
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support.
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
Jim Laskey ae92ce8798 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
2006-09-07 23:39:26 +00:00
Chris Lattner 49c45d3a13 Fix some X86 JIT failures. This should really come from TargetJITInfo.
llvm-svn: 30102
2006-09-04 18:48:41 +00:00
Chris Lattner 12e97307a1 Completely rearchitect the interface between targets and the pass manager.
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
2006-09-04 04:14:57 +00:00
Chris Lattner 0fc4541c67 Simplify target construction.
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
Evan Cheng 358b9ed98a - Enable x86 isel preprocessing by default unless -fast is specified.
- Also disable isel load folding if -fast.

llvm-svn: 29956
2006-08-29 18:28:33 +00:00
Nate Begeman 3cb3921a60 Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
does emit linkable .o files in very simple cases.

llvm-svn: 29850
2006-08-23 21:08:52 +00:00
Nate Begeman d573cc7938 Disable LSR at -fast
llvm-svn: 29467
2006-08-02 05:29:40 +00:00
Chris Lattner 9e56e5c003 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng f6acb34d23 - Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
2006-07-25 20:40:54 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
2006-06-16 18:22:52 +00:00
Evan Cheng c8c172eaae Fix a build breaker.
llvm-svn: 28574
2006-05-30 21:45:53 +00:00
Owen Anderson 80b1b4d41e Make TargetData strings less redundant.
llvm-svn: 28423
2006-05-20 23:28:54 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.

llvm-svn: 28414
2006-05-20 00:24:56 +00:00
Owen Anderson 20a631fde7 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.

llvm-svn: 28074
2006-05-03 01:29:57 +00:00
Nate Begeman 3f9c17906f Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.

llvm-svn: 27539
2006-04-08 19:46:55 +00:00
Nate Begeman ed728c1291 SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
2006-03-27 01:32:24 +00:00
Chris Lattner 6f95ab7abb Eliminate IntrinsicLowering from TargetMachine.
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
2006-03-23 05:43:16 +00:00
Evan Cheng 5111c81a3c Turning on LSR by default
llvm-svn: 26861
2006-03-19 06:08:49 +00:00
Evan Cheng 20931a798e Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.

llvm-svn: 26802
2006-03-16 21:47:42 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Evan Cheng 306c13a8fb Add option -enable-x86-lsr to enable x86 loop strength reduction pass.
llvm-svn: 26665
2006-03-09 21:51:28 +00:00
Evan Cheng 73136dfecc - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Evan Cheng 06c2e6d1b3 Disable PIC for JIT.
llvm-svn: 26281
2006-02-18 01:49:25 +00:00
Nate Begeman 7e5496d5fe Kill the x86 pattern isel. boom.
llvm-svn: 26246
2006-02-17 00:03:04 +00:00
Chris Lattner a1d312c6ea remove an old comment
llvm-svn: 25940
2006-02-03 18:59:39 +00:00
Chris Lattner 23d55f2547 Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete.  yaay :)

llvm-svn: 25939
2006-02-03 18:54:24 +00:00
Evan Cheng a814f0b31c Bye bye Pattern ISel, hello DAG ISel.
llvm-svn: 25700
2006-01-27 21:26:54 +00:00