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376 Commits

Author SHA1 Message Date
Chris Lattner a70c7dff2e Validate that the input to 'Pat' patterns is sane. 
llvm-svn: 24393
 2005-11-17 17:43:52 +00:00
Chris Lattner 2a230e1c1a teach tblgen to be smart enough to handle tglobaladdr nodes 
llvm-svn: 24391
 2005-11-17 07:39:45 +00:00
Chris Lattner b22950df6c fix a tblgen bug that Evan ran into, where we would lose the '$src' name 
on patterns like "(set R32:$dst, (i32 imm:$src))"

llvm-svn: 24383
 2005-11-16 23:14:54 +00:00
Chris Lattner 64209fd14b Reject integer literals that are out of range for their type. 
llvm-svn: 24162
 2005-11-03 05:46:11 +00:00
Chris Lattner 590176be16 Add support for immediates directly in the pattern, this allows itanium to 
define:

def : Pat<(i1 1), (CMPEQ r0, r0)>;

llvm-svn: 24149
 2005-11-02 06:49:14 +00:00
Chris Lattner d91df9d941 Make negative immediates in patterns work correctly, silence some warnings 
building the itanium backend.

llvm-svn: 24095
 2005-10-29 16:39:40 +00:00
Chris Lattner 7ad0bed89f Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately 
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072
 2005-10-28 22:49:02 +00:00
Chris Lattner 802bd8d94f Use the new interface Jim added 
llvm-svn: 24071
 2005-10-28 22:43:25 +00:00
Chris Lattner f277ac7caa Condcodes are in the ISD namespace 
llvm-svn: 24010
 2005-10-26 17:02:02 +00:00
Chris Lattner 611b0c634c Add support for CondCode's 
llvm-svn: 24008
 2005-10-26 16:59:37 +00:00
Chris Lattner d980c46f52 Emit some boilerplate for targets 
llvm-svn: 23983
 2005-10-25 20:35:14 +00:00
Chris Lattner 8bda5afd91 Make tblgen emit: 
tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.

llvm-svn: 23854
 2005-10-21 01:19:59 +00:00
Chris Lattner c9ad735e78 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
 2005-10-19 04:41:05 +00:00
Chris Lattner 7f6f565846 Add basic support for integer constants in pattern results. 
llvm-svn: 23817
 2005-10-19 04:30:56 +00:00
Chris Lattner b8014e10ae Add support for patterns that have physical registers in them. Testcase: 
def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)

llvm-svn: 23815
 2005-10-19 02:07:26 +00:00
Chris Lattner c8f899f98d Asserting here is to violent 
llvm-svn: 23814
 2005-10-19 01:55:23 +00:00
Chris Lattner 8baf5043a8 Nate wants to define 'Pat's which turn into instructions that don't have 
patterns.  Certainly a logical request.

llvm-svn: 23810
 2005-10-19 01:27:22 +00:00
Chris Lattner ed653cbe43 Duraid pointed out that it is impolite to emit PPC:: into the IA64 backend 
llvm-svn: 23780
 2005-10-18 04:41:01 +00:00
Chris Lattner 825298b060 Make the generated code significantly more memory efficient, by using 
SelectNodeTo instead of getTargetNode when possible.

llvm-svn: 23758
 2005-10-16 01:41:58 +00:00
Chris Lattner 6b22d2554a Implement the last major missing piece in the DAG isel generator: when emitting 
a pattern match, make sure to emit the (minimal number of) type checks that
verify the pattern matches this specific instruction.  This allows FMA32
patterns to not match double expressions for example.

llvm-svn: 23748
 2005-10-15 21:34:21 +00:00
Chris Lattner c4db8f4163 Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.

llvm-svn: 23730
 2005-10-14 06:25:00 +00:00
Chris Lattner ecaf56b21a Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.

llvm-svn: 23729
 2005-10-14 06:12:03 +00:00
Chris Lattner cdf483556f simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner 4892df38f3 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner 7b0275ba8c Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner 366fe04301 Teach tablegen to reassociate operators when possible. This allows it to 
find all of teh pattern matches for EQV from one definition

llvm-svn: 23529
 2005-09-29 22:36:54 +00:00
Chris Lattner e86824e57a Teach tblgen to build permutations of instructions, so that the target author 
doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

llvm-svn: 23526
 2005-09-29 19:28:10 +00:00
Chris Lattner 492e70f4ec add support for an associative marker 
llvm-svn: 23502
 2005-09-28 20:58:06 +00:00
Chris Lattner 8bb25cd68a Emit an error if instructions or patterns are defined but can never match. 
Currently we check that immediate values live on the RHS of commutative
operators.  Defining ORI like this, for example:

def ORI   : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
                    "ori $dst, $src1, $src2",
                    [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;

results in:

tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501
 2005-09-28 19:27:25 +00:00
Chris Lattner f74c30c281 collect commutativity information 
llvm-svn: 23499
 2005-09-28 18:28:29 +00:00
Chris Lattner 3622f15491 Prefer cheaper patterns to more expensive ones. Print the costs to the generated 
file

llvm-svn: 23492
 2005-09-28 17:57:56 +00:00
Chris Lattner 75b4c5d868 Select Constant nodes to TargetConstant nodes 
llvm-svn: 23488
 2005-09-28 16:58:06 +00:00
Chris Lattner d455c36c91 memoize the assert results 
llvm-svn: 23457
 2005-09-26 22:10:24 +00:00
Chris Lattner c9153266c6 Emit the switch stmt cases in alphabetical order instead of pointer order, 
which is not stable.

llvm-svn: 23456
 2005-09-26 21:59:35 +00:00
Chris Lattner d5de8544f8 implement a fixme: only select values once, even if used multiple times. 
llvm-svn: 23454
 2005-09-26 21:53:26 +00:00
Jeff Cohen 23b1d28e69 Fix VC++ build errors. 
llvm-svn: 23431
 2005-09-25 19:04:43 +00:00
Chris Lattner cc1d38160d memoize translations 
llvm-svn: 23419
 2005-09-24 00:50:51 +00:00
Chris Lattner 0afb14cade Teach the DAG isel generator to emit code that creates nodes. 
Fix a few corner cases parsing things like (i32 imm:$foo)

llvm-svn: 23417
 2005-09-24 00:40:24 +00:00
Chris Lattner cd093e868e Emit better code (no more copies for var references), and support DAG patterns 
(e.g. things like rotates).

llvm-svn: 23416
 2005-09-23 23:16:51 +00:00
Chris Lattner 8ffb99b4fe Fix a fixme by passing around SDOperand's instead of SDNode*'s 
llvm-svn: 23415
 2005-09-23 21:53:45 +00:00
Chris Lattner cc8a564cb1 Emit code that matches the incoming DAG pattern and checks predicates. 
This does not check that types match yet, but PPC only has one integer type
;-).

This also doesn't have the code to build the resultant dag.

llvm-svn: 23414
 2005-09-23 21:33:23 +00:00
Chris Lattner 323a47970e emit information about the order patterns are to be matched. 
llvm-svn: 23413
 2005-09-23 20:52:47 +00:00
Chris Lattner abb430bad2 start filling in the switch stmt 
llvm-svn: 23412
 2005-09-23 19:36:15 +00:00
Chris Lattner 7884fffb00 Fix a minor bug, add comments 
llvm-svn: 23370
 2005-09-16 00:29:46 +00:00
Chris Lattner 59e96143a2 teach the type inference code how to infer types for instructions and node 
xforms.  Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).

llvm-svn: 23369
 2005-09-15 22:23:50 +00:00
Chris Lattner fedd9a5e1d put instructions into a map instead of a vector for quick lookup 
llvm-svn: 23368
 2005-09-15 21:57:35 +00:00
Chris Lattner f38ce8f756 when parsing instructions remember information about the types taken and 
returned.

llvm-svn: 23367
 2005-09-15 21:51:12 +00:00
Chris Lattner a0a986c9ae Start parsing "Pattern" nodes 
llvm-svn: 23365
 2005-09-15 21:42:00 +00:00
Chris Lattner f79ad4cb32 rename a couple of methods, add structure for pattern parsing 
llvm-svn: 23364
 2005-09-15 02:38:02 +00:00
Chris Lattner a155256a71 Verify that xform functions only occur in logical places 
llvm-svn: 23363
 2005-09-14 23:05:13 +00:00
Chris Lattner 991c7c973a Promote xform fns to be explicit nodes in result patterns, and clean off 
predicates since they will have already matched at this point.

llvm-svn: 23362
 2005-09-14 23:01:59 +00:00
Chris Lattner bc7aabce12 start building the instruction dest pattern correctly. Change the xform 
functions to preserve the Record for the xform instead of making it into a
function name.

llvm-svn: 23361
 2005-09-14 22:55:26 +00:00
Chris Lattner e389c6154e catch unnamed inputs 
llvm-svn: 23360
 2005-09-14 22:06:36 +00:00
Chris Lattner 030f876cf2 check that there are no unexpected operands 
llvm-svn: 23359
 2005-09-14 21:59:34 +00:00
Chris Lattner 3ced3f8b82 force all instruction operands to be named. 
llvm-svn: 23358
 2005-09-14 21:13:50 +00:00
Chris Lattner 24ae3494f0 fix a broke range check 
llvm-svn: 23354
 2005-09-14 21:04:12 +00:00
Chris Lattner 3ba60bf644 Parse significantly more of the instruction pattern, now collecting and 
verifying information about the operands.

llvm-svn: 23353
 2005-09-14 20:53:42 +00:00
Chris Lattner 22e60c99ce Verify that set destinations occur first in the instruction operand list. 
llvm-svn: 23351
 2005-09-14 18:19:25 +00:00
Chris Lattner 1c8d6ce015 remove some code that isn't ready for prime time 
llvm-svn: 23346
 2005-09-14 06:03:10 +00:00
Chris Lattner 3361eab530 Switch to a slightly more structured representation for instructions 
llvm-svn: 23345
 2005-09-14 04:03:16 +00:00
Chris Lattner 4cfcb544bf Add some more checking/verification code 
llvm-svn: 23344
 2005-09-14 02:11:12 +00:00
Chris Lattner 4c7b604091 start parsing instructions into patterns, start doing many more checks of 
'set's.

llvm-svn: 23343
 2005-09-14 00:09:24 +00:00
Chris Lattner bb9b01644e don't emit the namespace inside the class! 
llvm-svn: 23341
 2005-09-13 22:05:02 +00:00
Chris Lattner 70a7234111 Emit code suitable for emission into the ISel class, allowing us to use/define 
methods.

llvm-svn: 23340
 2005-09-13 22:03:37 +00:00
Chris Lattner 3556d849da continue xform function parsing 
llvm-svn: 23338
 2005-09-13 21:59:15 +00:00
Chris Lattner 2617de498d Start parsing node transformation information 
llvm-svn: 23337
 2005-09-13 21:51:00 +00:00
Chris Lattner f365e25a5c completely eliminate TreePattern::PatternType 
llvm-svn: 23335
 2005-09-13 21:20:49 +00:00
Chris Lattner ce2173d098 add an accessor to provide more checking 
llvm-svn: 23289
 2005-09-09 01:15:01 +00:00
Chris Lattner 7a82c06f34 use new accessors to simplify code. Add checking to make sure top-level instr 
definitions are void

llvm-svn: 23288
 2005-09-09 01:11:44 +00:00
Chris Lattner debd6e95ab Fix incorrect comment 
llvm-svn: 23285
 2005-09-08 23:26:30 +00:00
Chris Lattner d7d31f3b06 Implement a complete type inference system for dag patterns, based on the 
constraints defined in the DAG node definitions in the .td files.  This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file.  For example, instead of:

Inst pattern EQV:       (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))

we now fully infer:

Inst pattern EQV:       (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))

from:  (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
 2005-09-08 23:22:48 +00:00
Chris Lattner 1c33104010 Parse information about type constraints on SDNodes 
llvm-svn: 23281
 2005-09-08 21:27:15 +00:00
Chris Lattner a3b89dfcef use node info in the one place we currently use it 
llvm-svn: 23280
 2005-09-08 21:04:46 +00:00
Chris Lattner 35bcd1488a start parsing SDNode info records 
llvm-svn: 23279
 2005-09-08 21:03:01 +00:00
Chris Lattner 399f59f643 Keep names even when inlining. This allows us to realize that ADDI is: 
(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>:$imm))

not:

(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>))

(we keep the ":$imm")

llvm-svn: 23269
 2005-09-08 17:45:12 +00:00
Chris Lattner d2a5b366f5 Initial cut of the dag isel generator. This is still very much a work in 
progress.  It correctly parses instructions and pattern fragments and glues
together pattern fragments into instructions.

The only code it generates currently is some boilerplate code for things
like the EntryNode.

llvm-svn: 23261
 2005-09-07 23:44:43 +00:00