ae6ce377c2
Don't bother conditionalizing the use of SROA in -O1 mode. We're already running it unconditionally
...
later in the pipeline.
llvm-svn: 123416
2011-01-14 00:36:40 +00:00
0c34cb429e
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
...
after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
llvm-svn: 123414
2011-01-14 00:01:01 +00:00
088b30aa48
Better terminator avoidance.
...
This approach also works when the terminator doesn't have a slot index. (Which
can happen??)
llvm-svn: 123413
2011-01-13 23:35:53 +00:00
52899a9c34
Add comment about Thumb2 fixup comments being completely bogus.
...
llvm-svn: 123411
2011-01-13 23:27:39 +00:00
b1d11c19da
Add single entry / single exit accessors.
...
Add methods for accessing the (single) entry / exit edge of a region. If no such
edge exists, null is returned. Both accessors return the start block of the
corresponding edge. The edge can finally be formed by utilizing
Region::getEntry() or Region::getExit();
Contributed by: Andreas Simbuerger <simbuerg@fim.uni-passau.de>
llvm-svn: 123410
2011-01-13 23:18:04 +00:00
a098d1505d
Recognize alternative register names like ip -> r12.
...
Fixes <rdar://problem/8857982>.
llvm-svn: 123409
2011-01-13 22:50:36 +00:00
bbb1a54b84
Fix a few more places that should use MBB::getLastNonDebugInstr().
...
llvm-svn: 123408
2011-01-13 22:47:43 +00:00
ec47597ecd
As far as I can tell, unified syntax uses c0-c15 instead of cr0-cr15 for mcr and friends.
...
llvm-svn: 123407
2011-01-13 22:38:16 +00:00
b6c3aff1cb
typo
...
llvm-svn: 123406
2011-01-13 22:11:56 +00:00
b9cdf393a4
memcpy + metadata = bliss :)
...
llvm-svn: 123405
2011-01-13 22:08:15 +00:00
c3c7f5dd56
Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
...
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.
With this, we can properly pretty-print and encode assembly like:
mrc p15, #0 , r3, c13, c0, #3
Fixes <rdar://problem/8857858>.
llvm-svn: 123404
2011-01-13 21:46:02 +00:00
0447d30939
Relax an assertion. On archs like ARM, an immediate field may be scattered. So it's possible for some bits of every 8 bits to be encoded already, and the rest still needs to be fixed up.
...
llvm-svn: 123403
2011-01-13 21:45:26 +00:00
05a0b55e76
Temporary workaround for an i386 crash in LiveDebugVariables.
...
llvm-svn: 123400
2011-01-13 21:28:55 +00:00
4bc5e38960
Teach frame lowering to ignore debug values after the terminators.
...
llvm-svn: 123399
2011-01-13 21:28:52 +00:00
657f227d08
Tidy comments, indentation, and 80-column violations.
...
llvm-svn: 123397
2011-01-13 21:10:12 +00:00
328e91bbe1
Fix whitespace.
...
llvm-svn: 123396
2011-01-13 20:59:44 +00:00
b084be90e8
Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and
...
directional local labels like 1f and 2b.
llvm-svn: 123393
2011-01-13 20:32:36 +00:00
331df548c3
Little help to debug the bugpoint itself.
...
Patch by Bob Wilson.
llvm-svn: 123390
2011-01-13 19:48:54 +00:00
35f4ae26d6
Speculatively revert r123384 to make llvm-gcc-i386-linux-selfhost buildbot happy.
...
llvm-svn: 123389
2011-01-13 19:27:50 +00:00
0a1b6b8ff2
Add some platform tests.
...
Patch by arrowdodger!
llvm-svn: 123388
2011-01-13 19:17:28 +00:00
4424e7c4b8
When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly
...
set up the source operands. The original instr has an immediate operand that
should be replaced with the frame reg operand rather than just adding the
reg operand. Previously, the instruction ended up with too many operands
causing an assert() when adding the default predicate. rdar://8825456
llvm-svn: 123387
2011-01-13 19:16:48 +00:00
0e233ae183
Teach MachineBasicBlock::getFirstTerminator to ignore debug values.
...
It will still return an iterator that points to the first terminator or end(),
but there may be DBG_VALUE instructions following the first terminator.
llvm-svn: 123384
2011-01-13 18:41:05 +00:00
c8056a952e
Check for empty structs, and for consistency, zero-element arrays.
...
llvm-svn: 123383
2011-01-13 18:26:59 +00:00
08713d3c5f
Extend SROA to handle arrays accessed as homogeneous structs and vice versa.
...
This is a minor extension of SROA to handle a special case that is
important for some ARM NEON operations. Some of the NEON intrinsics
return multiple values, which are handled as struct types containing
multiple elements of the same vector type. The corresponding return
types declared in the arm_neon.h header have equivalent arrays. We
need SROA to recognize that it can split up those arrays and structs
into separate vectors, even though they are not always accessed with
the same type. SROA already handles loads and stores of an entire
alloca by using insertvalue/extractvalue to access the individual
pieces, and that code works the same regardless of whether the type
is a struct or an array. So, all that needs to be done is to check
for compatible arrays and homogeneous structs.
llvm-svn: 123381
2011-01-13 17:45:11 +00:00
12eec40c83
Make SROA more aggressive with allocas containing padding.
...
SROA only split up structs and arrays one level at a time, so padding can
only cause trouble if it is located in between the struct or array elements.
llvm-svn: 123380
2011-01-13 17:45:08 +00:00
b7c43b8c59
Disable RTTI when building unit tests. This avoids errors at link time.
...
llvm-svn: 123377
2011-01-13 15:31:45 +00:00
f8e26b123c
Platform tests for argz_* functions.
...
Patch by arrowdodger!
llvm-svn: 123376
2011-01-13 15:06:32 +00:00
ad000d8f16
Remove some wrong code which fortunately was never executed (as explained in
...
the comment I added): an extern weak global may have a null address.
llvm-svn: 123373
2011-01-13 10:43:08 +00:00
8d25a7c3a0
The most common simplification missed by instsimplify in unoptimized bitcode
...
is "X != 0 -> X" when X is a boolean. This occurs a lot because of the way
llvm-gcc converts gcc's conditional expressions. Add this, and a few other
similar transforms for completeness.
llvm-svn: 123372
2011-01-13 08:56:29 +00:00
965b3c7323
Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
...
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.
llvm-svn: 123369
2011-01-13 07:58:56 +00:00
da2d2f4d1f
Experiment with changing the default 32-bit linux stack alignment to
...
16 bytes for PR8969. Update all testcases accordingly.
llvm-svn: 123367
2011-01-13 06:47:10 +00:00
9ebe8ce68c
Keep unnamed_addr when linking.
...
llvm-svn: 123364
2011-01-13 05:12:34 +00:00
026d152e58
Reject uses of unnamed_addr in declarations.
...
llvm-svn: 123358
2011-01-13 01:30:30 +00:00
4d58d5f88f
Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 or
...
.code 32 if the TargetMachine's isThumb() boolean does not match. The correct
fix is to switch ARM subtargets at that point and is tracked by rdar://8856789
which is bigger task.
llvm-svn: 123353
2011-01-13 01:07:01 +00:00
958620dd6d
Fix r123346 to handle scalar types too.
...
llvm-svn: 123352
2011-01-13 01:06:51 +00:00
9472847bcc
Add missing space in debug output
...
llvm-svn: 123351
2011-01-13 00:57:35 +00:00
9322997b60
Change call to Error() to assert()
...
llvm-svn: 123350
2011-01-13 00:27:00 +00:00
39e36e7ab4
Style clean up - break up the breaks.
...
llvm-svn: 123347
2011-01-13 00:07:51 +00:00
6e017a1134
Apply the patch from PR8958, which allows llc to get slightly
...
further on the associated testcase before aborting.
llvm-svn: 123346
2011-01-12 23:56:26 +00:00
d9960c69b5
Support/Path: Deprecate PathV1::IsSymlink and replace all uses with PathV2::is_symlink.
...
llvm-svn: 123345
2011-01-12 23:55:06 +00:00
74ded57bb8
Try again enabling LiveDebugVariables.
...
llvm-svn: 123342
2011-01-12 23:36:21 +00:00
1455842275
Added clarifying comment
...
llvm-svn: 123341
2011-01-12 23:25:02 +00:00
e9eae0f887
JimG sez: "The value-kinds look like masks, but they're not consistently used
...
that way, unfortunately. If you want to change them to work additively instead
of a one-variant-kind-per-symbolref, that's great and I completely agree it's
worth doing, but it really should be a separate patch. Until then, this isn't
correct."
So I am reverting this bit until a more opportune time.
llvm-svn: 123340
2011-01-12 23:21:49 +00:00
e63dfeee36
Don't emit a DBG_VALUE for a spill slot that the rewriter decided not to use after all.
...
llvm-svn: 123339
2011-01-12 23:14:07 +00:00
2ffee66e10
Fix braino in dominator tree walk.
...
llvm-svn: 123338
2011-01-12 23:14:04 +00:00
1a3534afc4
Sometimes, old virtual registers can linger on DBG_VALUE instructions.
...
Make sure we don't crash in that case, but simply turn them into %noreg instead.
llvm-svn: 123335
2011-01-12 22:37:49 +00:00
013c4649c0
Teach VirtRegRewriter to update slot indexes when erasing instructions.
...
It was leaving dangling pointers in the slot index maps.
llvm-svn: 123334
2011-01-12 22:28:51 +00:00
71a3853332
Annotate VirtRegRewriter debug output with slot indexes.
...
llvm-svn: 123333
2011-01-12 22:28:48 +00:00
58b6f4d832
Verify slot index ordering.
...
The slot indexes must be monotonically increasing through the function.
llvm-svn: 123324
2011-01-12 21:27:48 +00:00
62e01eefde
Assert if anybody tries to put a slot index on a DBG_VALUE instruction.
...
llvm-svn: 123323
2011-01-12 21:27:45 +00:00
b5b4a5d0ba
Verify that machine instruction parent pointers are consistent.
...
llvm-svn: 123322
2011-01-12 21:27:41 +00:00
e6ff05c59d
Sort the register list based on the *actual* register numbers rather than the
...
enum values we give to them. <rdar://problem/8823730>
llvm-svn: 123321
2011-01-12 21:20:59 +00:00
30f3ebbc1f
Use SmallVector instead of SmallPtrSet and avoid non-deterministic behavior.
...
llvm-svn: 123318
2011-01-12 19:12:45 +00:00
3077bb64e9
Mostly undo r123297, but move the default case in EvaluateAsPCRel to the top
...
of the switch block to appease GCC.
llvm-svn: 123317
2011-01-12 18:02:55 +00:00
7ecc2fc4ca
Add another note taken from the gcc bugzilla.
...
llvm-svn: 123315
2011-01-12 09:06:19 +00:00
d964580fea
Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
...
llvm-svn: 123310
2011-01-12 05:08:36 +00:00
ee347f8091
Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to
...
ensure %o7 is not assigned as the destination of getpcx instruction.
llvm-svn: 123304
2011-01-12 03:52:59 +00:00
dd5f60b7a7
revert 123144, reenabling the rest of memset formation.
...
llvm-svn: 123302
2011-01-12 03:25:15 +00:00
3b71b0ae3d
Fix SPARC backend call instruction so that arguments passed through registers
...
are correctly marked as used instead of passing all possible argument registers
as used.
llvm-svn: 123301
2011-01-12 03:18:21 +00:00
654098f411
revert r123146 which disabled code that wasn't the root cause
...
of the bootstrap miscompare issue.
llvm-svn: 123299
2011-01-12 01:52:23 +00:00
fa7c29d255
revert r123149, reenabling an improvement to memcpyopt that wasn't
...
the source of the bootstrap problem.
llvm-svn: 123298
2011-01-12 01:43:46 +00:00
ea43172297
Prefer llvm_unreachable to assert(0)
...
llvm-svn: 123297
2011-01-12 01:42:42 +00:00
9c5b65d289
1. Support ELF pcrel relocations for movw/movt:
...
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)
llvm-svn: 123294
2011-01-12 00:19:25 +00:00
1f7bc0707d
Workaround for bug 8721.
...
.s Test added.
llvm-svn: 123292
2011-01-11 23:53:41 +00:00
43812bfa92
The world is not ready for LiveDebugVariables yet.
...
llvm-svn: 123290
2011-01-11 23:20:33 +00:00
12cc296bd4
Remove the PR8954 workaround.
...
llvm-svn: 123288
2011-01-11 22:56:41 +00:00
f2407aa98b
Fix a non-deterministic loop in llvm::MergeBlockIntoPredecessor.
...
DT->changeImmediateDominator() trivially ignores identity updates, so there is
really no need for the uniqueing provided by SmallPtrSet.
I expect this to fix PR8954.
llvm-svn: 123286
2011-01-11 22:54:38 +00:00
8c98495f43
Enable LiveDebugVariables by default.
...
llvm-svn: 123282
2011-01-11 22:45:28 +00:00
4d6ade0e31
SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CC
...
llvm-svn: 123281
2011-01-11 22:38:28 +00:00
cb9c4f85ec
Dial back the speculative fix for PR8954 a bit, so that we only recompute dominators
...
once at the beginning of GVN instead of once per iteration.
llvm-svn: 123278
2011-01-11 22:14:42 +00:00
803f48bcd1
Don't insert DBG_VALUE instructions after the first terminator.
...
For one, MachineBasicBlock::getFirstTerminator() doesn't understand what is
happening, and it also makes sense to have all control flow run through the
DBG_VALUE.
llvm-svn: 123277
2011-01-11 22:11:16 +00:00
e45d685895
Clean up ARM subtarget code by using Triple ADT.
...
llvm-svn: 123276
2011-01-11 21:46:47 +00:00
447cb38fbe
Appropriately truncate debug info range in dwarf output.
...
This is not yet completely enabled.
llvm-svn: 123274
2011-01-11 21:42:10 +00:00
819eb4ed0b
Put the Dominator improvements back in. They were not the cause of bootstrap miscomparisons.
...
llvm-svn: 123273
2011-01-11 21:23:09 +00:00
51eb403907
Attempt to fix the bootstrap buildbot. Rafael says this works for him on x86-64 Linux.
...
llvm-svn: 123270
2011-01-11 20:23:34 +00:00
32bd3a1e9a
Speculatively revert the recent improvements to Dominators.h in an attempt to track down the gcc bootstrap miscompare.
...
llvm-svn: 123254
2011-01-11 19:26:30 +00:00
09264124c1
McARM: Fill in GetMnemonicAcceptInfo().
...
llvm-svn: 123253
2011-01-11 19:06:29 +00:00
6492807291
McARM: Write a silly Python script to compute some hard coded info from the
...
generated ARM match table, which is substantially more efficient than dealing
with tblgen.
llvm-svn: 123252
2011-01-11 19:06:26 +00:00
0022a4b417
Remove dead variable, const-ref-ize an APInt.
...
llvm-svn: 123248
2011-01-11 18:26:37 +00:00
d41db8f9cb
this pass claims to preserve scev, make sure to tell it about deletions.
...
llvm-svn: 123247
2011-01-11 18:14:50 +00:00
e5863d6639
Fix a comment: We now have intrinsics for vcvtr.
...
llvm-svn: 123246
2011-01-11 17:56:41 +00:00
d30de95520
some comment improvements.
...
llvm-svn: 123243
2011-01-11 17:11:59 +00:00
abd2dfd3dc
Fix PR8946, a missing reg/reg form of movdqu.
...
llvm-svn: 123242
2011-01-11 17:04:55 +00:00
5a384c86b2
McARM: Sketch some logic for determining when to add carry set and predication code operands based on the "canonical mnemonic".
...
llvm-svn: 123239
2011-01-11 15:59:53 +00:00
9d944b3fcc
McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the
...
carry setting flag from the mnemonic.
Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.
llvm-svn: 123238
2011-01-11 15:59:50 +00:00
c8adf5f458
FixedNumOperandTraits and VariadicOperandTraits assumed that, given a
...
"this" pointer for any subclass of User, you could static_cast it to
User* and then reinterpret_cast that to Use* to get the end of the
operand list. This isn't a safe assumption in general, because the
static_cast might adjust the "this" pointer. Fixed by having these
OperandTraits classes take an extra template parameter, which is the
subclass of User. This is groundwork for PR889.
llvm-svn: 123235
2011-01-11 15:07:38 +00:00
8e158495f1
Factor the actual simplification out of SimplifyIndirectBrOnSelect and into a new helper function so it can be reused in e.g. an upcoming SimplifySwitchOnSelect.
...
No functional change.
llvm-svn: 123234
2011-01-11 12:52:11 +00:00
c8cb58e130
Add to the CMake build some options and platform tests supported by
...
the traditional build.
Patch by arrowdodger!
llvm-svn: 123233
2011-01-11 12:31:54 +00:00
77c4f70123
Made llvm_replace_compiler_option more robust. Use it on
...
llvm_process_sources.
llvm-svn: 123232
2011-01-11 12:31:34 +00:00
a5538cdbf9
Fix a thinko in 123226 that caused test failures on "other" platforms.
...
llvm-svn: 123229
2011-01-11 11:27:56 +00:00
31bb4c5811
Revert the testcase from the previous reverted commit.
...
llvm-svn: 123227
2011-01-11 09:20:44 +00:00
be9ad1e631
Add a "nop filler" pass to SPU.
...
Filling no-ops is done just before emitting of assembly,
when the instruction stream is final. No-ops are inserted
to align the instructions so the dual-issue of the pipeline
is utilized. This speeds up generated code with a minimum of
1% on a select set of algorithms.
This pass may be redundant if the instruction scheduler and
all subsequent passes that modify the instruction stream
(prolog+epilog inserter, register scavenger, are there others?)
are made aware of the instruction alignments.
llvm-svn: 123226
2011-01-11 09:07:54 +00:00
23bf3bafb7
Temporarily revert 123133, it's causing some regressions and I'm trying
...
to get a testcase.
llvm-svn: 123225
2011-01-11 09:02:09 +00:00
193ce7c4d1
update memdep when an instruction is deleted. This code isn't
...
actually reached in the testcase in PR8954, but it's safe and good
practice.
llvm-svn: 123224
2011-01-11 08:19:16 +00:00
e2523b287c
when MergeBlockIntoPredecessor merges two blocks, update MemDep if it
...
is floating around in the ether.
llvm-svn: 123223
2011-01-11 08:16:49 +00:00
f6ae904e34
Fix FoldSingleEntryPHINodes to update memdep and AA when it deletes
...
phi nodes. It is called from MergeBlockIntoPredecessor which is
called from GVN, which claims to preserve these.
I'm skeptical that this is the actual problem behind PR8954, but
this is a stab in the right direction.
llvm-svn: 123222
2011-01-11 08:13:40 +00:00
dfcfcb49fa
random cleanups
...
llvm-svn: 123221
2011-01-11 08:00:40 +00:00
054d2a8525
merge tests into one crash.ll test.
...
llvm-svn: 123220
2011-01-11 07:50:07 +00:00
63fe78de68
remove a bogus assertion: the latch block of a loop is not
...
neccesarily an uncond branch to the header. This fixes
PR8955 (the assertion tripping).
llvm-svn: 123219
2011-01-11 07:47:59 +00:00
23109cb319
the GEP faq says that only inbounds geps are guaranteed to not overflow.
...
llvm-svn: 123218
2011-01-11 06:44:41 +00:00
087f207009
Revert r123207: "Turn on memdep's verifyRemoved() in an attempt to smoke out the cause of our gcc bootstrap miscompare."
...
It didn't.
llvm-svn: 123215
2011-01-11 04:05:39 +00:00
0d771edeee
Support/Path: Deprecate PathV1::isDirectory and replace all uses with PathV2::is_directory.
...
llvm-svn: 123209
2011-01-11 01:21:55 +00:00
9b6853efd6
Turn on memdep's verifyRemoved() in an attempt to smoke out the cause of our gcc bootstrap miscompare.
...
llvm-svn: 123207
2011-01-11 01:18:03 +00:00
b1e7f557b7
Teach constant folding to perform conversions from constant floating
...
point values to their integer representation through the SSE intrinsic
calls. This is the last part of a README.txt entry for which I have real
world examples.
llvm-svn: 123206
2011-01-11 01:07:24 +00:00
fdf4969149
FileCheck-ize a test, and move a no-longer calling test case to another
...
file and make it actually test something...
llvm-svn: 123205
2011-01-11 01:07:20 +00:00
d490c2d2ae
Fix a random missed optimization by making InstCombine more aggressive when determining which bits are demanded by
...
a comparison against a constant.
llvm-svn: 123203
2011-01-11 00:36:45 +00:00
1bb2c00f65
Move ExpandAtomic into the integer expansion routines - it's only used there.
...
llvm-svn: 123202
2011-01-11 00:36:08 +00:00
3904343c68
Even if we don't have 7 bytes of stack space we may need to save and
...
restore the stack pointer from the frame pointer on thumbv6.
Fixes rdar://8819685
llvm-svn: 123196
2011-01-11 00:16:04 +00:00
d5bbeba8d0
Expand on the safeness of restoring the sp from the fp a bit more.
...
llvm-svn: 123193
2011-01-10 23:10:59 +00:00
d2b48119b0
Fix PR 8916 (qv for analysis), at least the immediate problem.
...
There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.
llvm-svn: 123191
2011-01-10 21:53:07 +00:00
78cdd2a6c6
+0.0 vs -0.0 differences can be handled by looking at the user of the
...
operation in some cases.
llvm-svn: 123190
2011-01-10 21:01:17 +00:00
c0e8756ba9
McARM: Flush out hard coded known non-predicated mnemonic list.
...
llvm-svn: 123189
2011-01-10 21:01:03 +00:00
2d01239fe7
McARM: Mark some T2 ...s instructions as codegen only, they aren't real
...
instructions but are restricted pseudo forms.
llvm-svn: 123177
2011-01-10 15:26:39 +00:00
6e3aedd830
ARM/MC: Mark several '...S' instructions as codegen only, they aren't real
...
instructions but are restricted pseudo forms.
llvm-svn: 123176
2011-01-10 15:26:35 +00:00
2be732ab5f
MC/ARM/AsmParser: Minor nitty fixes.
...
llvm-svn: 123175
2011-01-10 15:26:21 +00:00
4035383937
MC/AsmMatcher: Fix indirect 80-col viola.
...
llvm-svn: 123174
2011-01-10 15:26:11 +00:00
5fb942a307
Fix merge fallout
...
llvm-svn: 123172
2011-01-10 12:56:18 +00:00
441ae5b88c
Update CMake stuff
...
llvm-svn: 123171
2011-01-10 12:39:23 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
...
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
876bb0180f
MC/ARM/AsmParser: Split out SplitMnemonicAndCC().
...
llvm-svn: 123169
2011-01-10 12:24:52 +00:00
352d9b14b3
Cleanup some of the constant folding code to consistently test intrinsic
...
IDs when available rather than using a mixture of IDs and textual name
comparisons.
llvm-svn: 123165
2011-01-10 09:02:58 +00:00
6c8b8dd522
fit in 80 cols and use MBB::isSuccessor instead of a hand
...
rolled std::find.
llvm-svn: 123164
2011-01-10 07:51:31 +00:00
cf414cf0a6
Teach instcombine about the rest of the SSE and SSE2 conversion
...
intrinsics element dependencies. Reviewed by Nick.
llvm-svn: 123161
2011-01-10 07:19:37 +00:00
2fb5b31578
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
...
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
2011-01-10 02:58:51 +00:00
7bb282ebb1
Fold two related tests into the newly FileCheck-ized test, migrating
...
them to FileCheck as well.
llvm-svn: 123154
2011-01-10 02:53:58 +00:00
ef7aac5961
Clean up and FileCheck-ize a test.
...
llvm-svn: 123153
2011-01-10 02:53:54 +00:00
83bd49d4f9
Fix Whitespace.
...
llvm-svn: 123152
2011-01-10 02:34:40 +00:00
58df2e00b2
Support/Path: Deprecate PathV1::exists and replace all uses with PathV2::fs::exists.
...
llvm-svn: 123151
2011-01-10 02:34:23 +00:00
88bc848ab6
another random stab in the dark trying to fix llvm-gcc-i386-linux-selfhost
...
llvm-svn: 123149
2011-01-10 02:34:11 +00:00
ec1387cf4b
fix typo
...
llvm-svn: 123148
2011-01-10 02:33:34 +00:00
4662bd4b13
another (more) aggressive attempt to bring llvm-gcc-i386-linux-selfhost
...
back to life.
llvm-svn: 123146
2011-01-10 00:47:34 +00:00
eef1455020
expand on a note
...
llvm-svn: 123145
2011-01-10 00:33:01 +00:00
1017fa6746
temporarily disable memset formation from memsets in an effort to restore buildbot stability.
...
llvm-svn: 123144
2011-01-09 23:52:48 +00:00
1032965cbe
add a testcase I missed in previous commit.
...
llvm-svn: 123143
2011-01-09 23:52:31 +00:00
5b358c6825
typo
...
llvm-svn: 123142
2011-01-09 23:48:41 +00:00
320370e3ca
xref a PR #
...
llvm-svn: 123141
2011-01-09 23:42:22 +00:00
8786bda222
Remove TargetRegisterInfo::NoRegister.
...
Fix the TargetRegisterInfo::NoRegister places where someone preferred
typing 'TargetRegisterInfo::NoRegister' instead of typing '0'.
Note that TableGen is already emitting xx::NoRegister in xxGenRegisterNames.inc.
llvm-svn: 123140
2011-01-09 23:20:48 +00:00
67f82314af
add a fixme: ir isn't expressive enough.
...
llvm-svn: 123139
2011-01-09 23:02:10 +00:00
28f140a33e
Step #4 in improving trip count analysis: HowFarToZero can analyze
...
NUW AddRec's much more aggressively. We now get a trip count
for @test2 in nsw.ll
llvm-svn: 123138
2011-01-09 22:58:47 +00:00
8828e482b6
Change virtual register numbering to make more space for physical registers.
...
The numbering plan is now:
0 NoRegister.
[1;2^30) Physical registers.
[2^30;2^31) Stack slots.
[2^31;2^32) Virtual registers. (With -1u and -2u used by DenseMapInfo.)
Each segment is filled from the left, so any mistaken interpretation should
quickly cause crashes.
FirstVirtualRegister has been removed. TargetRegisterInfo provides predicates
conversion functions that should be used instead of interpreting register
numbers manually.
It is now legal to pass NoRegister to isPhysicalRegister() and
isVirtualRegister(). The result is false in both cases.
It is quite rare to represent stack slots in this way, so isPhysicalRegister()
and isVirtualRegister() require that isStackSlot() be checked first if it can
possibly return true. This allows a very fast implementation of the common
predicates.
llvm-svn: 123137
2011-01-09 22:42:48 +00:00
dff679f4b6
rearrange some code, no functionality change.
...
llvm-svn: 123136
2011-01-09 22:39:48 +00:00
d011d5317c
Add a note about the inability to model FP -> int conversions which
...
perform rounding other than truncation in the IR. Common C code for this
turns into really an LLVM intrinsic call that blocks a lot of further
optimizations.
llvm-svn: 123135
2011-01-09 22:36:18 +00:00
a44274cb4f
Step #3 to improving trip count analysis: If we fold
...
a + {b,+,stride} into {a+b,+,stride} (because a is LIV),
then the resultant AddRec is NUW/NSW if the client says it
is.
llvm-svn: 123133
2011-01-09 22:31:26 +00:00
fc87752d55
Step #2 to improve trip count analysis for loops like this:
...
void f(int* begin, int* end) { std::fill(begin, end, 0); }
which turns into a != exit expression where one pointer is
strided and (thanks to step #1 ) known to not overflow, and
the other is loop invariant.
The observation here is that, though the IV is strided by
4 in this case, that the IV *has* to become equal to the
end value. It cannot "miss" the end value by stepping over
it, because if it did, the strided IV expression would
eventually wrap around.
Handle this by turning A != B into "A-B != 0" where the A-B
part is known to be NUW.
llvm-svn: 123131
2011-01-09 22:26:35 +00:00
d82ac37594
Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
...
when no virtual registers have been allocated.
It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that
Map.grow(MRI.getLastVirtReg());
can be replaced with the simpler
Map.resize(MRI.getNumVirtRegs());
This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.
llvm-svn: 123130
2011-01-09 21:58:20 +00:00
878665b4bc
sort this.
...
llvm-svn: 123129
2011-01-09 21:31:39 +00:00
b83a6b23dc
Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and
...
physical register numbers.
This makes the hack used in LiveInterval official, and lets LiveInterval be
oblivious of stack slots.
The isPhysicalRegister() and isVirtualRegister() predicates don't know about
this, so when a variable may contain a stack slot, isStackSlot() should always
be tested first.
llvm-svn: 123128
2011-01-09 21:17:37 +00:00
0c68a668fa
Add a note about a missed FP optimization.
...
llvm-svn: 123126
2011-01-09 21:00:19 +00:00
8145f85633
Fix comment.
...
llvm-svn: 123125
2011-01-09 19:45:45 +00:00
caf5c0d037
fix a few old bugs (found by inspection) where we would zap instructions
...
without informing memdep. This could cause nondeterminstic weirdness
based on where instructions happen to get allocated, and will hopefully
breath some life into some broken testers.
llvm-svn: 123124
2011-01-09 19:26:10 +00:00
d65524da0f
Add a forgotten VireReg2IndexFunctor.
...
llvm-svn: 123123
2011-01-09 18:58:33 +00:00
45539edad2
Apply -fPIC to C sources too.
...
llvm-svn: 123122
2011-01-09 17:38:31 +00:00
cc21c4aa98
Instcombine: Fix pattern where the sext did not dominate the icmp using it
...
llvm-svn: 123121
2011-01-09 16:00:11 +00:00
bc453f6e18
DominatorTree->print() now prints the status of the DFSNumbers correctly
...
llvm-svn: 123120
2011-01-09 16:00:09 +00:00
edfc184222
Rewrite handling of LLVM_ENABLE_PIC. It was being processed after
...
config.h was generated, so it had no effect on it.
Thanks to arrowdodger for pointing out this and a tentative patch.
llvm-svn: 123119
2011-01-09 14:34:39 +00:00
a42e5915bf
LoopInstSimplify preserves LoopSimplify.
...
llvm-svn: 123117
2011-01-09 12:35:16 +00:00
82e6f6a325
Another missed memset in std::vector initialization.
...
llvm-svn: 123116
2011-01-09 11:29:57 +00:00
8a00d8175b
Eliminate some extra hash table lookups.
...
llvm-svn: 123115
2011-01-09 10:54:21 +00:00
a5910d1b31
Add an informative comment.
...
llvm-svn: 123114
2011-01-09 10:32:30 +00:00
43f6d1b67e
Fix a cut-paste-o so that the sample code is correct for my last note.
...
Also, switch to a more clear 'sink' function with its declaration to
avoid any confusion about 'g'. Thanks for the suggestion Frits.
llvm-svn: 123113
2011-01-09 10:10:59 +00:00
ad6e1f0501
Another missed optimization of trivial vector code.
...
llvm-svn: 123112
2011-01-09 09:58:36 +00:00
f32619300a
Add a note about vector's size-constructor producing dead stores.
...
llvm-svn: 123111
2011-01-09 09:58:33 +00:00
9adf5e09cd
Simplify LiveDebugVariables by storing MachineOperand copies locations instead
...
of using a Location class with the same information.
When making a copy of a MachineOperand that was already stored in a
MachineInstr, it is necessary to clear the parent pointer on the copy. Otherwise
the register use-def lists become inconsistent.
Add MachineOperand::clearParent() to do that. An alternative would be a custom
MachineOperand copy constructor that cleared ParentMI. I didn't want to do that
because of the performance impact.
llvm-svn: 123109
2011-01-09 05:33:21 +00:00
3a9e5c29c8
Shrink a BitVector that didn't mean to store bits for all physical registers.
...
llvm-svn: 123108
2011-01-09 03:45:44 +00:00
1331a15b0c
Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
...
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.
llvm-svn: 123107
2011-01-09 03:05:53 +00:00
7f93d8d62c
Use IndexedMap for MachineRegisterInfo as well. No functional change.
...
llvm-svn: 123106
2011-01-09 03:05:46 +00:00
10223a3fbf
teach SCEV analysis of PHI nodes that PHI recurences formed
...
with GEP instructions are always NUW, because PHIs cannot wrap
the end of the address space.
llvm-svn: 123105
2011-01-09 02:28:48 +00:00
a337f5ec5c
reduce indentation. Print <nuw> and <nsw> when dumping SCEV AddRec's
...
that have the bit set.
llvm-svn: 123104
2011-01-09 02:16:18 +00:00
5d684c17a7
Add a note about a missed memset optimization from std::fill.
...
llvm-svn: 123103
2011-01-09 01:32:55 +00:00
4a7b48d5f4
Fix the last virtual register enumerations.
...
llvm-svn: 123102
2011-01-08 23:11:11 +00:00
cf4d5ced0f
Fix VirtRegMap to use TRI::index2VirtReg and TRI::virtReg2Index instead of
...
depending on TRI::FirstVirtualRegister.
Also use TRI::printReg instead of printing virtual registers directly.
llvm-svn: 123101
2011-01-08 23:11:07 +00:00
6ff70ad356
Fix a MachineVerifier loop that probably didn't mean to skip the last two
...
virtual registers.
llvm-svn: 123100
2011-01-08 23:11:02 +00:00
d3438eb27d
Don't document exactly how virtual registers are represented as integers. Code
...
shouldn't depend directly on that.
Give an example of how to iterate over all virtual registers in a function
without depending on the representation.
llvm-svn: 123099
2011-01-08 23:10:59 +00:00
28d76692b6
Use an IndexedMap for LiveVariables::VirtRegInfo.
...
Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow
iteration over virtual registers without depending on the representation of
virtual register numbers.
llvm-svn: 123098
2011-01-08 23:10:57 +00:00
a1e03cfba7
Do not talk about TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 123097
2011-01-08 23:10:53 +00:00
793d7b7626
Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 123096
2011-01-08 23:10:50 +00:00
0939bc3709
Fix coding style.
...
llvm-svn: 123093
2011-01-08 22:36:53 +00:00
7d6433ae76
fix a latent bug in memcpyoptimizer that my recent patches exposed: it wasn't
...
updating memdep when fusing stores together. This fixes the crash optimizing
the bullet benchmark.
llvm-svn: 123091
2011-01-08 22:19:21 +00:00
ff6ed2ac5f
tryMergingIntoMemset can only handle constant length memsets.
...
llvm-svn: 123090
2011-01-08 22:11:56 +00:00
9a1d63ba9f
Merge memsets followed by neighboring memsets and other stores into
...
larger memsets. Among other things, this fixes rdar://8760394 and
allows us to handle "Example 2" from http://blog.regehr.org/archives/320 ,
compiling it into a single 4096-byte memset:
_mad_synth_mute: ## @mad_synth_mute
## BB#0: ## %entry
pushq %rax
movl $4096, %esi ## imm = 0x1000
callq ___bzero
popq %rax
ret
llvm-svn: 123089
2011-01-08 21:19:19 +00:00
5120ebf184
fix an issue in IsPointerOffset that prevented us from recognizing that
...
P and P+1 are relative to the same base pointer.
llvm-svn: 123087
2011-01-08 21:07:56 +00:00
4dc1fd938f
enhance memcpyopt to merge a store and a subsequent
...
memset into a single larger memset.
llvm-svn: 123086
2011-01-08 20:54:51 +00:00
2f2c3351e1
fit in 80 cols
...
llvm-svn: 123085
2011-01-08 20:53:41 +00:00
9dbbc49f74
merge two tests and filecheckify
...
llvm-svn: 123082
2011-01-08 20:27:22 +00:00
c638147e9f
constify TargetData references.
...
Split memset formation logic out into its own
"tryMergingIntoMemset" helper function.
llvm-svn: 123081
2011-01-08 20:24:01 +00:00
59c82f850d
When loop rotation happens, it is *very* common for the duplicated condbr
...
to be foldable into an uncond branch. When this happens, we can make a
much simpler CFG for the loop, which is important for nested loop cases
where we want the outer loop to be aggressively optimized.
Handle this case more aggressively. For example, previously on
phi-duplicate.ll we would get this:
define void @test(i32 %N, double* %G) nounwind ssp {
entry:
%cmp1 = icmp slt i64 1, 1000
br i1 %cmp1, label %bb.nph, label %for.end
bb.nph: ; preds = %entry
br label %for.body
for.body: ; preds = %bb.nph, %for.cond
%j.02 = phi i64 [ 1, %bb.nph ], [ %inc, %for.cond ]
%arrayidx = getelementptr inbounds double* %G, i64 %j.02
%tmp3 = load double* %arrayidx
%sub = sub i64 %j.02, 1
%arrayidx6 = getelementptr inbounds double* %G, i64 %sub
%tmp7 = load double* %arrayidx6
%add = fadd double %tmp3, %tmp7
%arrayidx10 = getelementptr inbounds double* %G, i64 %j.02
store double %add, double* %arrayidx10
%inc = add nsw i64 %j.02, 1
br label %for.cond
for.cond: ; preds = %for.body
%cmp = icmp slt i64 %inc, 1000
br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
for.cond.for.end_crit_edge: ; preds = %for.cond
br label %for.end
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
ret void
}
Now we get the much nicer:
define void @test(i32 %N, double* %G) nounwind ssp {
entry:
br label %for.body
for.body: ; preds = %entry, %for.body
%j.01 = phi i64 [ 1, %entry ], [ %inc, %for.body ]
%arrayidx = getelementptr inbounds double* %G, i64 %j.01
%tmp3 = load double* %arrayidx
%sub = sub i64 %j.01, 1
%arrayidx6 = getelementptr inbounds double* %G, i64 %sub
%tmp7 = load double* %arrayidx6
%add = fadd double %tmp3, %tmp7
%arrayidx10 = getelementptr inbounds double* %G, i64 %j.01
store double %add, double* %arrayidx10
%inc = add nsw i64 %j.01, 1
%cmp = icmp slt i64 %inc, 1000
br i1 %cmp, label %for.body, label %for.end
for.end: ; preds = %for.body
ret void
}
With all of these recent changes, we are now able to compile:
void foo(char *X) {
for (int i = 0; i != 100; ++i)
for (int j = 0; j != 100; ++j)
X[j+i*100] = 0;
}
into a single memset of 10000 bytes. This series of changes
should also be helpful for other nested loop scenarios as well.
llvm-svn: 123079
2011-01-08 19:59:06 +00:00
5f7734c4a5
make domtree verification print something useful on failure.
...
llvm-svn: 123078
2011-01-08 19:55:55 +00:00
30f318e5d1
split ssa updating code out to its own helper function. Don't bother
...
moving the OrigHeader block anymore: we just merge it away anyway so
its code layout doesn't matter.
llvm-svn: 123077
2011-01-08 19:26:33 +00:00
2615130e1d
Implement a TODO: Enhance loopinfo to merge away the unconditional branch
...
that it was leaving in loops after rotation (between the original latch
block and the original header.
With this change, it is possible for rotated loops to have just a single
basic block, which is useful.
llvm-svn: 123075
2011-01-08 19:10:28 +00:00
930b716e1b
various code cleanups, enhance MergeBlockIntoPredecessor to preserve
...
loop info.
llvm-svn: 123074
2011-01-08 19:08:40 +00:00
fee37c5fa3
inline preserveCanonicalLoopForm now that it is simple.
...
llvm-svn: 123073
2011-01-08 18:55:50 +00:00
063dca0f6a
Three major changes:
...
1. Rip out LoopRotate's domfrontier updating code. It isn't
needed now that LICM doesn't use DF and it is super complex
and gross.
2. Make DomTree updating code a lot simpler and faster. The
old loop over all the blocks was just to find a block??
3. Change the code that inserts the new preheader to just use
SplitCriticalEdge instead of doing an overcomplex
reimplementation of it.
No behavior change, except for the name of the inserted preheader.
llvm-svn: 123072
2011-01-08 18:52:51 +00:00
30d95f9f87
reduce nesting.
...
llvm-svn: 123071
2011-01-08 18:47:43 +00:00
7c9eab8fef
On Windows, replace each occurrence of '\' by '\\' on the replacement string. This is necessary to prevent re.sub from replacing escape sequences occurring in path.
...
For example:
llvm\tools\clang\test
was replaced by
llvm <tab> ools\clang <tab> est
llvm-svn: 123070
2011-01-08 18:09:48 +00:00
7fab23bc1d
LoopRotate requires canonical loop form, so it always has preheaders
...
and latch blocks. Reorder entry conditions to make hte pass faster
and more logical.
llvm-svn: 123069
2011-01-08 18:06:22 +00:00
d62691f4e8
use the LI ivar.
...
llvm-svn: 123068
2011-01-08 17:49:51 +00:00
385f2ec6d8
some cleanups: remove dead arguments and eliminate ivars
...
that are just passed to one function.
llvm-svn: 123067
2011-01-08 17:48:33 +00:00
25ba40a0cc
fix an issue duncan pointed out, which could cause loop rotate
...
to violate LCSSA form
llvm-svn: 123066
2011-01-08 17:38:45 +00:00
b4ab257bcc
Fix coding style issues.
...
llvm-svn: 123065
2011-01-08 17:07:11 +00:00
84986b298a
Make more passes preserve dominators (or state that they preserve dominators if
...
they all ready do). This removes two dominator recomputations prior to isel,
which is a 1% improvement in total llc time for 403.gcc.
The only potentially suspect thing is making GCStrategy recompute dominators if
it used a custom lowering strategy.
llvm-svn: 123064
2011-01-08 17:01:52 +00:00
Owen Anderson