Commit Graph

209727 Commits

Author SHA1 Message Date
Jakub Kuderski f50ab0ffce findDominatingStoreToReturn in CGCall.cpp didn't check if a candidate store
instruction used the ReturnValue as pointer operand or value operand. This
led to wrong code gen - in later stages (load-store elision code) the found
store and its operand would be erased, causing ReturnValue to become a <badref>.

The patch adds a check that makes sure that ReturnValue is a pointer operand of
store instruction. Regression test is also added.

This fixes PR24386.
Differential Revision: http://reviews.llvm.org/D12400

llvm-svn: 247003
2015-09-08 10:36:42 +00:00
Alexander Kornienko 3f1153869f [clang-tidy] Fix run-clang-tidy.py.
Do not add "-*" to the list of checks. Make consistent the list of enabled
checks and the checks in use. Moreover, removing "-*" makes the behaviour
consistent with clang-tidy and allows user to use .clang-tidy configuration...

http://reviews.llvm.org/D12687

Patch by Marek Kurdej!

llvm-svn: 247002
2015-09-08 10:31:36 +00:00
Manuel Klimek 7a2ba47fbf Update code owners for AST matchers / libtooling.
llvm-svn: 247001
2015-09-08 10:31:09 +00:00
Abhishek Aggarwal 139a096dce Bug 24733: TestRegisters.py for Clang inferiors
Summary:
  - Bug 24457 can now be tested for inferiors compiled
    by clang compiler also.
    
  - A generic test case for GCC and Clang inferiors:
    -- Works even when Clang and GCC produce different
       assembly for the same inferior.
  
  - Refer Differential Revision: http://reviews.llvm.org/D12677

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>
llvm-svn: 247000
2015-09-08 10:19:37 +00:00
Zoran Jovanovic 9eaa30d2bf [mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructions
Differential Revision: http://reviews.llvm.org/D11801

llvm-svn: 246999
2015-09-08 10:18:38 +00:00
Manuel Klimek e67a9d6d24 Fix documentation of numSelectorArgs.
Currently, the documentation for numSelectorArgs includes an incorrect
example. It shows a case where an argument of 1 will match a property
getter, but a getter will be matched only when N == 0.

This diff corrects the documentation and adds a test for numSelectorArgs(0).

Patch by Dave Lee.

llvm-svn: 246998
2015-09-08 10:11:26 +00:00
Jakub Kuderski 7cd4810021 There is a trunc(lshr (zext A), Cst) optimization in InstCombineCasts that
removes cast by performing the lshr on smaller types. However, currently there
is no trunc(lshr (sext A), Cst) variant.
This patch add such optimization by transforming trunc(lshr (sext A), Cst)
to ashr A, Cst.

Differential Revision: http://reviews.llvm.org/D12520

llvm-svn: 246997
2015-09-08 10:03:17 +00:00
Alexander Kornienko d96d89f6e5 [clang-tidy] Updated docs.
llvm-svn: 246996
2015-09-08 09:44:04 +00:00
NAKAMURA Takumi ff7a9252e8 clangCodeGen: Fix comments. [-Wdocumentation]
llvm-svn: 246995
2015-09-08 09:42:41 +00:00
NAKAMURA Takumi f7bee71c26 Fix clang/test/CodeGen/mips-varargs.c for -Asserts, possibly typo.
llvm-svn: 246994
2015-09-08 09:37:09 +00:00
John McCall e78e08a92b Another fix to this test, this one apparently working by
coincidence on all bots.

llvm-svn: 246993
2015-09-08 09:33:33 +00:00
NAKAMURA Takumi c88d2fac7c Fix clang/test/CodeGenCXX/alignment.cpp for -Asserts.
llvm-svn: 246992
2015-09-08 09:31:04 +00:00
John McCall 999110f903 When building the alloca for a local variable, set its name
separately from building the instruction so that it's
preserved even in -Asserts builds.

Employ C++'s mystical "comment" feature to discourage
breaking this in the future.

llvm-svn: 246991
2015-09-08 09:18:30 +00:00
Daniel Sanders 808dfb8ba7 [mips] Reserve address spaces 1-255 for software use.
Summary: And define them to have noop casts with address spaces 0-255.

Reviewers: pekka.jaaskelainen

Subscribers: pekka.jaaskelainen, llvm-commits

Differential Revision: http://reviews.llvm.org/D12678

llvm-svn: 246990
2015-09-08 09:07:03 +00:00
Angel Garcia Gomez d930ef76ea Avoid using rvalue references with trivially copyable types.
Summary:
When the dereference operator returns a value that is trivially
copyable (like a pointer), copy it. After this change, modernize-loop-convert
check can be applied to the whole llvm source code without breaking any build
or test.

Reviewers: alexfh, klimek

Subscribers: alexfh, cfe-commits

Differential Revision: http://reviews.llvm.org/D12675

llvm-svn: 246989
2015-09-08 09:01:21 +00:00
John McCall f1044c044a Remove unnecessary braces; this resolves against a
single-pointer overload instead of the ArrayRef one.

llvm-svn: 246988
2015-09-08 08:57:00 +00:00
Zoran Jovanovic 68be5f21a9 [mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit LBU16, LHU16, LW16, LWGP and LWSP instructions
Differential Revision: http://reviews.llvm.org/D10956

llvm-svn: 246987
2015-09-08 08:25:34 +00:00
John McCall bd96e98af7 Move BlockByrefHelpers back to CodeGenModule.h to placate MSVC.
llvm-svn: 246986
2015-09-08 08:21:11 +00:00
John McCall 7f416cc426 Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment.  Introduce APIs on CGBuilderTy to work with Address
values.  Change core APIs on CGF/CGM to traffic in Address where
appropriate.  Require alignments to be non-zero.  Update a ton
of code to compute and propagate alignment information.

As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.

The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned.  Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay.  I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.

Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.

We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment.  In particular,
field access now uses alignmentAtOffset instead of min.

Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs.  For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint.  That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.

ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments.  In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments.  That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.

I partially punted on applying this work to CGBuiltin.  Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.

llvm-svn: 246985
2015-09-08 08:05:57 +00:00
NAKAMURA Takumi bb7483dd77 [CMake][CMP0051] Avoid for user of objlib to use llvm_update_compile_flags().
$<TARGET_OBJECTS> shouldn't require compile flags. Flags are set in obj.${name}.

llvm-svn: 246984
2015-09-08 07:42:06 +00:00
Elena Demikhovsky dec0f0885f compilation issue, NFC
llvm-svn: 246983
2015-09-08 07:34:06 +00:00
Elena Demikhovsky d240d778b3 fixed compilation issue, NFC.
llvm-svn: 246982
2015-09-08 07:10:08 +00:00
Elena Demikhovsky e88038f235 AVX-512: Lowering for 512-bit vector shuffles.
Vector types: <8 x 64>, <16 x 32>, <32 x 16> float and integer.

Differential Revision: http://reviews.llvm.org/D10683

llvm-svn: 246981
2015-09-08 06:38:21 +00:00
Tobias Grosser a89dc57b41 Do not use '.' in subfunction names
Certain backends, e.g. NVPTX, do not support '.' in function names. Hence,
we ensure all '.' are replaced by '_' when generating function names for
subfunctions. For the current OpenMP code generation, this is not strictly
necessary, but future uses cases (e.g. GPU offloading) need this issue to be
fixed.

llvm-svn: 246980
2015-09-08 06:22:17 +00:00
Bruce Mitchener 2f9aa57927 [cmake] Remove LLDB_ENABLE_PYTHON_SCRIPTS_SWIG_API_GENERATION.
Summary:
This should be a mandatory build process going forward, if Python
is enabled. The longer term desire is to remove the old shell
scripts entirely.

Reviewers: zturner, clayborg, labath

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12667

llvm-svn: 246979
2015-09-08 05:00:22 +00:00
Ted Kremenek 3a0678e33c [analyzer] Apply whitespace cleanups by Honggyu Kim.
llvm-svn: 246978
2015-09-08 03:50:52 +00:00
Eric Fiselier 21dfbfb426 make common_type SFINAE-friendly and support void. Patch from Agustin Berge.
This patch also fixes PR22135. (https://llvm.org/bugs/show_bug.cgi?id=22135)
See the review for more information: http://reviews.llvm.org/D6964

llvm-svn: 246977
2015-09-08 00:13:57 +00:00
Davide Italiano bb9a6ccfa8 [llvm-readobj] Shrink code a little bit. No functional change.
llvm-svn: 246976
2015-09-07 20:47:03 +00:00
Simon Pilgrim 437cc973fb [X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
llvm-svn: 246974
2015-09-07 20:10:11 +00:00
Sanjay Patel de28573e49 add missing regression tests for De Morgan's Law transform in InstCombine
llvm-svn: 246973
2015-09-07 19:00:38 +00:00
Tamas Berghammer 25d41fa148 XFAIL single_step_only_steps_one_instruction related tests on arm/aarch64
llvm-svn: 246972
2015-09-07 16:01:26 +00:00
Tamas Berghammer cf6f92a870 XFAIL TestBuiltinTrap on android-arm (gcc bug)
llvm-svn: 246971
2015-09-07 15:50:19 +00:00
Tamas Berghammer 72eea4e644 XFAIL test_fp_special_purpose_register_read on android i386
llvm-svn: 246970
2015-09-07 15:18:24 +00:00
Bruce Mitchener b61f89ee52 [www] Typo fixes.
Reviewers: clayborg, ki.stfu

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D12668

llvm-svn: 246969
2015-09-07 13:03:07 +00:00
Zoran Jovanovic 7b85682541 [mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt, FLOOR.W.fmt, TRUNC.L.fmt, TRUNC.W.fmt, RSQRT.fmt and SQRT.fmt instructions
Differential Revision: http://reviews.llvm.org/D11674

llvm-svn: 246968
2015-09-07 13:01:04 +00:00
Kuba Brecka 6f7ef0ea3e Revert r246961 "[asan] Intercept and wrap XPC callback blocks".
There is a build failure for the simulator.

llvm-svn: 246967
2015-09-07 12:25:51 +00:00
Pavel Labath 63a579c752 Mark TestCreateDuringInstructionStep as flaky on android arm
llvm-svn: 246966
2015-09-07 12:15:27 +00:00
Hafiz Abid Qadeer 8647f4381f Fix -data-evaluate-expression for array.
Summary:
For an array declared like "blk[2][3]", this command was showing:
-data-evaluate-expression blk
^done,value="{[0] = [3], [1] = [3]}"

After this fix, it shows:
-data-evaluate-expression blk
^done,value="{[0] = {[0] = 1, [1] = 2, [2] = 3}, [1] = {[0] = 4, [1] = 5, [2] = 6}}"

The code to do the right thing was already available and used by other commands.
So I have just used that and removed the half-baked previous implementation.

Reviewers: ki.stfu

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12634

llvm-svn: 246965
2015-09-07 12:00:51 +00:00
Pavel Labath 058faef6ce Skip RegisterCommandsTestCase.test_fp_register_write on Android i386
it appears a kernel bug is preventing us from writing into the register.

llvm-svn: 246964
2015-09-07 11:59:01 +00:00
Zoran Jovanovic ada7091812 [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions
Differential Revision: http://reviews.llvm.org/D11181

llvm-svn: 246963
2015-09-07 11:56:37 +00:00
John Brawn d8b405abf7 [ARM] Get rid of SelectT2ShifterOperandReg, NFC
SelectT2ShifterOperandReg has identical behaviour to SelectImmShifterOperand,
so get rid of it and use SelectImmShifterOperand instead.

Differential Revision: http://reviews.llvm.org/D12195

llvm-svn: 246962
2015-09-07 11:45:18 +00:00
Kuba Brecka dfaac293dc [asan] Intercept and wrap XPC callback blocks
On recent OS X systems, blocks used as callbacks for XPC events (set up e.g. via xpc_connection_set_event_handler) are not later executed via the public libdispatch API (dispatch_async, etc). Because we don't intercept the path where the block is executed, we can fail to register the newly created dispatch thread. To fix that, let's intercept libxpc's APIs that take a block as a callback handler, and let's wrap these blocks in the same way as we do for libdispatch API.

Differential Revision: http://reviews.llvm.org/D12490

llvm-svn: 246961
2015-09-07 11:19:22 +00:00
Zoran Jovanovic 14f308e44f [mips][microMIPS] Implement CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, MAX.fmt, MIN.fmt, MAXA.fmt, MINA.fmt and CMP.condn.fmt instructions
Differential Revision: http://reviews.llvm.org/D12141

llvm-svn: 246960
2015-09-07 10:31:31 +00:00
Tamas Berghammer c40e7b1769 Fix the handling of FPR offsets in Linux arm/aarch64 register contexts
Differential revision: http://reviews.llvm.org/D12636

llvm-svn: 246959
2015-09-07 10:11:23 +00:00
Tamas Berghammer 25b9f7ebd3 Use eAddressClassCode for address lookup for opcodes for stack frames
It is required because of the following edge case on arm:

bx <addr>   Non-tail call in a no return function
[data-pool] Marked with $d mapping symbol

The return address of the function call will point to the data pool but
we have to treat it as code so the StackFrame can calculate the symbols
correctly.

Differential revision: http://reviews.llvm.org/D12556

llvm-svn: 246958
2015-09-07 09:58:09 +00:00
Pavel Labath b5d5ead8c9 Fixup TestRegisters after r246955
- clang is picky about inline assembly: add the correct instruction size suffix
- mark the new test as expectedFailureClang: the test fails as the breakpoint is set in the wrong
  place

llvm-svn: 246957
2015-09-07 08:54:34 +00:00
Pavel Labath 53159c9b78 Extend the XFAIL for TestMiBreak
the test is occasionally failing on linux for all tested scenarios.

llvm-svn: 246956
2015-09-07 07:58:29 +00:00
Abhishek Aggarwal 7f658edd61 Bug 24457 - X87 FPU Special Purpose Registers
Summary:
  - For 'register read --all' command on x86_64-Linux Platform:

      -- Provide correct values of X87 FPU Special Purpose Registers
      -- Both 32-bit & 64-bit inferiors give correct values on this
         Platform

  - Added a Test Vector:
      -- To verify the expected behaviour of the command

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ashok.thirumurthi, granata.enrico, tfiala, clayborg

Differential Revision: http://reviews.llvm.org/D12592

llvm-svn: 246955
2015-09-07 07:40:16 +00:00
David Majnemer 907abf799d CODE_OWNERS.TXT is supposed to be sorted by surname
llvm-svn: 246954
2015-09-07 00:41:40 +00:00
NAKAMURA Takumi 0d72539d5a Prune utf8 chars in comments.
llvm-svn: 246953
2015-09-07 00:26:54 +00:00